mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-12-19 08:21:27 +01:00
78c44977a2
Migrate the legacy Agilex platform to use the upstream Linux device tree configuration. This helps reduce maintenance overhead and aligns U-Boot with the Linux kernel's DTS hierarchy and naming conventions. This change improves consistency between U-Boot and Linux by removing custom/legacy DTS handling and instead relying on the standardized definitions provided by the upstream Linux DTS. Signed-off-by: Tingting Meng <tingting.meng@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
164 lines
4.9 KiB
Plaintext
164 lines
4.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* U-Boot additions
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*
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* Copyright (C) 2025 Altera Corporation <www.altera.com>
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*/
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/ {
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soc@0 {
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socfpga-system-mgr-firewall {
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compatible = "intel,socfpga-dtreg";
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#address-cells = <1>;
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#size-cells = <1>;
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bootph-all;
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i_sys_mgr_core@ffd12000 {
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reg = <0xffd12000 0x00000230>;
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intel,offset-settings =
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/* Enable non-secure interface to DMA */
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<0x00000020 0xff010000 0xff010011>,
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/* Enable non-secure interface to DMA periph */
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<0x00000024 0xffffffff 0xffffffff>;
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bootph-all;
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};
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};
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socfpga_l3interconnect_firewall:socfpga-l3interconnect-firewall {
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compatible = "intel,socfpga-dtreg";
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#address-cells = <1>;
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#size-cells = <1>;
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bootph-all;
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noc_fw_l4_per_l4_per_scr@ffd21000 {
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reg = <0xffd21000 0x00000074>;
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intel,offset-settings =
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/* Disable L4 periphs firewall */
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<0x00000000 0x01010001 0x01010001>,
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<0x00000004 0x01010001 0x01010001>,
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<0x0000000c 0x01010001 0x01010001>,
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<0x00000010 0x01010001 0x01010001>,
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<0x0000001c 0x01010001 0x01010101>,
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<0x00000020 0x01010001 0x01010101>,
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<0x00000024 0x01010001 0x01010101>,
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<0x00000028 0x01010001 0x01010101>,
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<0x0000002c 0x01010001 0x01010001>,
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<0x00000030 0x01010001 0x01010001>,
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<0x00000034 0x01010001 0x01010001>,
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<0x00000040 0x01010001 0x01010001>,
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<0x00000044 0x01010001 0x01010101>,
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<0x00000048 0x01010001 0x01010101>,
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<0x00000050 0x01010001 0x01010101>,
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<0x00000054 0x01010001 0x01010101>,
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<0x00000058 0x01010001 0x01010101>,
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<0x0000005c 0x01010001 0x01010101>,
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<0x00000060 0x01010001 0x01010101>,
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<0x00000064 0x01010001 0x01010101>,
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<0x00000068 0x01010001 0x01010101>,
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<0x0000006c 0x01010001 0x01010101>,
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<0x00000070 0x01010001 0x01010101>;
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bootph-all;
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};
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noc_fw_l4_sys_l4_sys_scr@ffd21100 {
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reg = <0xffd21100 0x00000098>;
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intel,offset-settings =
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/* Disable L4 system firewall */
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<0x00000008 0x01010001 0x01010001>,
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<0x0000000c 0x01010001 0x01010001>,
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<0x00000010 0x01010001 0x01010001>,
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<0x00000014 0x01010001 0x01010001>,
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<0x00000018 0x01010001 0x01010001>,
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<0x0000001c 0x01010001 0x01010001>,
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<0x00000020 0x01010001 0x01010001>,
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<0x0000002c 0x01010001 0x01010001>,
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<0x00000030 0x01010001 0x01010001>,
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<0x00000034 0x01010001 0x01010001>,
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<0x00000038 0x01010001 0x01010001>,
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<0x00000040 0x01010001 0x01010001>,
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<0x00000044 0x01010001 0x01010001>,
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<0x00000048 0x01010001 0x01010001>,
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<0x0000004c 0x01010001 0x01010001>,
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<0x00000054 0x01010001 0x01010001>,
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<0x00000058 0x01010001 0x01010001>,
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<0x0000005c 0x01010001 0x01010001>,
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<0x00000060 0x01010001 0x01010101>,
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<0x00000064 0x01010001 0x01010101>,
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<0x00000068 0x01010001 0x01010101>,
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<0x0000006c 0x01010001 0x01010101>,
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<0x00000070 0x01010001 0x01010101>,
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<0x00000074 0x01010001 0x01010101>,
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<0x00000078 0x01010001 0x03010001>,
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<0x00000090 0x01010001 0x01010001>,
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<0x00000094 0x01010001 0x01010001>;
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bootph-all;
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};
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noc_fw_soc2fpga_soc2fpga_scr@ffd21200 {
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reg = <0xffd21200 0x00000004>;
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/* Disable soc2fpga security access */
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intel,offset-settings = <0x00000000 0x0ffe0101 0x0ffe0101>;
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bootph-all;
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};
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noc_fw_lwsoc2fpga_lwsoc2fpga_scr@ffd21300 {
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reg = <0xffd21300 0x00000004>;
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/* Disable lightweight soc2fpga security access */
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intel,offset-settings = <0x00000000 0x0ffe0101 0x0ffe0101>;
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bootph-all;
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};
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noc_fw_tcu_tcu_scr@ffd21400 {
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reg = <0xffd21400 0x00000004>;
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/* Disable DMA ECC security access, for SMMU use */
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intel,offset-settings = <0x00000000 0x01010001 0x01010001>;
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bootph-all;
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};
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noc_fw_priv_MemoryMap_priv@ffd24800 {
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reg = <0xffd24800 0x0000000c>;
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intel,offset-settings =
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/* Enable non-prviledged access to various periphs */
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<0x00000000 0xfff73ffb 0xfff73ffb>;
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bootph-all;
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};
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};
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socfpga_smmu_secure_config: socfpga-smmu-secure-config {
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compatible = "intel,socfpga-dtreg";
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#address-cells = <1>;
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#size-cells = <1>;
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bootph-all;
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/* TCU */
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noc_fw_tcu_tcu_scr@ffd21400 {
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reg = <0xffd21400 0x00000004>;
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intel,offset-settings =
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<0x00000000 0x01010001 0x01010001>;
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bootph-all;
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};
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/* System manager */
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i_sys_mgt_sysmgr_csr@ffd12000 {
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reg = <0xffd12000 0x00000500>;
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intel,offset-settings =
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/* i_sys_mgr_core_emac0 */
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<0x00000044 0x0a000000 0xffff0103>,
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/* i_sys_mgr_core_emac1 */
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<0x00000048 0x0a000000 0xffff0103>,
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/* i_sys_mgr_core_emac2 */
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<0x0000004c 0x0a000000 0xffff0103>,
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/* i_sys_mgr_core_nand_l3master */
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<0x00000034 0x00220000 0x007733ff>,
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/* i_sys_mgr_core_sdmmc_l3master */
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<0x0000002c 0x00000020 0x03ff03ff>,
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/* i_sys_mgr_core_usb0_l3master */
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<0x00000038 0x00000200 0x03ff30ff>,
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/* i_sys_mgr_core_usb1_l3master */
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<0x0000003c 0x00000200 0x03ff30ff>;
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bootph-all;
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};
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};
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};
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};
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