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https://source.denx.de/u-boot/u-boot.git
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44a26da8d9
Add support for loading the secure & non-secure pdi images and PL bitstream on the Versal Gen2 platform. The FPGA driver is enabled to load the bitstream in PDI format on the AMD Versal Gen2 device. PDI is the new programmable device image format for Versal Gen2, and the bitstream for the Versal Gen2 platform is generated exclusively in this format. With the enhanced SMC format in TF-A ensuring transparent payload forwarding for Versal Gen2, the u-boot driver must now handle the word swapping of PDI address that was previously done in TF-A for this API. The source code for the Versal2 loadpdi command and the CONFIG_CMD_VERSAL2 configuration has been removed. It now utilizes the fpga load <dev> <address> <length> command to load secure & non-secure pdi images. Signed-off-by: Prasad Kummari <prasad.kummari@amd.com> Link: https://lore.kernel.org/r/20250327105200.1262615-3-prasad.kummari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
101 lines
4.0 KiB
C
101 lines
4.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2002
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* Rich Ireland, Enterasys Networks, rireland@enterasys.com.
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*/
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#include <fpga.h>
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#ifndef _XILINX_H_
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#define _XILINX_H_
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/* Xilinx types
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*********************************************************************/
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typedef enum { /* typedef xilinx_iface */
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min_xilinx_iface_type, /* low range check value */
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slave_serial, /* serial data and external clock */
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master_serial, /* serial data w/ internal clock (not used) */
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slave_parallel, /* parallel data w/ external latch */
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jtag_mode, /* jtag/tap serial (not used ) */
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master_selectmap, /* master SelectMap (virtex2) */
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slave_selectmap, /* slave SelectMap (virtex2) */
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devcfg, /* devcfg interface (zynq) */
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csu_dma, /* csu_dma interface (zynqmp) */
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cfi, /* CFI interface(versal) */
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max_xilinx_iface_type /* insert all new types before this */
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} xilinx_iface; /* end, typedef xilinx_iface */
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typedef enum { /* typedef xilinx_family */
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min_xilinx_type, /* low range check value */
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xilinx_spartan2, /* Spartan-II Family */
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xilinx_virtexE, /* Virtex-E Family */
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xilinx_virtex2, /* Virtex2 Family */
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xilinx_spartan3, /* Spartan-III Family */
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xilinx_zynq, /* Zynq Family */
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xilinx_zynqmp, /* ZynqMP Family */
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xilinx_versal, /* Versal Family */
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xilinx_versal_net, /* Versal NET Family */
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xilinx_versal2, /* Versal Gen 2 Family */
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max_xilinx_type /* insert all new types before this */
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} xilinx_family; /* end, typedef xilinx_family */
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/* FPGA bitstream supported types */
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#define FPGA_LEGACY BIT(0)
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#define FPGA_XILINX_ZYNQMP_DDRAUTH BIT(1)
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#define FPGA_XILINX_ZYNQMP_ENC BIT(2)
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typedef struct { /* typedef xilinx_desc */
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xilinx_family family; /* part type */
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xilinx_iface iface; /* interface type */
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size_t size; /* bytes of data part can accept */
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void *iface_fns; /* interface function table */
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int cookie; /* implementation specific cookie */
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struct xilinx_fpga_op *operations; /* operations */
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char *name; /* device name in bitstream */
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int flags; /* compatible flags */
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} xilinx_desc; /* end, typedef xilinx_desc */
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struct xilinx_fpga_op {
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int (*load)(xilinx_desc *desc, const void *buf, size_t bsize,
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bitstream_type bstype, int flags);
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int (*loadfs)(xilinx_desc *desc, const void *buf, size_t bsize,
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fpga_fs_info *fpga_fsinfo);
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int (*loads)(xilinx_desc *desc, const void *buf, size_t bsize,
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struct fpga_secure_info *fpga_sec_info);
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int (*dump)(xilinx_desc *desc, const void *buf, size_t bsize);
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int (*info)(xilinx_desc *desc);
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#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
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int (*str2flag)(xilinx_desc *desc, const char *string);
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#endif
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};
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/* Generic Xilinx Functions
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*********************************************************************/
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int xilinx_load(xilinx_desc *desc, const void *image, size_t size,
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bitstream_type bstype, int flags);
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int xilinx_dump(xilinx_desc *desc, const void *buf, size_t bsize);
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int xilinx_info(xilinx_desc *desc);
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int xilinx_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
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fpga_fs_info *fpga_fsinfo);
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int xilinx_loads(xilinx_desc *desc, const void *buf, size_t bsize,
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struct fpga_secure_info *fpga_sec_info);
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/* Board specific implementation specific function types
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*********************************************************************/
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typedef int (*xilinx_pgm_fn)(int assert_pgm, int flush, int cookie);
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typedef int (*xilinx_init_fn)(int cookie);
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typedef int (*xilinx_err_fn)(int cookie);
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typedef int (*xilinx_done_fn)(int cookie);
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typedef int (*xilinx_clk_fn)(int assert_clk, int flush, int cookie);
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typedef int (*xilinx_cs_fn)(int assert_cs, int flush, int cookie);
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typedef int (*xilinx_wr_fn)(int assert_write, int flush, int cookie);
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typedef int (*xilinx_rdata_fn)(unsigned char *data, int cookie);
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typedef int (*xilinx_wdata_fn)(unsigned char data, int flush, int cookie);
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typedef int (*xilinx_busy_fn)(int cookie);
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typedef int (*xilinx_abort_fn)(int cookie);
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typedef int (*xilinx_pre_fn)(int cookie);
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typedef int (*xilinx_post_fn)(int cookie);
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typedef int (*xilinx_bwr_fn)(void *buf, size_t len, int flush, int cookie);
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#endif /* _XILINX_H_ */
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