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909f717eaf
Add support for the Goldfish timer driver. This driver utilizes the Goldfish RTC hardware to provide a nanosecond-resolution timer. This virtual device is commonly found in QEMU virtual machines (such as the m68k virt machine) and Android emulators. The driver implements the standard U-Boot timer UCLASS interface, exposing a 64-bit monotonically increasing counter with a 1GHz clock rate derived from the RTC registers. Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Tested-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Yao Zi <me@ziyao.cc> Reviewed-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
90 lines
2.0 KiB
C
90 lines
2.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright (C) 2025, Kuan-Wei Chiu <visitorckw@gmail.com>
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*
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* Goldfish Timer driver
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*/
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#include <dm.h>
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#include <goldfish_timer.h>
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#include <mapmem.h>
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#include <timer.h>
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#include <asm/io.h>
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#include <linux/errno.h>
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struct goldfish_timer_priv {
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void __iomem *base;
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};
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/* Goldfish RTC registers used as Timer */
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#define TIMER_TIME_LOW 0x00
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#define TIMER_TIME_HIGH 0x04
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static u64 goldfish_timer_get_count(struct udevice *dev)
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{
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struct goldfish_timer_priv *priv = dev_get_priv(dev);
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u32 low, high;
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u64 time;
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/*
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* TIMER_TIME_HIGH is only updated when TIMER_TIME_LOW is read.
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* We must read LOW before HIGH to latch the high 32-bit value
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* and ensure a consistent 64-bit timestamp.
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*/
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low = readl(priv->base + TIMER_TIME_LOW);
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high = readl(priv->base + TIMER_TIME_HIGH);
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time = ((u64)high << 32) | low;
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return time;
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}
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static int goldfish_timer_of_to_plat(struct udevice *dev)
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{
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struct goldfish_timer_plat *plat = dev_get_plat(dev);
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fdt_addr_t addr;
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addr = dev_read_addr(dev);
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if (addr != FDT_ADDR_T_NONE)
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plat->reg = addr;
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return 0;
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}
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static int goldfish_timer_probe(struct udevice *dev)
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{
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struct goldfish_timer_plat *plat = dev_get_plat(dev);
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struct goldfish_timer_priv *priv = dev_get_priv(dev);
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struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
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if (!plat->reg)
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return -EINVAL;
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priv->base = map_sysmem(plat->reg, 0x20);
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/* Goldfish RTC counts in nanoseconds, so the rate is 1GHz */
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uc_priv->clock_rate = 1000000000;
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return 0;
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}
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static const struct timer_ops goldfish_timer_ops = {
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.get_count = goldfish_timer_get_count,
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};
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static const struct udevice_id goldfish_timer_ids[] = {
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{ .compatible = "google,goldfish-rtc" },
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{ }
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};
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U_BOOT_DRIVER(goldfish_timer) = {
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.name = "goldfish_timer",
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.id = UCLASS_TIMER,
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.of_match = goldfish_timer_ids,
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.of_to_plat = goldfish_timer_of_to_plat,
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.plat_auto = sizeof(struct goldfish_timer_plat),
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.ops = &goldfish_timer_ops,
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.probe = goldfish_timer_probe,
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.priv_auto = sizeof(struct goldfish_timer_priv),
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};
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