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fcc50761f3
As exposed by "make randconfig", CPU_MICROBLAZE uses select to
force-enable XILINX_MICROBLAZE0_PVR, but that symbol depends on
TARGET_MICROBLAZE_GENERIC. The select bypasses this dependency chain,
triggering a Kconfig warning:
WARNING: unmet direct dependencies detected for XILINX_MICROBLAZE0_PVR
Depends on [n]: MICROBLAZE [=y] && TARGET_MICROBLAZE_GENERIC [=n]
Selected by [y]:
- CPU_MICROBLAZE [=y] && CPU [=y] && MICROBLAZE [=y]
Change XILINX_MICROBLAZE0_PVR from select to depends on, so that the
CPU driver is only available when PVR support has been explicitly
enabled.
Fixes: 816226d27efa ("cpu: add CPU driver for microblaze")
Reported-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/61ddd555f58ef5169c48b190423640d949e4aad1.1773764781.git.michal.simek@amd.com
48 lines
1.3 KiB
Plaintext
48 lines
1.3 KiB
Plaintext
config CPU
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bool "Enable CPU drivers using Driver Model"
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help
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This allows drivers to be provided for CPUs and their type to be
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specified in the board's device tree. For boards which support
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multiple CPUs, they normally have to be set up in U-Boot so that
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they can work correctly in the OS. This provides a framework for
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finding out information about available CPUs and making changes.
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config CPU_IMX
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bool "Enable i.MX CPU driver"
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depends on CPU && ARM64
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help
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Support CPU cores for SoCs of the i.MX series.
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config CPU_MPC83XX
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bool "Enable MPC83xx CPU driver"
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depends on CPU && MPC83xx
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select CLK_MPC83XX
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help
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Support CPU cores for SoCs of the MPC83xx series.
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config CPU_RISCV
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bool "Enable RISC-V CPU driver"
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depends on CPU && RISCV
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help
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Support CPU cores for RISC-V architecture.
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config CPU_ARMV8
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bool "Enable generic ARMv8 CPU driver"
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depends on CPU && ARM64
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select IRQ
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help
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Support CPU cores for armv8 architecture.
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config CPU_MICROBLAZE
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bool "Enable Microblaze CPU driver"
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depends on CPU && MICROBLAZE && XILINX_MICROBLAZE0_PVR
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select DM_EVENT
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help
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Support CPU cores for Microblaze architecture.
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config CPU_XTENSA
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bool "Enable Xtensa CPU driver"
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depends on CPU && XTENSA
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help
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Support CPU cores for Xtensa architecture.
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