Conor Dooley 2f7420ccaa riscv: mpfs: move SoC level options to the CPU Kconfig
There are multiple boards that use the PolarFire SoC, so extract
the Kconfig sections that are determined at a CPU level from the board
Kconfigs now that we have a CPU Kconfig.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-12-08 12:10:43 +08:00

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if TARGET_MICROCHIP_GENERIC
config SYS_BOARD
default "mpfs_generic"
config SYS_VENDOR
default "microchip"
config SYS_CPU
default "mpfs"
config SYS_CONFIG_NAME
default "microchip_mpfs_generic"
config TEXT_BASE
default 0x80000000 if !RISCV_SMODE
default 0x80200000 if RISCV_SMODE
config BOARD_SPECIFIC_OPTIONS # dummy
def_bool y
select MICROCHIP_MPFS
select BOARD_EARLY_INIT_F
select BOARD_LATE_INIT
imply SMP
imply CMD_DHCP
imply CMD_EXT2
imply CMD_EXT4
imply CMD_FAT
imply CMD_FS_GENERIC
imply CMD_NET
imply CMD_PING
imply CMD_MMC
imply DOS_PARTITION
imply EFI_PARTITION
imply IP_DYN
imply ISO_PARTITION
imply PHY_LIB
imply PHY_VITESSE
imply MTD_SPI_NAND
imply CMD_MTD
imply CMD_MTDPARTS
imply DM_MAILBOX
imply MPFS_MBOX
imply MISC
imply MPFS_SYSCONTROLLER
endif