Saving iobase directly to private structure helps with moving to DM.
There is an option to load iobase from pdata but it is additional load.
Pointer to private structure is available all the time.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Simplify mdio_wait function by passing regs directly.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Fix these compilation warning by proper grouping:
In function 'axi_dma_init': drivers/net/xilinx_axi_emac.c:391:7:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
if (!(in_be32(&priv->dmatx->control) |
^
In function 'axiemac_send': drivers/net/xilinx_axi_emac.c:501:21:
warning: suggest parentheses around operand of '!' or change '&' to '&&'
or '!' to '~' [-Wparentheses]
while (timeout && (!in_be32(&priv->dmatx->status) &
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
- Move config option out of board file.
- Remove uartlite address from config file
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Thomas Chou <thomas@wytron.com.tw>
The old mail address will stop working soon.
Update it all the files
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michal Simek <michal.simek@xilinx.com>
As atmel_nand_ecc.h is sync with v4.1 kernel, which adds the
PMECC_OOB_RESERVED_BYTES. So use it in the driver.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Also align the open parenthesis.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Since ecc_{strength,step}_ds is introduced in nand_chip structure for
minimum ecc requirements. So we can use them directly and remove our
own get_onfi_ecc_param function.
Signed-off-by: Josh Wu <josh.wu@atmel.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com>
During the initialization of PHY the gigabit bit capable is set if the
controller is a GEM. However, for sama5d2 and sama5d4, the GEM is
configured to support only 10/100.
Improperly setting the GBE capability leads to an unresponsive MAC
controller. This patch fixes this behavior allowing using the gmac with
these SoCs.
Suggested-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fixed minor checkpatch warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
Timing issue occurs on eMMC not only when modifying the frequency but
also for all the switch command(CMD6). According to the MMC spec waiting
8 clocks after a switch command would be the thing to do.
This patch allows fixing CPU hang observed when trying to changing the
bus width on a eMMC on SAMA5D4.
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Tested-by: Marek Vasut <marex@denx.de> # on DENX MA5D4EV
Acked-by: Marek Vasut <marex@denx.de>
Tested-by: Andreas Bießmann <andreas.devel@googlemail.com> # on atngw100
Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
[fixed minor checkpatch warning]
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
"Fix mvtwsi not working on sun6i and newer sunxi SoCs" includes the following:
@@ -189,7 +200,8 @@ static int twsi_start(struct i2c_adapter *adap, int expected_status)
/* globally set TWSIEN in case it was not */
twsi_control_flags |= MVTWSI_CONTROL_TWSIEN;
/* assert START */
- writel(twsi_control_flags | MVTWSI_CONTROL_START, &twsi->control);
+ twsi_control_flags |= MVTWSI_CONTROL_START | MVTWSI_CONTROL_CLEAR_IFLG;
+ writel(twsi_control_flags, &twsi->control);
/* wait for controller to process START */
return twsi_wait(adap, expected_status);
}
The modification of twsi_control_flags done here was introduced while
merging to fix a line > 80 chars, but twsi_control_flags is a global variable
and should not be modified like this here, this commit fixes this, restoring
mvtwsi functionality.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Previously, AXP818 ALDO support was partially added to Kconfig, but
never enabled in the board file, nor properly set or configured in
Kconfig. The boards continue to work because the AXP818 is designed
to pair with the A83T/H8, and the default voltages match the reference
design's requirements.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
AXP818 provides an array of LDOs to provide power to various peripherals.
None of these regulators are critical.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Instead of one function for each DLDO regulator, make 1 function that
takes an extra "index". Since the control bits for the DLDO regulators
are contiguous, this makes the function very simple. This removes a lot
of duplicate code.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Adds poweroff support for axp209 pmic.
Signed-off-by: Michael van Slingerland <michael@deviousops.nl>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Enabling CONFIG_DISPLAY breaks building for some architectures
(microblaze-generic), so we disable CONFIG_DISPLAY in Kconfig
by default and enable this option in defconfigs. CONFIG_DISPLAY
depends on CONFIG_I2C_EDID, so add and enable it in defconfigs, too.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Reported-by: Bin Meng <bmeng.cn@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Anatolij Gustschin <agust@denx.de>
This driver is designed in a generic manner, so clocks should be
handled genericly as well.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Current code compares the return pointer of function
qbman_cena_write_start with NULL. Instead the value of the return
pointer should be compared.
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@freescale.com>
Acked-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Following commit 61bd2f75, exclude unused DDR controller from
calculating RAM size for SPL boot.
Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Erratum A-009663 workaround requires to set DDR_INTERVAL[BSTOPRE] to 0
before setting DDR_SDRAM_CFG[MEM_EN] and set DDR_INTERVAL[BSTOPRE]
to the desired value after DDR initialization has completed.
When DDR controller is configured to operate in auto-precharge
mode(DDR_INTERVAL[BSTOPRE]=0), this workaround is not needed.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
During the receive data training, the DDRC may complete on a
non-optimal setting that could lead to data corruption or
initialization failure.
Workaround: before setting MEM_EN, set DEBUG_29 register with
specific value for different data rates.
Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Zap the rockchip serial compatible string, because rockchip
serial has "snps,dw-apb-uart" compatible string in the dts.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
When building katmai, it reports quite a lot
warning: cast to pointer from integer of different size [-Wint-to-pointer-cast]
Fix this by casting the dev->iobase with u_long.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
BUILD_BUG_* macros have been defined in several headers. It would
be nice to collect them in include/linux/bug.h like Linux.
This commit is cherry-picking useful macros from include/linux/bug.h
of Linux 4.4.
I did not import BUILD_BUG_ON_MSG() because it would not work if it
is used with include/common.h in U-Boot. I'd like to postpone it
until the root cause (the "error()" macro in include/common.h causes
the name conflict with "__attribute__((error()))") is fixed.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Use existing library function to poll bit(s).
Signed-off-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
Tested-by: Sylvain Lemieux <slemieux@tycoint.com>
clang-3.8 reports that serial_putc_raw_dev in serial_ns16550.c is
unused. Further investigation shows that we have 3 places that
implement this function and no callers, remove.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Move the init code into the I2C driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is used on most Intel platforms. We don't have a driver for it yet, but
add a stub to handle the init. For now this targets ivybridge so we may want
to add a device tree binding and generalise it when other platforms are
supported.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a uclass ID for a disk controller. This can be used by AHCI/SATA or
other controller types. There are no operations and no interface so far,
but it is possible to probe a SATA device.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this BIOS emulator uses a bus/device/function number. Change
it to use a device if CONFIG_DM_PCI is enabled.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We have a way to find a regmap by its syscon driver data value. Add the same
for syscon itself.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Add a compatible string to allow this to be specified in the device tree
if needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This is often -96 (-EPFNOSUPPORT) which indicates that the uclass is not
compiled in. Display the error number to make this easier to spot.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present this SPI driver works by searching the PCI buses for its
peripheral. It also uses the legacy PCI API.
In addition the driver has code to determine the type of Intel PCH that is
used (version 7 or version 9). Now that we have proper PCH drivers we can
use those to obtain the information we need.
While the device tree has a node for the SPI peripheral it is not in the
right place. It should be on the PCI bus as a sub-peripheral of the LPC
device.
Update the device tree files to show the SPI controller within the PCH, so
that PCI access works as expected.
This patch includes Bin's fix-up patch from here:
https://patchwork.ozlabs.org/patch/569478/
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
The trace is seldom useful for basic debugging. Allow it to be enabled
separately so that it is easier to see the more important init and error
debug messages.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At some point we may need to distinguish between different types of PCHs,
but for existing supported platforms we only need to worry about version 7
and version 9 bridges. Add a driver for the PCH9.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
