The first 4 block copy channels and rings on AM62P support
High Capacity Block Copy. These channels have approximately
3x improvement over the normal Block copy channels when doing
DDR-to-DDR copy.
Currently, during allocation these channels do not have a
separate interface and are allocated with normal BCDMA channels.
Latest TIFS and DM firmware adds support for differentiating these
High Capcity resources. This update is for allocating these new
resource type to different hosts with below mentioned scheme.
--------------------- --------------- ------------- ----------------
Resource A53_2 MCU_R5 WKUP_R5
--------------------- --------------- ------------- ----------------
BCDMA HC CHAN [4] => 2 (Primary) 1 (Primary) 1 (Primary)
BCDMA HC CHAN RING [4] => 2 (Primary) 1 (Primary) 1 (Primary)
BCDMA CHAN [4] => 18 (Primary) 2 (Primary) 6 (Primary)
BCDMA CHAN RING[4] => 18 (Primary) 2 (Primary) 6 (Primary)
Signed-off-by: Sparsh Kumar <sparsh-kumar@ti.com>
Signed-off-by: Sebin Francis <sebin.francis@ti.com>
Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
Assorted fixes, refactorings and additions that are ready, and shave
off some load from upcoming series'.
Improves MMC performance on D1/T113 (missed clock divider), enables
eMMC access on the H616 family (never worked, many thanks to Jernej for
the fix!), DRAM detection fixes for the H616 (now reportedly stable).
Some patches for the upcoming Allwinner A133 SoC support: a few
refactorings, plus the DM clock and pinctrl driver. The DRAM init
routines work, but need some more polishing, that also holds back the
actual enablement patch, which will hopefully follow for v2025.07 still.
Also some preparatory patches for the Allwinner A523 SoC support, for
now just to improve the FEL save/restore code. There will be more patches
coming up for this, ideally also in the coming cycle still.
Gitlab CI passed, and I booted that briefly on some boards.
The AXP803 has been around for about a decade now, but so far we didn't
need SPL support, since the DRAM rail was wired up correctly at reset.
Now some boards using the A133 SoC use the (compatible) AXP707 with DDR4
memory, which requires the SPL to set the required 1.1V voltage manually.
Add the descriptions for the DC/DC regulators of the AXP803, and enable
that when CONFIG_AXP803_POWER is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
There is a config option to run the PMIC at nominal voltages
which is not enabled on the i.MX8MP Beacon kit, so it the PMIC
runs at overdrive voltages. Unfortuately, the check for this
condition to set the GIC clock parent and rate is backwards from
what it should be, and accidentally sets the GIC clock to nominal
if the PMIC is in overdrive, and sets the GIC clock to overdrive
if the PMIC is in nominal. Fix this by inverting the logic on the
check.
Fixes: ab53bd43dbde ("arm64: imx: Add support for imx8mp-beacon-kit")
Signed-off-by: Adam Ford <aford173@gmail.com>
The configuration descriptions generated by binman contain the vendor
device-tree directory. Instead of adding it to all match strings just strip
it off.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
The zkr ISA extension can be used to generate random numbers. Since RVA22
zkr is an optional ISA extension. It can be emulated by QEMU. Our RNG
driver detects if the extension is usable during driver binding. Let's
enable it by default on QEMU.
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
In case ENV_IS_IN_SPI_FLASH is disabled, returning ENVL_SPI_FLASH
leads to failure to find environment driver on start up. Fix this
by testing whether ENV_IS_IN_SPI_FLASH is enabled and if not, then
return ENVL_NOWHERE instead.
Signed-off-by: Marek Vasut <marex@denx.de>
spl_perform_fixups is redundant in the current implementation. SPLs call
dram_init during spl_enable_cache in arch/arm/mach-k3/common.c. In
U-Boot, dram_init and dram_init_banksize are automatically called in
init_sequence_f. Therefore, SPLs and U-Boot always determine the correct
RAM size. During Linux boot, fdt_fixup_memory_banks adjusts the RAM size
in the Linux device tree, ensuring correct RAM usage.
dram_init() calls get_ram_size() for the Verdin AM62, which determines
the correct RAM size through read/write operations. However, due to the
K3 bootflow placing ATF in RAM and requiring cache coherence, calling
get_ram_size() with caches enabled prevents ATF boot. Removing this call
restores ATF boot functionality.
This fixes a regression introduced in commit 4164289db882 ("board:
verdin-am62: fix missing memory fixup call") which prevents some of our
Verdin AM62 modules from booting.
Fixes: 4164289db882 ("board: verdin-am62: fix missing memory fixup call")
Signed-off-by: Stefan Eichenberger <stefan.eichenberger@toradex.com>
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case we can easily fix this
by dropping the select line as the following choice statement handles
things correctly. We also drop the "default false" line as false / n is
the default.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Now that the UART driver can enable the required clocks, remove
the hard-coded clock enable. This requires a small re-order
of a couple functions.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
The Ouya microconsole is build on Nvidia Tegra 3 (T33) SoC, featuring a
quad-core 1.7 GHz ARM Cortex-A9 CPU and a ULP GeForce GPU, paired with 1GB
of DDR3 RAM and 8GB of internal flash storage. Running a modified Android
4.1 (Jelly Bean) OS with a custom launcher, it aimed for open-source gaming
via a digital storefront.
This implementation is mostly based on upstream Linux device tree and
fragments of work done by previous developers.
Co-developed-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Wadim Egorov <w.egorov@phytec.de> says:
This patch series syncs the phyCORE-AM62Ax feature-wise with our other
K3-based SoMs by adding SoM overlay handling and capsule updates. It
also introduces support for USBDFU boot and includes various minor fixes.
Link: https://lore.kernel.org/r/20250305045838.3614661-1-w.egorov@phytec.de
Add the phyCORE-AM62Ax to our common board directory to
enable our SOM detection for this product.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
TI's k3_dfu.env includes redundant dfu_alt_info_* data, some of which
is incompatible with our board configuration. Replace it with a custom
variant that better aligns with our setup, ensuring correct offsets and
eliminating unnecessary entries.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
This config includes the phycore_am62ax_r5_defconfig file as well as
the am62x_r5_usbdfu.config fragment. We need another defconfig
because the AM62Ax has not enough internal SRAM to support all boot
sources. The normal phycore_am62ax_r5_defconfig should allow to boot
from MMC and OSPI while this new defconfig allows to boot from USB.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Provide a common part for our K3 based boards including general details
about environment handling and EFI capsule updates.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Basic board support for BeagleY-AI. Information on this
board can be found at https://beagleboard.org/beagley-ai
Signed-off-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Andrew Davis <afd@ti.com>
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.
Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
The R-Car V4H SPL implementation was originally running on the Cortex-R52
core, but this is no longer the case. Majority of the SPL now runs on the
Cortex-A76 core. Drop the stale description.
Fixes: ec53fdee5bec ("arm64: renesas: Add Renesas R-Car V4H SPL implementation")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Remove stale Makefile description, this used to be valid for the
original Makefile from which the common Makefile was made generic,
but is no longer applicable to the common Makefile.
Fixes: c7d2d7f90a91 ("ARM: renesas: Simplify board Makefiles")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Implement custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling in case the TFA was loaded. The loadables handler sets up custom
handoff structure used by Renesas TFA fork in fixed location in DRAM and
indicates the TFA has been loaded.
The custom armv8_switch_to_el2_prep() handling tests whether the TFA BL31
was previously loaded and the custom handoff structure was set up, and if
so, jumps to TFA BL31 which switches from EL3 to EL2 and then returns to
U-Boot just past bl in armv8_switch_to_el2() to finish starting the Linux
kernel.
The jump to Linux through TFA works in such a way that the custom
armv8_switch_to_el2_prep() handler configures the custom handoff structure
such that the target jump address of the TFA BL31 on exit is set to the
armv8_switch_to_el2() + 4, which is just past the bl, and just before the
U-Boot code which implements the Linux kernel boot from either EL. The
registers passed through the TFA BL31 are all the registers passed into
armv8_switch_to_el2_prep() to assure maximum compatibility with all the
boot modes. The armv8_switch_to_el2_prep() handler jumps to the TFA BL31,
which does its setup, drops EL from EL3 to EL2 and finally jumps to the
armv8_switch_to_el2() + 4 entry point, which then allows U-Boot to boot
the Linux kernel the usual way.
In order to build suitable kernel fitImage, build TFA first, upstream
is currently under review:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35799
Or if necessary, downstream repository:
remote: https://github.com/renesas-rcar/arm-trusted-firmware.git
branch: rcar_gen4_v2.7_v4x
```
$ git clean -fqdx
$ MBEDTLS_DIR=/path/to/mbedtls/ make -j$(nproc) bl31 \
PLAT=rcar_gen4 ARCH=aarch64 LSI=V4H SPD=none \
CTX_INCLUDE_AARCH32_REGS=0 MBEDTLS_COMMON_MK=1 \
PTP_NONSECURE_ACCESS=1 LOG_LEVEL=20 DEBUG=0 \
ENABLE_ASSERTIONS=0 E=0
```
Build Linux kernel Image and device tree from current mainline Linux
kernel repository, obtain 'Image' and 'r8a779g0-white-hawk.dtb' .
Bundle the files together using provided fit-image.its fitImage description:
```
$ mkimage -f fit-image.its fitImage
```
To start the kernel fiImage generated in previous step, load fitImage
to DRAM and use the 'bootm' command to start it:
=> load 0x58000000 ... fitImage && bootm 0x58000000
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
changes added in the K3 Resource Partitioning Tool v1.18
The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed. Resource
sharing between A72 and R5 for BCDMA CSI channels allow Linux to use 32
channels at a time.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[n-francis@ti.com: rebased and sent on behalf]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Apalis/Colibri iMX6 V1.2 will replace the STMPE811 ADC/Touch controller
which is EOL by the TLA2024 ADC and AD7879 touch controller.
To support this new version, we detect the presence of the TLA2024
during boot and set a new environment variable named "variant". This
will allow us and users to select the correct DT easily.
By probing via I2C we have a robust detection method instead of relying
on the existing "board_rev" environment variable which is set by the
config block. Users can use "variant" in their DT selection and do not
have to map the board revision to a device tree.
"variant" environment variable behaviour:
* Empty or absent for all versions below v1.2 (STMPE811)
* "-v1.2" for all versions starting from v1.2 (TLA2024 + AD7879)
Usage example:
setenv fdtfile imx6q-apalis${variant}-${fdt_board}.dtb
Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Updates for RPi for 2025.04:
- Copy Bluetooth device address in DT
- Keep warnings from firmware in DT, if any
- Only add frame buffer node if CONFIG_FDT_SIMPLEFB is set
- Add identifiers for the new RPi 5 series
The firmware sets local-bd-address, copy it when loading a new DT.
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The /chosen/user-warnings property is created by the RPi firmware if
there are warnings to report, keep it to make debugging easier.
For example, if the firmware config.txt contains
"dtoverlay=error-example" and that example references an undefined
symbol "&nosuchdev" the warning can be read after boot:
$ cat /proc/device-tree/chosen/user-warnings
dterror: can't find symbol 'nosuchdev'
Failed to resolve overlay 'error-example'
Signed-off-by: Fiona Klute <fiona.klute@gmx.de>
Reviewed-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The functions fdt_simplefb_add_node and fdt_simplefb_enable_and_mem_rsv
are only available if CONFIG_FDT_SIMPLEFB is enabled.
Signed-off-by: Martin Stolpe <martin.stolpe@gmail.com>
Acked-by: Matthias Brugger <mbrugger@suse.com>
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
The Raspberry Pi foundation have released the Raspberry
Pi 500, CM5 an CM5 lite devices so add the assoicated
revision identifers so we can detect them.
Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Acked-by: Matthias Brugger <mbrugger@suse.com>
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
legacy led and button management.
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Merge tag 'u-boot-stm32-20250312' of https://source.denx.de/u-boot/custodians/u-boot-stm into next
CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/25112
- Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
legacy led and button management.
The default PCA9451 BUCK2 volt is 0.6 V for LPDDR4x VDDQ. The codes
are actually used for reworking to LPDDR4 which needs VDDQ at 1.1 V.
So remove it to avoid LPDDR4x issue.
Signed-off-by: Ye Li <ye.li@nxp.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
Enable PCI enumeration by default to get the Bochs display driver up
and running before the boot medium is scanned.
This is just to enhance the user-experience while booting the machine.
TEST: U-Boot logo, version, log output and the U-Boot shell is visible
on the display device.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
qemu's sbsa-ref is always using a 64bit CPU and the PCI prefetch MMIO
window is located above 4GiB, thus always enable SYS_PCI_64BIT.
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Vikas has left STMicroelectronics several years ago.
Put myself as maintainer of stm32f746-disco board.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Remove the priv member from struct bb_miiphy_bus and its assignment
from drivers. This turns struct bb_miiphy_bus int struct mii_dev
wrapper, to be cleaned up next.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Access to MDIO bus private data can be provided by both
struct mii_dev .priv member and struct bb_miiphy_bus .priv
member, use the former directly and remove .priv from the
later. Drop unused bb_miiphy_getbus(). This removes any
dependency on struct bb_miiphy_bus from the miiphybb code,
except for helper functions which will be removed later.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
