5 Commits

Author	SHA1	Message	Date
Marek Vasut	6af4e2782d	usb: xhci: zynqmp: Removing unused function usb_phy_reset ... This patch removes unsued function usb_phy_reset, rather common function dwc3_phy_reset is used. Signed-off-by: Marek Vasut <marex@denx.de>	2015-12-07 00:15:00 +01:00
Nikhil Badola	667f4dd90f	drivers: usb: fsl: Implement Erratum A-009116 for XHCI controller ... This adjusts (micro)frame length to appropriate value thus avoiding USB devices to time out over a longer run Signed-off-by: Nikhil Badola <nikhil.badola@freescale.com>	2015-07-22 08:55:45 +02:00
Ramneek Mehresh	dc9cdf859e	usb: dwc3: Add DWC3 controller driver support ... Add support for DWC3 XHCI controller driver Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>	2015-07-22 08:55:44 +02:00
WingMan Kwok	bc0e8d7c5d	keystone: usb: add support of usb xhci ... Add support of usb xhci. xHCI controls all USB speeds of the Host mode, that is, the SS through the SS PHY, as well as the HS, FS, and LS through the USB2 PHY. xHCI replaces and supersedes all previous host HCIs (HS-only EHCI, FS/LS OHCI and UHCI), and is therefore not backwards compatible with any of them. The USB3SS’s USB Controller is fully compliant with xHC. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: WingMan Kwok <w-kwok2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>	2014-10-23 11:27:04 -04:00
Vivek Gautam	13194f3b5f	USB: XHCI: Add xHCI host controller support for Exynos5 ... This adds driver layer for xHCI controller in Samsung's exynos5 soc. This interacts with xHCI host controller stack. Signed-off-by: Vikas C Sajjan <vikas.sajjan@samsung.com> Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Cc: Julius Werner <jwerner@chromium.org> Cc: Simon Glass <sjg@chromium.org> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Dan Murphy <dmurphy@ti.com> Cc: Marek Vasut <marex@denx.de>	2013-10-20 23:42:38 +02:00