3 Commits

Author	SHA1	Message	Date
Michal Simek	174d728471	arm64: zynqmp: Switch to amd.com emails ... Update my and DPs email address to match current setup. Signed-off-by: Michal Simek <michal.simek@amd.com> Link: https://lore.kernel.org/r/aba5b19b9c5a95608829e86ad5cc4671c940f1bb.1688992543.git.michal.simek@amd.com	2023-07-21 09:00:38 +02:00
Oleksandr Suvorov	d7fcbfc19b	fpga: xilinx: add bitstream flags to driver desc ... Store a set of supported bitstream types in xilinx_desc structure. It will be used to determine whether an FPGA image is able to be loaded with a given driver. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@foundries.io> Tested-by: Ricardo Salveti <ricardo@foundries.io> Tested-by: Adrian Fiergolski <adrian.fiergolski@fastree3d.com> Link: https://lore.kernel.org/r/20220722141614.297383-4-oleksandr.suvorov@foundries.io Signed-off-by: Michal Simek <michal.simek@amd.com>	2022-07-26 09:34:21 +02:00
Siva Durga Prasad Paladugu	26e054c943	arm64: versal: fpga: Add PL bit stream load support ... This patch adds PL bitstream load support for Versal platform. The PL bitstream is loaded by making an SMC to ATF which in turn communicates with platform firmware which configures and loads PL bitstream on to PL. Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>	2019-10-08 09:11:14 +02:00