10181 Commits

Author SHA1 Message Date
Jagan Teki
a48c4eb6a7 spi: atmel_spi: Use BIT macro
Replace numerical bit shift with BIT macro
in atmel_spi

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31

Cc: Bo Shen <voice.shen@atmel.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-27 23:19:29 +05:30
Jagan Teki
9cf2ffb3c3 spi: zynq_[q]spi: Use GENMASK macro
GENMASK macro used on zynq_spi.c and zynq_qspi.c

GENMASK is used to create a contiguous bitmask([hi:lo]).
Ex: (0x7 << 3) => GENMASK(5, 3)

Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-27 23:19:15 +05:30
Jagan Teki
736b4df15d spi: zynq_[q]spi: Use BIT macro
Used BIT macro on zynq_spi.c and zynq_qspi.c

:%s/(1 << nr)/BIT(nr)/g
where nr = 0, 1, 2 .... 31

Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-27 23:18:48 +05:30
Ryan Harkin
622b95274e cfi_flash: use specific width types for cword
This patch changes the cword union to use specific length types that are
architecture indepented.

This patch also renames the members of the cword union to represent
their usage, i.e.:

    c  -> w8
    s  -> w16
    l  -> w32
    ll -> w64

Where "w" stands for "width" in bits.

I discovered this problem when enabling CFI flash on vexpress64.
cword.l was an unsigned long int, but it was intended to be 32 bits wide.
Unfortunately, it's 64-bits wide on a 64-bit system, meaning that a
64-bit system fails when attempting to use 32-bit wide CFI flash parts.

Similar problems also existed with the other cword sizes.

Signed-off-by: Ryan Harkin <ryan.harkin@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Stefan Roese <sr@denx.de>
2015-10-27 11:51:53 +01:00
Heiko Schocher
248f260cbd UBI: Fastmap: Fix PEB array type
The PEB array is an array of __be32, so let's fix the
scan_pool() prototype accordingly.

Signed-off-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-26 09:22:50 +01:00
Heiko Schocher
0195a7bb36 ubi,ubifs: sync with linux v4.2
sync with linux v4.2

commit 64291f7db5bd8150a74ad2036f1037e6a0428df2
Author: Linus Torvalds <torvalds@linux-foundation.org>
Date:   Sun Aug 30 11:34:09 2015 -0700

    Linux 4.2

This update is needed, as it turned out, that fastmap
was in experimental/broken state in kernel v3.15, which
was the last base for U-Boot.

Signed-off-by: Heiko Schocher <hs@denx.de>
Tested-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
2015-10-26 09:22:36 +01:00
Heiko Schocher
5219db8ae8 linux, compat: add missing definitions for ubi
add missing definitions for the ubi/ubifs sync
with linux 4.2, also change "#define kfree ..."
into a static inline, so prevent ubi compile error:

   CC      drivers/mtd/ubi/fastmap.o
drivers/mtd/ubi/fastmap.c: In function 'scan_pool':
drivers/mtd/ubi/fastmap.c:475:3: error: called object 'free' is not a function

Signed-off-by: Heiko Schocher <hs@denx.de>
2015-10-26 09:22:02 +01:00
Jagan Teki
e5e0d68f27 spi: zynq_qspi: Minor cleanups
- Use __func__ on debug
- Removed unnecessary comment
- Fix function name in debug as zynq_qspi_xfer instead of spi_xfer

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
baaaa7539c sf: Add FSR support to spi_flash_cmd_wait_ready
This patch adds flag status register reading support to
spi_flash_cmd_wait_ready.

Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Hou Zhiqiang <B48286@freescale.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
4efad20a17 sf: Update status reg check in spi_flash_cmd_wait_ready
Current flash wait_ready logic is not modular to add new
register status check, hence updated the status check for
adding few more register checks in future.

Below are the sf speed runs with 'sf update' on whole flash, 16MiB.

=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.564s, speed 289262 B/s

=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 62.549s, speed 275036 B/s

=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 61.276s, speed 284359 B/s

Cc: Simon Glass <sjg@chromium.org>
Cc: Marek Vasut <marex@denx.de>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Tom Warren <twarren@nvidia.com>
Cc: Tom Rini <trini@konsulko.com>
Tested-by: Jagan Teki <jteki@openedev.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
1fabefddfc sf: Make flash->flags use for generic usage
Use the flash->flags for generic usage, not only for dm-spi-flash,
this will be used for future flag additions.

[Correct the spi flash flags detect logic]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
70ccf59406 sf: Optimize BAR write code
Optimized spi-flash bar writing code and also removed
unnecessary bank_sel in read_ops.

Cc: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
234a9e1c60 sf: Add spi_flash_read_bar
Add spi_flash_read_bar function for reading bar and
discovering bar commands at probe time.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
3c75ade2b3 sf: Return bank_sel, if flash->bank_curr == bank_sel
If computed bank_sel is same as flash->bank_curr which is
computed at probe time, then return the bank_sel instead of zero.

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
86e99b9861 spi: zynq_spi: Remove unneeded headers
- Removed unneeded inclusion of header files
- Add "Xilinx" on license text

Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
2775e91835 spi: zynq_qspi: Fix to configure CPOL, CPHA mask
priv->mode is initialized when .set_speed triggers
with mode value, so checking mode for configuring
CPOL, CPHA using priv->mode is invalid hence use
mode from .set_speed argument, and at the end
priv->mode will initialized with mode.

This patch also replaces formatting string to use
speed instead of mode in .set_speed ops.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
720e5e54eb sf: params: Add IS25LP128 part support
Added support for IS25LP128 flash part.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:03 +05:30
Jagan Teki
65a75b6f7a sf: params: Add IS25LP064 part support
Added support for IS25LP064 flash part.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
24ea6ac892 sf: params: Add IS25LP032 part support
Added support for IS25LP032 flash part.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Cc: Michal Simek <michal.simek@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
191269987c spi: zynq_spi: Store cs value into private data
Store cs value into private data and use it while activating
chipselect instead of passing through function.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
dda6241a1d spi: zynq_spi: Rename baudrate divisor mask name
Rename ZYNQ_SPI_CR_BRD_MASK to ZYNQ_SPI_CR_BAUD_MASK
for more readable.

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
46ab8a6a13 spi: zynq_spi: Add config reg shift named macros
Update the numerical values for baudrate and chipselect
with config reg shift named macro's

Signed-off-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
78a025ace8 spi: Kconfig: Add Zynq QSPI controller entry
Add Zynq QSPI controller Kconfig entry.

Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Cc: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
2015-10-25 20:17:02 +05:30
Jagan Teki
46d0a9913c spi: Add zynq qspi controller driver
Added zynq qspi controller driver for Xilinx Zynq APSOC,
this driver is driver-model driven with devicetree support.

=> sf probe
SF: Detected S25FL128S_64K with page size 256 Bytes, erase size 64 KiB, total 16 MiB
=> mw.b 0x100 0xCC 0x1000000
=> sf update 0x100 0x0 0x1000000
device 0 whole chip
16777216 bytes written, 0 bytes skipped in 59.842s, speed 289262 B/s
=> sf read 0x3000000 0x0 0x1000000
device 0 whole chip
SF: 16777216 bytes @ 0x0 Read: OK
=> cmp.b 0x3000000 0x100 0x1000000
Total of 16777216 byte(s) were the same

Signed-off-by: Jagan Teki <jteki@openedev.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Michal Simek <michal.simek@xilinx.com>
Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Tested-by: Jagan Teki <jteki@openedev.com>
2015-10-25 20:17:01 +05:30
Thomas Huth
310ae37edb Fix bad return value checks (detected with Coccinelle)
In the "Getting Started with Coccinelle - KVM edition" presentation that
has been held by Julia Lawall at the KVM forum 2015 (see the slides at
http://events.linuxfoundation.org/sites/events/files/slides/tutorial_kvm_0.pdf),
she pointed out some bad return value checks in U-Boot that can be
detected with Coccinelle by using the following config file:

@@
identifier x,y;
identifier f;
statement S;
@@
x = f(...);
(
 if (x < 0) S
|
 if (
-     y
+     x
 < 0) S
)

This patch now fixes these issues.

Signed-off-by: Thomas Huth <huth@tuxfamily.org>
2015-10-24 13:50:30 -04:00
Bernhard Nortmann
13cfbe5135 allow LED initialization without STATUS_LED_BOOT
For current U-Boot to initialize status LEDs via status_led_init(), it
is required to have both CONFIG_STATUS_LED and STATUS_LED_BOOT defined.
This may be a particular concern with GPIO LEDs, where __led_init() is
required to correctly set up the GPIO (gpio_request and
gpio_direction_output). Without STATUS_LED_BOOT the initialization isn't
called, which could leave the user with a non-functional "led" command -
due to the fact that the LED routines in gpio_led.c use gpio_set_value()
just fine, but the GPIO never got set up properly in the first place.

I think having CONFIG_STATUS_LED is sufficient to justify a
corresponding call to status_led_init(), even with no STATUS_LED_BOOT
defined. To do so, common/board_r.c needs call that routine, so it now
is exposed via status_led.h.

Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
[trini: Add dummy __led_init to pca9551_led.c]
Signed-off-by: Tom Rini <trini@konsulko.com>
2015-10-24 13:50:02 -04:00
Bernhard Nortmann
d375ebbcb6 add generic stubs for GPIO LEDs
For boards that support LEDs driven via GPIO (CONFIG_GPIO_LED),
it may be useful to have some generic stubs (wrapper functions)
for the "colored" LEDs.

This allows defining STATUS_LED_* values directly to GPIO numbers,
e.g.: #define STATUS_LED_GREEN	248 /* = PH24 */

To keep those optional, it's probably best to introduce an additional
configuration setting. I've chosen CONFIG_GPIO_LED_STUBS for that.
Placing the code in drivers/misc/gpio_led.c also ensures that it
automatically depends on CONFIG_GPIO_LED too.

Signed-off-by: Bernhard Nortmann <bernhard.nortmann@web.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23 12:15:28 -04:00
Simon Glass
2419cd16a1 dm: tpm: Drop CONFIG_DM_TPM
Now that all TPM drivers use driver model, we can drop the special driver
model CONFIG option.

Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Christophe Ricard<christophe-h.ricard@st.com>
2015-10-23 09:42:28 -06:00
Christophe Ricard
3e7d940bb6 dm: tpm: Every TPM drivers should depends on DM_TPM
Every TPM drivers should now depends on DM_TPM and not only TPM.

Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 09:42:28 -06:00
Christophe Ricard
c2b0f600a1 dm: tpm: Remove every compilation switch for TPM driver model
As every TPM drivers support UCLASS_TPM, we can only rely on DM_TPM
functions.

This simplify a bit the code.

Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 09:42:28 -06:00
Christophe Ricard
302c5dba0a dm: tpm: Add Driver Model support for tpm_atmel_twi driver
tpm_atmel_twi can fit perfectly to the new UCLASS_TPM class.

Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 09:42:28 -06:00
Christophe Ricard
0766ad2f7f dm: tpm: Move tpm_tis_i2c to tpm_i2c_infineon
As there is no TCG specification or recommendation for i2c TPM 1.2,
move tpm_tis_i2c driver to tpm_i2c_infineon. Other tpm vendors like Atmel
or STMicroelectronics may have a different transport protocol for i2c.

Signed-off-by: Christophe Ricard <christophe-h.ricard@st.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 09:42:28 -06:00
Simon Glass
bcbe3d1579 dm: Rename dev_get_parentdata() to dev_get_parent_priv()
The current name is inconsistent with other driver model data access
functions. Rename it and fix up all users.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
2015-10-23 09:42:28 -06:00
Lokesh Vutla
6c2441c1d3 dm: keystone: serial: Add driver model support
Add driver model support for keystone serial driver.

Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 10:53:46 -04:00
Thomas Chou
96fa1e4385 net: convert altera_tse to driver model and phylib
Convert altera_tse to driver model and phylib.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23 14:55:48 +08:00
Thomas Chou
ca844dd8c5 nios2: convert altera sysid to driver model
Convert altera sysid to driver model with misc uclass.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23 07:37:03 +08:00
Thomas Chou
4395e06eb9 dm: implement a Miscellaneous uclass
Implement a Miscellaneous uclass with generic read or
write operations. This class is used only for those
do not fit other more general classes.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 07:37:03 +08:00
Thomas Chou
2e2da4c67d serial: remove altera serial initializations
Both altera_jtag_serial_initialize() and
altera_serial_initialize() are no longer used after
they are converted to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
2015-10-23 07:37:03 +08:00
Thomas Chou
a54915d8a1 nios2: convert altera timer to driver model
Convert altera timer to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
2015-10-23 07:37:03 +08:00
Thomas Chou
c8a7ba9e6a dm: implement a Timer uclass
Implement a Timer uclass to work with lib/time.c.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Simon Glass <sjg@chromium.org>
2015-10-23 07:37:03 +08:00
Thomas Chou
88d5ecf4b9 nios2 : convert altera_pio to driver model
Convert altera_pio to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Chin Liang See <clsee@altera.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23 07:37:03 +08:00
Thomas Chou
15a56f9cb7 spi : convert altera_spi to driver model
Convert altera_spi to driver model

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Jagan Teki <jteki@openedev.com>
2015-10-23 07:36:56 +08:00
Thomas Chou
da2f838d8a nios2: convert altera_uart to driver model
Convert altera_uart to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Marek Vasut <marex@denx.de>
2015-10-23 07:36:51 +08:00
Thomas Chou
220e8021af nios2: convert altera_jtag_uart to driver model
Convert altera_jtag_uart to driver model.

Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-23 07:36:37 +08:00
Mugunthan V N
1ed0f85faf drivers: gpio: omap: add support for parsing additional gpio parameters
With DM_GPIO, gpio parameters like ACTIVE_(LOW/HIGH) are to be
parsed in xlate gpio drivers-ops. Since xlate is not implemented
in omap_gpio driver, the driver considers all gpio to be
ACTIVE_HIGH which is the default case and fails to return actual
gpio status for ACTIVE_LOW gpios. So adding .xlate ops to
omap_gpio.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2015-10-22 14:44:02 -04:00
Mugunthan V N
e5a098b5cc drivers: serial: serial_omap: add comaptibles for all ti platforms
Adding compatibles for am335x, am437x and dra7 platforms.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22 14:43:58 -04:00
Mugunthan V N
3a64845e9d drivers: serial: serial_omap: populate default clock frequency when not found in dt
In some platforms like am437x, serial node is not populated with
clock-frequency node. So in that case have a default clock-clock
frequency.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22 14:43:58 -04:00
Mugunthan V N
a9d6a7e23a drivers: mmc: omap_hsmmc: convert driver to adopt device driver model
adopt omap_hsmmc driver to device driver model

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-10-22 14:43:57 -04:00
Roger Quadros
3b68939fa0 ARM: k2g: add SD card and eMMC support
Add MMC support for k2g

Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Tested-by: Mugunthan V N <mugunthanvnm@ti.com>
2015-10-22 14:22:25 -04:00
Mugunthan V N
997a318b30 driver: net: keystone_net: removing unused code
remove unused code as the same is achieved when configuring sgmii
and link status is verifed.

Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
2015-10-22 14:22:24 -04:00