769 Commits

Author SHA1 Message Date
Heinrich Schuchardt
33355013ff qfw/acpi: do not zero out XSDT address
On RISC-V QEMU provides an XSDT table. The RSDP table points to it.
We must not zero out this pointer because otherwise no ACPI table can be
found.

Fixes: 15ca25e31ed5 ("x86: emulation: Support BLOBLIST_TABLES properly")
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-11-06 23:26:27 +01:00
Casey Connolly
b95df6ed8c misc: introduce Qcom GENI wrapper
Qualcomm peripherals like UART, SPI, I2C, etc are all exposed under a
common GENI Serial Engine wrapper device. Replace the stub driver we use
for this currently with a full-on misc device and implement support for
loading peripheral firmware.

Each of the peripherals has it's own protocol-specific firmware, this is
stored on the internal storage of the device with a well-known partition
type GUID.

To support this, GENI will bind peripherals in two stages. First the
ones that already have firmware loaded (such as the serial port) are
bound in the typical way. But devices that require firmware loading are
deferred until EVT_LAST_STAGE_INIT. At this point we can be sure that
the storage device is available, so we load the firmware and then bind
and probe the remaining children.

Child devices are expected to determine if firmware loading is necessary
and call qcom_geni_load_firmware().

Since Linux currently doesn't support loading firmware (and firmware may
not be available), we probe all GENI peripherals to ensure that they
always load firmware if necessary.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://patch.msgid.link/20250714-geni-load-fw-v5-3-5abbc0d29838@linaro.org
Signed-off-by: Casey Connolly <kcxt@postmarketos.org>
2025-10-30 11:04:51 -06:00
Tom Rini
b901d8f15c x86: Rename arch/x86/include/asm/pnp_def.h to include/pnp_def.h
There is nothing x86-centric in this include file, and moving it will
allow for some drivers to be compile-tested on sandbox.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-28 12:24:03 -06:00
Marek Vasut
8aa57934e5 fw_loader: Split from fs_loader into separate library file
The script based firmware loader does not use anything from the
fs_loader implementation. Separate it into its own library source
file and convert the mediatek PHY to use this separate code. This
should reduce the amount of code that is pulled in alongside the
firmware loader, as the FS loader is no longer included.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-10-09 13:50:40 -06:00
Tom Rini
1d77a98b3d misc: ti: k3: Tighten K3_FUSE dependencies
This driver cannot build without access to some platform specific header
files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-10-08 16:13:02 -06:00
Marek Vasut
863502de82 misc: fs_loader: Use buffer pointer in request_firmware_into_buf_via_script()
Use plain buffer pointer in request_firmware_into_buf_via_script()
instead of a pointer to pointer. The later is not necessary as the
request_firmware_into_buf_via_script() does not modify the buffer
pointer. Update the mediatek driver to match.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
2025-10-07 17:12:24 -06:00
John Ripple
b717a4090f imx8: Add ahab_commit command
The ahab_commit command allows the user to commit into the SECO fuses
that control the SRK key revocation information. This is used to Revoke
compromised SRK keys.

To use ahab_commit, the boot container must be built with an SRK
revocation bit mask that is not 0x0. For the SPSDK provided by NXP, this
means setting the 'srk_revoke_mask' option in the config file used to
sign the boot container. The 'ahab_commit 0x10' can then be used to commit
the SRK revocation information into the SECO fuses.

Signed-off-by: John Ripple <john.ripple@keysight.com>
2025-09-20 17:45:39 -03:00
Tom Rini
464800d91b Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/27673

- Switch to upstream devicetree for TH1520 platform
- Remove fdt_high env variable
- Support SMP on RISC-V cores with Zalrsc only
- Make MPFS Generic
- riscv: dts: starfive: prune redundant jh7110-common
2025-09-20 10:02:00 -06:00
Jamie Gibbons
7fa1ee7fb9 misc: mpfs_syscontroller: add functions to read device tree overlays
Include functions to use the system controller to read the device tree
overlays which supports auto update functionality.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-09-19 19:22:42 +08:00
Tom Rini
44ac43c01b Merge patch series "Add support for MediaTek MT7987/MT7988 built-in 2.5Gb ethernet PHY (v4)"
Weijie Gao <weijie.gao@mediatek.com> says:

This patch adds PHY driver for MediaTek MT7987/MT7988 built-in 2.5Gb
ethernet PHY.

[trini: Change 'tristate' Kconfig to 'bool']

Link: https://lore.kernel.org/r/cover.1757315849.git.weijie.gao@mediatek.com
2025-09-18 15:43:56 -06:00
Weijie Gao
b4b266fc13 net: phy: Add MediaTek built-in 2.5Gb ethernet PHY driver
The MediaTek MT7987/MT7988 SoCs features a built-in 2.5Gb PHY
connected to GMAC1. The PHY supports 10/100/1000/2500 Mbps
full-duplex only.

The PHY requires one or two firmware files. Firmware for MT7988 has
already been added to upstream: mediatek/mt7988/i2p5ge-phy-pmb.bin.
MT7987 has two firmware files which will be add to upstream later:
i2p5ge-phy-pmb.bin and i2p5ge-phy-DSPBitTb.bin.

Environment variable can be set for firmware data loading:
mt7987_i2p5ge_load_pmb_firmware for i2p5ge-phy-pmb.bin
mt7987_i2p5ge_load_dspbit_firmware for i2p5ge-phy-DSPBitTb.bin
mt7988_i2p5ge_load_pmb_firmware for i2p5ge-phy-pmb.bin

This driver allows dedicated weak functions to be overridden by
board to provide the firmware data:
mt7987_i2p5ge_get_fw() for MT7987
mt7988_i2p5ge_get_fw() for MT7988

To enable the PHY, add the following not to device tree:
&eth1 {
	status = "okay";
	phy-mode = "xgmii";
	phy-handle = <&phy15>;

	phy15: ethernet-phy@15 {
		compatible = "ethernet-phy-ieee802.3-c45";
		reg = <15>;
		phy-mode = "xgmii";
	};
};

Signed-off-by: Sky Huang <SkyLake.Huang@mediatek.com>
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Weijie Gao
5b1d3d83d6 misc: fs_loader: allow using long script name in request_firmware_into_buf_via_script()
Use cmd_process() to remove the length limit of script name used for
run_command().

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Weijie Gao
6358568968 misc: fs_loader: allow returning actual firmware data size in request_firmware_into_buf_via_script()
It's important to return the actual firmware data size as some
firmware files may have no checksum and need the size as the only
way for firmware validation check.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-09-18 15:43:05 -06:00
Alif Zakuan Yuslaimi
a3f0a8e7a1 misc: fs_loader: Initialize actread variable
Initialize the actread variable to prevent undefined behavior
that can occur if the variable is used before being assigned a
value.

This will help to prevent potential issues, especially if
actread is used (e.g., read, incremented, or returned) before
being explicitly set elsewhere in the code.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
2025-09-09 10:30:51 -06:00
Lucien.Jheng
b5da53046c misc: fs_loader: Add request_firmware_into_buf_via_script() for flexible firmware loading via U-Boot script
This commit introduces a new API,
request_firmware_into_buf_via_script(), to the fs_loader framework.
This function allows firmware to be loaded into memory using
a user-defined U-Boot script, providing greater flexibility for
firmware loading scenarios that cannot be handled by static file
paths or device/partition selection alone.

Key features:
- The API runs a specified U-Boot script (by name), which is responsible
  for loading the firmware into memory by any means (e.g., load from MMC, USB, network, etc.).
- The script must set two environment variables: 'fw_addr'
  (the memory address where the firmware is loaded) and
  'fw_size' (the size of the firmware in bytes).
- The function validates these variables, copies the firmware into a newly
  allocated buffer (using memdup), and returns the pointer
  via the provided double pointer argument.
- The maximum allowed firmware size is checked to prevent buffer overflows.
- The environment variables are cleared after use to avoid stale data.
- Detailed error messages are provided for all failure conditions to aid debugging.

Usage example:
1. Define a U-Boot script in the environment that loads the firmware
   and sets the required variables:
   => env set my_fw_script 'load mmc 0:1 ${loadaddr} firmware.bin &&
   env set fw_addr ${loadaddr} && env set fw_size ${filesize}'

2. In your code, call the new API:
   void *fw_buf = NULL;
   int ret = request_firmware_into_buf_via_script(&fw_buf, 0x46000000, "my_fw_script");
   if (ret < 0)
		return ret;

This approach allows board integrators and users to customize the firmware
loading process without modifying the source code,
simply by changing the script in the U-Boot environment.

Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
[trini: Fix printf of size_t needing to use %zx]
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-08-26 14:39:15 -06:00
Tom Rini
fceb37d802 Prepare v2025.10-rc3
-----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQTzzqh0PWDgGS+bTHor4qD1Cr/kCgUCaKy0XgAKCRAr4qD1Cr/k
 CnAbAQCbWzxLk9LjwyzD+ZsH+nrWs3hFf++r8Wh7BCxWTiTPrgD/RyxHT4TUE8TF
 7hMwpXyPwkkzzQeQGf+0vqkZhhYO7QM=
 =C9fL
 -----END PGP SIGNATURE-----

Merge tag 'v2025.10-rc3' into next

Prepare v2025.10-rc3
2025-08-25 13:28:49 -06:00
Jim Liu
9878805816 misc: npcm_host_intf: Disable pending KCS/BPC interrupts
If there is an unhandled KCS/BPC pending interrupt after reboot,
the KCS/BPC Linux driver may trigger interrupts immediately upon
registering the irq. However, since the driver is not yet initialized
to handle them, this can lead to unexpected behavior.

To prevent this, disable KCS/BPC interrupts in u-boot to avoid pending
interrupts from being raised before the Linux driver is fully initialized.

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2025-08-18 16:40:24 -06:00
Jim Liu
121927e37b misc: npcm_host_intf: Add Arbel eSPI workaround
Enabling an eSPI channel(e.g. Peripheral Channel) during
an eSPI transaction might cause the BMC eSPI module to
transition to a wrong state and therefore respond with
FATAL_ERROR on incoming transaction.
Add workaround to avoid the module getting into the wrong
state.

Signed-off-by: Stanley Chu <yschu@nuvoton.com>
Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2025-08-18 16:40:23 -06:00
Jamie Gibbons
b7a0ad16f9 misc: add PolarFire SoC system controller
This driver provides an interface to access the functions of the system
controller on the Microchip PolarFire SoC.
This driver includes functions to use the system controller to read
the device serial number.

Signed-off-by: Jamie Gibbons <jamie.gibbons@microchip.com>
Acked-by: Leo Yu-Chi Liang <ycliang@andestech.com>
2025-08-14 15:33:00 +08:00
Andrew Goodbody
5275b5612b imx: scu_api: Remove unnecessary NULL check
In sc_seco_secvio_dgo_config there is a check for data being NULL but
this occurs after data has already been dereferenced. All callers of the
function provide a valid pointer for data so no need for the NULL check.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-08-07 08:15:45 -03:00
Andrew Goodbody
6e1cc5d861 socfpga_dtreg: Ensure reg is initialised before use
In socfpga_dtreg_probe it is possible that if mask is 0 then reg will
not be assigned to before first use. Refactor the code slightly to
ensure that reg is always assigned to and remove a piece of duplicated
code.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2025-07-30 17:45:30 +08:00
Tom Rini
896f570d56 Merge patch series "Add support for K3 BIST"
Neha Malcom Francis <n-francis@ti.com> says:

This series implements a driver for the BIST (Built-In Self Test) module
for K3 devices. The BIST driver must ideally support triggering of BIST
tests, both PBIST (Memory BIST) and LBIST (Logic BIST) on a core. Both
tests are destructive in nature. Please see links [1] and [2] for
further information regarding the two.

At boot up, BIST is executed by hardware for the MCU domain
automatically as part of HW POST. So BIST has been checked only for the
MCU domain when U-Boot comes up in the usual U-Boot to Linux boot flow.
To facilitate the use-case where some safe firmware is intended to be
run on a safe core, it is best to have triggered the BIST tests on that
core. As an example, we take triggering the BIST tests on the MAIN R52_x
cores. The triggering patch is kept as DONOTMERGE.

The general procedure for triggering BIST on a core is:
	1. Power on the core under test following a sequence
	2. Trigger the BIST test
	3. Reset the core under test following a sequence

BIST tests are triggered from A72 SPL where the DM (Device Manager
firmware that handles power management) is already up and can perform
these power sequences for us.

Boot logs (with LOG_DEBUG and CONFIG_K3_BIST enabled) and DT node kept (already
merged to ti-k3-dts-next [3]):
https://gist.github.com/nehamalcom/3fed504d038b54e3e05ba3874d73d603

[1] https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/sdl/sdl_docs/userguide/j721e/modules/pbist.html#introduction
[2] https://software-dl.ti.com/jacinto7/esd/processor-sdk-rtos-jacinto7/latest/exports/docs/sdl/sdl_docs/userguide/j721e/modules/lbist.html#introduction
[3] https://lore.kernel.org/all/175205725858.918402.3771835070085533874.b4-ty@ti.com/

Link: https://lore.kernel.org/r/20250716062156.2564297-1-n-francis@ti.com
2025-07-24 13:30:20 -06:00
Neha Malcom Francis
b56066e03c drivers: misc: k3_bist: Add K3 BIST driver
Add a driver for the BIST module that support triggering of both PBIST
(Memory BIST) and LBIST (Logic BIST) tests. Also expose the relevant
operations and functions that would be required for an end user to
trigger the tests.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
2025-07-24 11:50:21 -06:00
Tom Rini
bf9a78f109 misc: Remove DS4510 driver
As no platforms use this driver anymore and it's not been converted from
to DM_I2C for use, remove it.

Fixes: ed7fe2bee12a ("ppc: Remove xpedite boards")
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-18 12:22:17 -06:00
Tom Rini
bdf443ffd5 drivers: misc: Remove pca9551_led driver
This driver has not been converted to DM_I2C and the last platform that
used it was removed as well. Remove the driver.

Fixes: 4bbcec08ebec ("arm: Remove mx6dlarm2 board")
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-18 12:22:13 -06:00
Tom Rini
14d20133a8 misc: Tighten requirements on IHS_FPGA driver
This driver requires that the gdsys legacy driver option also be enabled
in order to build. Express that requirement in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-18 12:22:05 -06:00
Tom Rini
d4a9ce26cb nxp: Move FSL_SEC_MON related options to arch/Kconfig.nxp
The options related to FSL_SEC_MON are part of the chain of trust
related options and should be under that menu, so move it there.
Furthermore we don't need to prompt for the driver itself but do need to
allow for configuration of the monitor endianess.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-07-17 09:57:39 -03:00
Andrew Goodbody
bae3a34cb9 cros_ec: sandbox: Use correct value for number of slots
In the definition of struct ec_state the number of slots that are
created is VSTORE_SLOT_COUNT (==4) but the value of req->slot is
checked against EC_VSTORE_SLOT_MAX (==32) so this can lead to memory
access beyond that allocated.
Instead change the size check to use VSTORE_SLOT_COUNT to ensure it
matches what has actually been allocated.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2025-07-14 15:16:30 -06:00
Tom Rini
b284c34725 arm: imx: Remove the rest of i.MX31 support
With the removal of the last i.MX31 platform we can remove the rest of
the underlying architecture code as well.

Fixes: f247354708ec ("arm: Remove mx31pdk board")
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Peng Fan <peng.fan@nxp.com>
2025-07-10 08:02:11 -03:00
Gabriel Fernandez
0994a627c2 reset: stm32mp25: add stm32mp25 reset driver
Implement STM32MP25 reset drivers using stm32-core-reset API.
This reset stm32-reset-core API and will be able to use DT binding
index started from 0.

This patch also moves legacy reset into stm32 directory reset.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-06-11 09:42:55 +02:00
Justin Klaassen
83b1d04765 rockchip: io-domain: Add CONFIG_SPL_ROCKCHIP_IODOMAIN
Allows use of the Rockchip IO-domain driver in SPL to configure
the GPIO to match the voltage supplied by specific regulators
(e.g. "vcc_sdio").

Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06 17:21:54 +08:00
Justin Klaassen
81a26131bd rockchip: io-domain: Add debug logging for regulators during probe
Log the value of the regulators during initialization of the IO-domain
driver to aid in debugging GPIO voltage configuration problems.

Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-06-06 17:21:54 +08:00
Chen-Yu Tsai
64f670f75f rockchip: io-domain: Enable by default for all supported SoCs
The IO domain driver controls the I/O voltage for various pins,
MMC included.

Enable it by default for all supported Rockchip SoCs.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Paul Kocialkowski <paulk@sys-base.io>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
2025-05-06 16:12:06 +08:00
Tom Rini
7bf7522383 cros_ec_sandbox.c: Drop spi.h include
As this driver needs to use the special sandbox <asm/malloc.h> header
rather than normal malloc, it must be careful of the includes it brings
in. It does not need <spi.h> for anything, so drop it.

Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-28 13:25:00 -06:00
Heiko Stuebner
a252b5bed5 rockchip: otp: Add support for RK3576
Add support for RK3576 compatible.
The RK3576 OTP uses the same read mechanism as the RK3588, just
with different values for offset and size.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-04-23 22:12:05 +08:00
Jonas Karlman
da9ded5197 rockchip: otp: Add support for RK3528
Add support for the OTP controller in RK3528. The OTPC is similar to the
OTPC in RK3568 and can use the same ops for reading OTP data.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-04-23 22:12:04 +08:00
Tom Rini
407d68638f Merge patch series "Switch to using $(PHASE_) in Makefiles"
Tom Rini <trini@konsulko.com> says:

This series switches to always using $(PHASE_) in Makefiles when
building rather than $(PHASE_) or $(XPL_). It also starts on documenting
this part of the build, but as a follow-up we need to rename
doc/develop/spl.rst and expand on explaining things a bit.

Link: https://lore.kernel.org/r/20250401225851.1125678-1-trini@konsulko.com
2025-04-11 12:16:49 -06:00
Tom Rini
302b41d539 Kbuild: Always use $(PHASE_)
It is confusing to have both "$(PHASE_)" and "$(XPL_)" be used in our
Makefiles as part of the macros to determine when to do something in our
Makefiles based on what phase of the build we are in. For consistency,
bring this down to a single macro and use "$(PHASE_)" only.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-11 12:16:44 -06:00
Heinrich Schuchardt
253af704c5 smbios: select CONFIG_BLOBLIST
Since commit 53d5a221632e ("emulation: Use bloblist to hold tables")
`make qemu-riscv64_smode_defconfig acpi.config && make` fails with

    drivers/misc/qfw_smbios.c:93:(.text.qfw_evt_write_smbios_tables+0xe):
    undefined reference to `bloblist_add'

Build with bloblist support.

Fixes: 53d5a221632e ("emulation: Use bloblist to hold tables")
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2025-04-11 13:27:35 +02:00
Tom Rini
ff61d6bfd1 Merge branch 'next'
Note that this undoes the changes of commit cf6d4535cc4c ("x86:
emulation: Disable bloblist for now") as that was intended only for the
release due to time.
2025-04-08 11:43:23 -06:00
Tom Rini
c5032bf3f6 Merge patch series "cmd: fuse: Introduce fuse writebuff sub-system and clean up"
Harsha Vardhan V M <h-vm@ti.com> says:

This patch series introduces the fuse writebuff sub-system command and
makes improvements to the existing fuse implementation by removing the
custom string functions. The patches are required to be applied in
sequence.

The series consists of the following changes:
Patch 1 removes custom string functions and replaces them with standard
string functions.
Patch 2 introduces fuse.rst documentation for fuse commands.
Patch 3 introduces the fuse writebuff sub-system command, allowing to
write a structured buffer in memory to fuses, and implementing the
necessary function calls.
Patch 4 enables the fuse sub-system in the K3 platform.
Patch 5 updates the fuse.rst documentation to include details about the
new fuse writebuff command.

These changes aim to improve the fuse sub-system by the removal of
custom string functions and the addition of the fuse writebuff
command improves fuse programming workflows by allowing to write a
structured buffer in memory to efuses.

Link: https://lore.kernel.org/r/20250319084714.335777-1-h-vm@ti.com
2025-04-04 12:25:11 -06:00
Harsha Vardhan V M
ed5f2e5bed drivers: k3_fuse: Add fuse sub-system func calls
Add K3_FUSE config option to add and enable fuse sub-system
implementation function calls.

Signed-off-by: Harsha Vardhan V M <h-vm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2025-04-04 12:25:02 -06:00
Simon Glass
15ca25e31e x86: emulation: Support BLOBLIST_TABLES properly
The existing QEMU implementation mostly ignored BLOBLIST_TABLES and
allocates the bulk of the tables with malloc(). Update it to place all
tables in the bloblist. Since QEMU declares a size of 128KB regardless
of the size of its tables, this requires a larger bloblist.

Fix up the e820 table to handle this, keeping the old code as an option
for now, to assist with any future bug-fixing.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-04-03 11:41:55 -06:00
Ilias Apalodimas
37a33d326e acpi: Fix table length for QEMU
The end of the ACPI table is set to 'addr' instead of 'end'. The ACPI
code for QEMU relies on those values to mark memory as 'ACPI Reclaim'
and as a result the ACPI RSDP ends up in Boot services Data.

Reported-by: Björn Töpel <bjorn@kernel.org>
Fixes: commit 638cc363484b ("acpi: enable writing ACPI tables on QEMU")
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2025-04-03 08:58:27 +02:00
Tom Rini
a3b71cc6f5 Merge patch series "upl: Prerequite patches for updated spec"
Simon Glass <sjg@chromium.org> says:

The current UPL spec[1] has been tidied up and improved over the last
year, since U-Boot's original UPL support was written.

This series includes some prerequisite patches needed for the real UPL
patches. It is split from [2]

[1] https://github.com/UniversalPayload/spec/tree/3f1450d
[2] https://patchwork.ozlabs.org/project/uboot/list/?series=438574&state=*

Link: https://lore.kernel.org/r/20250111000029.245022-1-sjg@chromium.org
2025-01-22 17:08:47 -06:00
Simon Glass
53d5a22163 emulation: Use bloblist to hold tables
QEMU can have its own internal ACPI and SMBIOS tables. At present U-Boot
copies out the SMBIOS tables but points directly to the ACPI ones.

The ACPI tables are not aligned on a 4KB boundary, which means that UPL
cannot use them directly, since it uses a reserved-memory node for the
tables and that it assumed (by EDK2) to be 4KB-aligned.

On x86, QEMU provides the tables in a mapped memory region and U-Boot
makes use of these directly, thus making it difficult to use any common
code.

Adjust the logic to fit within the existing table-generation code. Use a
bloblist always and ensure that the ACPI tables is placed in an aligned
region. Set a size of 8K for QEMU. This does not actually put all the
tables in one place, for QEMU, since it currently adds a pointer to the
tables in QFW.

On ARM, enable bloblist so that SMBIOS tables can be added to the
bloblist.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-01-22 17:08:23 -06:00
Tom Rini
079214e4be Merge patch series "SMBIOS improvements"
Raymond Mao <raymond.mao@linaro.org> says:

Motivations for changes:
Current SMBIOS library and command-line tool is not fully matching with
the requirements:
1. Missing support for other mandatory types (#7, #9, #16, #17, #19).
2. Only a few platforms support SMBIOS node from the device tree.
3. Values of some fields are hardcoded in the library other than fetching
   from the device hardware.
4. Embedded data with dynamic length is not supported (E.g. Contained
   Object Handles in Type #2 and Contained Elements in Type #3)

Changes:
1. Refactor the SMBIOS library and command-line tool to better align with
   the SMBIOS spec.
2. Create an arch-specific driver for all aarch64-based platforms to fetch
   SMBIOS private data from the device hardware (processor and cache).
3. Create a sysinfo driver to poppulate platform SMBIOS private data.
4. Add generic SMBIOS DTS file for arm64 platforms for those common strings
   and values which cannot be retrieved from the system registers.
   Vendors can create their own SMBIOS node using this as an example.
   For those boards without SMBIOS nodes, this DTS file can be included to
   have a generic SMBIOS information of the system.
5. Add support for Type #7 (Cache Information) and link its handles to
   Type #4.
6. To minimize size-growth for those platforms which have not sufficient
   ROM spaces or the platforms which don't need detailed SMBIOS
   information, new added fields are only being built when kconfig
   GENERATE_SMBIOS_TABLE_VERBOSE is selected.

Once this patch is acceptted, subsequent patch sets will add other missing
types (#9, #16, #17, #19).

Tests:
To test this with QEMU arm64, please follow the guide on dt_qemu.rst to
get a merged DT to run with.
```
qemu-system-aarch64 -machine virt -machine dumpdtb=qemu.dtb
cat  <(dtc -I dtb qemu.dtb) <(dtc -I dtb ./dts/dt.dtb | grep -v /dts-v1/) \
  | dtc - -o merged.dtb
qemu-system-aarch64 -machine virt -nographic -bios u-boot.bin \
  -dtb merged.dtb
```

Link: https://lore.kernel.org/r/20241206225438.13866-1-raymond.mao@linaro.org
2025-01-14 14:29:49 -06:00
Raymond Mao
0af16b3556 configs: Enable sysinfo for QEMU Arm64
Enable sysinfo smbios by default for arm64.
When SYSINFO_SMBIOS is enabled, disable QFW_SMBIOS.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-01-14 14:29:29 -06:00
Tim Harvey
87bdb4e8a7 drivers: misc: gsc: add support for prescaled
Add support for Gateworks System Controller pre-scaled ADC input.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-12-23 08:08:51 -03:00
Tim Harvey
795a7425a7 drivers: misc: gsc: add support for fan controller
Add support for Gateworks System Controller fan tach input.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2024-12-23 08:08:51 -03:00