27785 Commits

Author SHA1 Message Date
Jonas Karlman
eaea9b4816 rockchip: rk3308: Enable random generator
The RK3308 SoC contain a crypto engine block that can generate random
numbers.

Add rng node to soc u-boot.dtsi and enable Kconfig options to take
advantage of the random generator.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:03 +08:00
Jonas Karlman
9ae4a86f1e rockchip: rk3308: Generate ethaddr based on cpu id
Like other Rockchip SoCs the RK3308 has cpu id programmed into OTP
memory. The rockchip_otp driver already support the RK3308 variant.
However, the device tree is missing a node to enable use of OTP.

Add the missing otp node to soc u-boot.dtsi, enable the rockchip_otp
driver and enable use of misc_init_r() to set ethaddr based on cpu id.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:03 +08:00
Jonas Karlman
12e07033c7 rockchip: rk3308: Enable ARMv8 crypto and FIT checksum validation
The RK3308 SoC support ARMv8 Cryptography Extensions and use of the
ARMv8 crypto extensions help speed up FIT checksum validation in SPL.

Imply ARMV8_SET_SMPEN and ARMV8_CRYPTO to take advantage of the crypto
extensions for SHA256 when validating checksum of FIT images.

Imply SPL_FIT_SIGNATURE and LEGACY_IMAGE_FORMAT to enable FIT checksum
validation on all RK3308 boards.

Also disable CONFIG_SPL_RAW_IMAGE_SUPPORT in board defconfigs to ensure
SPL does not try to jump to code that failed checksum validation.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:03 +08:00
Jonas Karlman
bbc83747d8 rockchip: rk3308: Sort imply statements alphabetically
Sort imply statements under ROCKCHIP_RK3308 alphabetically and remove
the config SPL_SERIAL statement from soc Kconfig file, it is already
implyed in arch Kconfig.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2024-04-26 15:47:03 +08:00
Christopher Obbard
50ac349d0b rockchip: spl-boot-order: show DT path for missing device
When debugging the SPL boot order, the node ID of a device which hasn't
been found is printed but it can be quite hard to relate that to the
specific devicetree node. To aid debugging, print the node path instead of
the cryptic node ID.

Original debug message:

    board_boot_order: could not map node @73c to a boot-device

With this patch applied this becomes e.g:

   board_boot_order: could not map node /spi@ff1d0000/flash@0 to a boot-device

Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
2024-04-26 15:47:03 +08:00
Christopher Obbard
6f29ce00b3 rockchip: spl-boot-order: fix typo in comment succes→success
Fix a simple spelling mistake in a comment.

Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@theobroma-systems.com>
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
2024-04-26 15:47:03 +08:00
Jonas Karlman
a597a77b6e rockchip: spl: Add SPI NOR flash to boot_devices array
Add missing boot source id <-> device tree node path mapping for SPI NOR
flash on PX30, RK3288, RK3308, RK3368 and RV1126.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-04-26 15:47:03 +08:00
Jonas Karlman
a7e69952eb rockchip: spl: Cache boot source id for later use
Rockchip BROM writes a boot source id at CFG_IRAM_BASE + 0x10, this id
indicates from what storage media TPL/SPL was loaded from.

SPL uses this id to determine what device "same-as-spl" represent when
determining from where FIT should be loaded. This works as long as the
boot_devices array contain a matching id <-> node path entry.

However, SPL typically load a small part of TF-A into SRAM and on RK3399
this overwrites the CFG_IRAM_BASE + 0x10 addr used for boot source id.

For affected devices the u-boot,spl-boot-device would not be set when
booting from SPI flash and the flash@0 node was not explicitly listed
in the u-boot,spl-boot-order prop.

Here boot source id is 3 before FIT images is loaded, and 0 after:

  U-Boot SPL 2024.04-rc4 (Mar 15 2024 - 17:26:19 +0000)
  board_spl_was_booted_from: brom_bootdevice_id 3 maps to '/spi@ff1d0000/flash@0'
  Trying to boot from SPI
  ## Checking hash(es) for config config-1 ... OK
  ## Checking hash(es) for Image atf-1 ... sha256+ OK
  ## Checking hash(es) for Image u-boot ... sha256+ OK
  ## Checking hash(es) for Image fdt-1 ... sha256+ OK
  ## Checking hash(es) for Image atf-2 ... sha256+ OK
  ## Checking hash(es) for Image atf-3 ... sha256+ OK
  board_spl_was_booted_from: failed to resolve brom_bootdevice_id 0
  spl_decode_boot_device: could not find udevice for /mmc@fe330000
  spl_decode_boot_device: could not find udevice for /mmc@fe320000
  spl_perform_fixups: could not map boot_device to ofpath: -19

Use a static brom_bootsource_id_cache to save the boot source id after
an initial read from SRAM to fix this, this allow spl_perform_fixups()
to resolve correct boot source path for "same-as-spl" after SPL have
loaded TF-A related FIT images into memory.

With this the spl-boot-device prop can correctly be resolved to the
SPI flash node in the control FDT:

  => fdt addr ${fdtcontroladdr}
  Working FDT set to f1ee6710
  => fdt list /chosen
  chosen {
      u-boot,spl-boot-device = "/spi@ff1d0000/flash@0";
      stdout-path = "serial2:1500000n8";
      u-boot,spl-boot-order = "same-as-spl", "/mmc@fe330000", "/mmc@fe320000";
  };

Fixes: d57e16c7e712 ("rockchip: find U-boot proper boot device by inverting the logic that sets it")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-04-26 15:47:03 +08:00
Jason Zhu
aa24007339 rockchip: bootrom: Sync bootsource id enum from bootrom
Add more bootsource id:
1. BROM_BOOTSOURCE_UNKNOWN
2. BROM_BOOTSOURCE_I2C
3. BROM_BOOTSOURCE_SPI

Signed-off-by: Jason Zhu <jason.zhu@rock-chips.com>
[jonas@kwiboo.se: Update commit message]
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
2024-04-26 15:47:03 +08:00
Tom Rini
d097f9e129 Merge tag 'fsl-qoriq-2024-4-24' of https://source.denx.de/u-boot/custodians/u-boot-fsl-qoriq
- move to OF_UPSTREAM for sl28
2024-04-23 17:53:06 -06:00
Michael Walle
61ff13283c board: sl28: move to OF_UPSTREAM
Use the new device devicetree files in dts/upstream/ and delete the old
ones. Still keep the -u-boot.dtsi with all u-boot specifics around.

There is one catch and that is fsl-ls1028a-kontron-sl28-var3.dts which
is not available upstream (yet!). For now, the base dts is used for this
variant as this only differ in the compatible and the (human readable)
model name.

Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2024-04-24 00:22:09 +08:00
Caleb Connolly
e64503f1fc
mach-snapdragon: implement ft_board_setup() for USB role selection
Some Qualcomm boards have only one USB controller which is muxed between
the type-c port and an internal USB hub for type-A and ethernet. We
modify the DT for these to force them to host mode in U-Boot. However in
Linux DRD role switching is supported (required, even). Use
ft_board_setup() to adjust the dr_mode property for these boards.

While we're here, define pr_fmt for this file so we can more easily
identify log messages.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:30 +02:00
Caleb Connolly
956f6e4de4
arm: dts: qrb4210-rb2-u-boot: add u-boot fixups
Add a fixup to force dr_mode to host for U-Boot.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:30 +02:00
Sumit Garg
8954ef38f7
arm: dts: qcom: Add Schneider HMIBSC board dts
Schneider HMIBSC board dts has already been reviewed upstream on the
linux-arm-msm mailing list. So once it comes through the Linux kernel
release cycle into the U-Boot dts/upstream subtree, a switch to
OF_UPSTREAM can be made. For the time being maintain the U-Boot copy.

Link: https://lore.kernel.org/linux-kernel/20240403043416.3800259-4-sumit.garg@linaro.org/
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:24 +02:00
Sumit Garg
544033cfe9
qcom: Don't enable LINUX_KERNEL_IMAGE_HEADER by default
Enabling LINUX_KERNEL_IMAGE_HEADER by default doesn't allow
ENABLE_ARM_SOC_BOOT0_HOOK to work properly on db410c when U-Boot is
loaded as a first stage bootloader. It leads to secondary CPUs bringup
failure and later causing the Linux kernel to freeze.

So fix it via selectively enabling LINUX_KERNEL_IMAGE_HEADER where it's
actually required.

Fixes: 059d526af312 ("mach-snapdragon: generalise board support")
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:21 +02:00
Robert Marko
a283093149
mach-ipq40xx: import GPIO header from mach-snapgradon
Pinctrl driver was refactored and moved, but the required header that
it depends on was not included.

Fixes: 24d2908e987a ("pinctrl: qcom: move ipq4019 driver from mach-ipq40xx")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:19 +02:00
Robert Marko
c38dcb217c
arm: mach-ipq40xx: dont select SMEM by default
IPQ40xx SoC-s dont have proper SMEM support like more modern Qualcomm
SoC-s so there is no point in selecting the required drivers.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:18 +02:00
Caleb Connolly
4a30052dee
arm: dts: drop qcom dts files
These files are all identical (or older) than those in dts/upstream.
Drop them as we now use upstream DTS files with OF_UPSTREAM.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:17 +02:00
Caleb Connolly
a149974d3c
mach-snapdragon: use OF_UPSTREAM
Switch to using upstream DT from dts/upstream.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:16 +02:00
Sumit Garg
b01c8a8ea4
mach-snapdragon: Allow other board vendors apart from Qcom
Qcom SoCs derived boards can come from various OEMs/ODMs and not just
Qcom itself. So allow CONFIG_SYS_VENDOR to be set correctly
corressponding to the actual board vendor.

Suggested-by: Stephan Gerhold <stephan@gerhold.net>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:12 +02:00
Caleb Connolly
f0a08d4459
dts: sdm845-db845c-u-boot: adjust MMC clocks
Remove the reference to the xo clock which is on the unsupported rpmhcc
clock controller. It isn't needed for MMC functionality.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:09 +02:00
Tom Rini
230a1dd608 Merge patch series "configs: apple: Switch to standard boot + small adjustments"
Janne Grunau <j@jannau.net> says:

This series contains a few misc config changes for Apple silicon
systems:
- switch from the deprecated distro boot scripts to standard boot
- allows EFI console resizing based on the video console size
- enables 16x32 bitmap fonts as Apple devices come with high DPI
  displays
- enables 64-bit LBA addressing
2024-04-22 11:02:16 -06:00
Janne Grunau
f1972dd73f arm: apple: Switch to standard boot
Use standard boot instead of the distro boot scripts. Use
BOOTSTD_FULL instead of BOOTSTD_DEFAULTS for easier interactive use.

Signed-off-by: Janne Grunau <j@jannau.net>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Neal Gompa <neal@gompa.dev>
2024-04-22 11:02:08 -06:00
Tom Rini
9552923ded Merge patch series "Kconfig: some cleanups"
Michal Simek <michal.simek@amd.com> says:

I looked as cleaning up some dependencies and I found that qconfig is
reporting some issues. This series is fixing some of them. But there are
still some other pending. That's why please go and fix them if they are
related to your board.

UTF-8: I am using uni2ascii -B < file to do conversion. When you run it in
a loop you will find some other issue with copyright chars or some issues
in files taken from the Linux kernel like DTs. They should be likely fixed
in the kernel first.
Based on discussion I am ignoring names too.
2024-04-22 11:01:56 -06:00
Michal Simek
81f3a665ab common: Convert *.c/h from UTF-8 to ASCII enconfing
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <kabel@kernel.org>
2024-04-22 11:01:48 -06:00
Michal Simek
5a6cf7c5d5 Kconfig: Make all Kconfig encoding ascii
Some of Kconfigs are using utf-8 encoding because of used chars. Convert
all of them to ascii enconging. Based on discussion ASCII should be used in
general with the exception of names.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
2024-04-22 11:01:48 -06:00
Michal Simek
953d335d39 Kconfig: Add missing quotes around source file
All errors are generated by ./tools/qconfig.py -b -j8 -i whatever.
Error look like this:
drivers/crypto/Kconfig:9: warning: style: quotes recommended around
'drivers/crypto/nuvoton/Kconfig' in 'source drivers/crypto/nuvoton/Kconfig'

Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-04-22 11:01:48 -06:00
Tom Rini
c18ead4ba7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Not many and nothing really exciting this time: there are more patches
in fly, but they are not ready yet.  I will also send some DT updates
and new board defconfig files later, once they have seen the list. I am
aware of the USB rebasing repo efforts, but would like to see how this
plays out, also we have one compatibility issue that I painstakingly
work around in the U-Boot tree for the last three years or so. So for
now I stick to the previous approach.

So now just some easy changes: support for USB peripheral mode on the
Allwinner F1C100s, T113-s3 SPI boot support, and some SPL cleanup
patches.

The branch passed the gitlab CI run, and brief boot testing on some
boards didn't turn up any issues.
2024-04-22 10:24:34 -06:00
Svyatoslav Ryhel
1c559d6fc5 ARM: tegra: transformer-t30: bind Hall sensor
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:21 +03:00
Svyatoslav Ryhel
6df3d1e0fc ARM: tegra: grouper: bind Hall sensor
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:21 +03:00
Svyatoslav Ryhel
d1db2733a5 board: asus: tf700t: bind tc358768 bridge and panel
Of all T30 transformers, only the TF700T has a FullHD DSI panel,
which is connected via tc358768 RGB to DSI bridge. Since the
bridge driver is available now, TF700T can have video support.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS TF700T
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Jonas Schwöbel
e336a86834 ARM: tegra: Enable UART-E for T20 and T30
T20 and T30 have 5 UARTs, while T114+ have only 4. Fix this by
adding missing UARTE Kconfig for T20/T30.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
12b344ad6b board: asus: transformer-t30: set the correct pinmux lock and io-reset
For lock and io-reset pins 0 is the default value, while 1 is disabled
and 2 is enabled. This should be corrected to avoid regressions.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
fc48456e63 board: asus: tf600t: adjust LV pinmux
TF600T is pretty picky in terms of LV pinmux configuration.
The wrong setup will cause issues with eMMC and video.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
edad9f6b55 board: asus: tf600t: configure SPI pinmux
Unlike all other transformers, TF600T has an SPI flash to store
boot firmware and requires precise SPI pinmux configuration.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
2bd07c1fb8 ARM: tegra: move to standard boot
Drop the distro-boot scripts and use standard boot instead.

Inspired by:
'commit 7755dc58af7b ("rockchip: Move to standard boot")'

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Svyatoslav Ryhel
eed7fa1372 ARM: dts: paz00: remove display-timings node
Paz00 can have multiple panels with different timings, but they
all share common feature - panel exposes EDID.

Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-22 12:17:20 +03:00
Andre Przywara
192c5c9e51 sunxi: sun9i: make more clock functions SPL only
In clock_sun9i.c, responsible for (mostly early) clock setup on the
Allwinner A80 SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM, and
they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Move some functions around, to group all SPL-only function within
one #ifdef guard. Some functions were exported, but never used outside
of this file, so remove their prototypes from the header file and mark
them as static.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
25f07d2cc3 sunxi: sun8i_a83t: make more clock functions SPL only
In clock_sun8i_a83t.c, responsible for (mostly early) clock setup on the
Allwinner A83T SoC, many functions are only needed by the SPL, and are
thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
c209a7163a sunxi: sun50i_h6: make more clock functions SPL only
In clock_sun50i_h6.c, responsible for (mostly early) clock setup on
newer generation Allwinner SoCs, many functions are only needed by the
SPL, and are thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only. By moving the clock_get_pll6()
function to the end of the file, all SPL-only clocks can be contained
within one #ifdef guard.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
58bf089999 sunxi: sun6i: make more clock functions SPL only
In clock_sun6i.c, responsible for (mostly early) clock setup on older
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
a2b2a47a16 sunxi: sun4i: make more clock functions SPL only
In clock_sun4i.c, responsible for (mostly early) clock setup on early
generation Allwinner SoCs, many functions are only needed by the SPL,
and are thus already guarded by CONFIG_SPL_BUILD.

Over the years drivers like for the UART or I2C were converted to DM,
so they care about clock setup themselves now, by using a proper DM clock
driver.

This means those devices need the clock setup functions here for the SPL
only. Include those functions into the existing CONFIG_SPL_BUILD guards,
so they are compiled for the SPL only.

This avoids unnecessary code in U-Boot proper and helps further
refactoring. Add some comments on the way to help understanding of the
file.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:26 +01:00
Andre Przywara
8cb3c49454 sunxi: compile clock.c for SPL only
With the clock_twi_onoff() function now being called only from the SPL,
the whole clock.c file in arch/arm/mach-sunxi is needed by SPL code
only.

Remove the redundant #ifdef from the clock_init() function, actually
this function was already only called from the SPL.
Then adjust the Makefile to compile clock.c only with CONFIG_SPL_BUILD
defined.

This avoids unnecessary code in U-Boot proper and allows further
refactoring and code-split between the SPL and U-Boot proper.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:25 +01:00
Andre Przywara
02780a1c26 sunxi: move #ifdef guards around tzpc_init() to header file
Some later 32-bit SoCs require some setup of the Secure Peripherals
Controller, which is handled in tzpc_init().
At the moment this is guarded in board.c by some #ifdefs selecting the
SoCs that need it.

Move those #ifdef guards into the header file, providing an empty stub
function for all other SoCs, so that the #ifdefs can be removed from the
.c file, to improve readability.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2024-04-22 01:12:25 +01:00
Maksim Kiselev
83d5e3c9e9 sunxi: SPL SPI: Add SPI boot support for the Allwinner R528/T113 SoCs
R528/T113 SoCs uses the same SPI IP as the H6, also have the same clocks
and reset bits layout, but the CCU base is different. Another difference
is that the new SoCs do not have a clock divider inside. Instead of this
we should configure sample mode depending on input clock rate.

The pin assignment is also different: the H6 uses PC0, the R528/T113 PC4
instead. This makes for a change in spi0_pinmux_setup() routine.

This patch extends the H6/H616 #ifdef guards to also cover the R528/T113,
using the shared CONFIG_SUNXI_GEN_NCAT2 and CONFIG_MACH_SUN8I_R528
symbols. Also use CONFIG_SUNXI_GEN_NCAT2 symbol for the Kconfig
dependency.

Signed-off-by: Maksim Kiselev <bigunclemax@gmail.com>
Tested-by: Sam Edwards <CFSworks@gmail.com>
2024-04-22 00:04:14 +01:00
Tom Rini
1dd659fd62 - simple_panel: support timing parsing from EDID
- dw_hdmi: fix gcc-14 compiler warnings
  - dw_hdmi: support vendor PHY for HDMI
  - rockchip: add Rockchip INNO HDMI PHY driver
  - rockchip: RK3328 HDMI and VOP support
  - evb-rk3328: enable vidconsole support
  - Tegra DC and DSI improvements and Tegra 114 support
  - add LG LG070WX3 MIPI DSI panel driver
  - add Samsung LTL106HL02 MIPI DSI panel driver
  - add Toshiba TC358768 RGB to DSI bridge support
  - add basic support for the Parade DP501 transmitter
  - Tegra 3 panel and bridge driver improvements
  - simplefb: modernise DT parsing
  - fdt_simplefb: Enumerate framebuffer info from video handoff
  - preserve framebuffer if SPL is passing video hand-off
  - fdt_support: allow reserving FB region without simplefb
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Merge tag 'video-20240421' of https://source.denx.de/u-boot/custodians/u-boot-video

CI: https://source.denx.de/u-boot/custodians/u-boot-video/-/pipelines/20466

- simple_panel: support timing parsing from EDID
- dw_hdmi: fix gcc-14 compiler warnings
- dw_hdmi: support vendor PHY for HDMI
- rockchip: add Rockchip INNO HDMI PHY driver
- rockchip: RK3328 HDMI and VOP support
- evb-rk3328: enable vidconsole support
- Tegra DC and DSI improvements and Tegra 114 support
- add LG LG070WX3 MIPI DSI panel driver
- add Samsung LTL106HL02 MIPI DSI panel driver
- add Toshiba TC358768 RGB to DSI bridge support
- add basic support for the Parade DP501 transmitter
- Tegra 3 panel and bridge driver improvements
- simplefb: modernise DT parsing
- fdt_simplefb: Enumerate framebuffer info from video handoff
- preserve framebuffer if SPL is passing video hand-off
- fdt_support: allow reserving FB region without simplefb
2024-04-21 08:54:20 -06:00
Svyatoslav Ryhel
f1b1f5e61d video: tegra20: dsi: add T114 support
Existing Tegra DSI driver mostly fits T114 apart MIPI calibration
which on T114 has dedicated driver. To resolve this MIPI calibration
logic was split for pre-T114 and T114+ devices.

Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
8fea3369ee video: tegra20: dc: parameterize V- and H-sync polarities
Based on Thierry Reding's Linux commit:

'commit 1716b1891e1de05e2c20ccafa9f58550f3539717
("drm/tegra: rgb: Parameterize V- and H-sync polarities")'

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
d5e1eaf97e video: tegra20: consolidate DC header
Consolidate HD headers and place the result into video/tegra20
since it is used only by devices from this directory.

Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
2024-04-21 09:07:01 +02:00
Svyatoslav Ryhel
e88d02695d video: tegra20: dc: diverge DC per-SOC
Diverge DC driver setup to better fit each of supported generations
of Tegra SOC.

Tested-by: Agneli <poczt@protonmail.ch> # Toshiba AC100 T20
Tested-by: Robert Eckelmann <longnoserob@gmail.com> # ASUS TF101
Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # ASUS Grouper E1565
Tested-by: Ion Agorria <ion@agorria.com> # HTC One X
Tested-by: Svyatoslav Ryhel <clamor95@gmail.com> # Nvidia Tegratab T114
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2024-04-21 09:07:01 +02:00