27785 Commits

Author SHA1 Message Date
Jonathan Humphreys
4b91ded762 arch: arm: dts: k3-j721e-r5-evm: Add missing fss range
Upstream DTS added explicit ranges to the fss node.  It did not include the
32 bit memory space needed by the R5 to access OSPI.  With the upstream DTS
sync, OSPI boot no longer works.

Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed.  See
0c0e03ec22 (arm64: dts: ti: k3-j721e: Use exact ranges for FSS node)

Fixes: 5024a96db8e ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
2024-08-27 10:02:35 -06:00
Jonathan Humphreys
0bc48353fa arch: arm: dts: k3-j7200-r5-evm: Add missing fss range
Upstream DTS added explicit ranges to the fss node.  It did not include the
32 bit memory space needed by the R5 to access OSPI.  With the upstream DTS
sync, OSPI boot no longer works.

Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
f00e626085 (arm64: dts: ti: k3-j7200: Use exact ranges for FSS node)

Fixes: 5024a96db8e ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Aniket Limaye <a-limaye@ti.com>
2024-08-27 10:02:35 -06:00
Jonathan Humphreys
0f116942b8 arch: arm: dts: k3-am69-r5-sk: Add missing fss range
Upstream DTS added explicit ranges to the fss node.  It did not include the
32 bit memory space needed by the R5 to access OSPI.  With the upstream DTS
sync, OSPI boot no longer works.

Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
f062a015f4 (arm64: dts: ti: k3-j784s4: Use exact ranges for FSS node)

Fixes: 5024a96db8e ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
2024-08-27 10:02:35 -06:00
Jonathan Humphreys
9151844547 arch: arm: dts: k3-j784s4-r5-evm: Add missing fss range
Upstream DTS added explicit ranges to the fss node.  It did not include the
32 bit memory space needed by the R5 to access OSPI.  With the upstream DTS
sync, OSPI boot no longer works.

Adding the missing range here. It is also being added in the upstream DTS,
so after the next upstream DTS sync, this patch can be removed. See
f062a015f4 (arm64: dts: ti: k3-j784s4: Use exact ranges for FSS node)

Fixes: 5024a96db8e ("Subtree merge tag 'v6.10-dts' of devicetree-rebasing repo [1] into dts/upstream")

Signed-off-by: Jonathan Humphreys <j-humphreys@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
2024-08-27 10:02:35 -06:00
Simon Glass
92aa3ec321 global_data: Reduce size of early-malloc vars
The early malloc region is normally quite small and is certainly less
than 4GB, so use a 32-bit value for the limit and pointer. Update the
comments for clarity while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:06:08 -06:00
Simon Glass
80166ea20b global_data: Reduce the size of bus_clk and mem_clk
The bus clock and memory clock are unlikely to go above 4GHz for now, so
reduce the field size to 32 bits.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
2e9313179a global_data: Drop spl_handoff
Provide a function to locate this information, rather than doing it
automatically on startup, to save space in global_data.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
a6616bac98 global_data: Drop global_data hose
This is set on one x86 boards, but is not used anymore. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
7d08262ec3 global_data: Remove pci_ram_top
This field is set but not used. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
f44fded236 global_data: Convert have_console into a flag
We don't need a full word for this boolean value. Convert it into a flag
to save space in global_data.

Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:38 -06:00
Simon Glass
26d3faae29 x86: Drop use of global_data fb_base
This value is set by not used on x86 so there is no point in setting it.
Drop the assignment.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:37 -06:00
Simon Glass
5f32aac98e global_data: Move pci_clk to m68k and powerpc
Only m68k and powerpc use this field, so move it to the arch-specific
info, to reduce the size for other archs.

Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-26 14:05:37 -06:00
Tom Rini
5948fd0ae7 Merge patch series "spl: mmc: Some tweaks for SPL, particularly with MMC"
Simon Glass <sjg@chromium.org> says:

This series includes various minor fixes and tweaks found when trying
to reduce the size of MMC code in SPL.
2024-08-23 15:59:03 -06:00
Simon Glass
3fd11278ff spl: Create a function to init spl_load_info
Rather than having every caller set this up individually, create a
common init function. This allows new fields to be added without the
risk of them being left uninited.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
2024-08-23 15:58:42 -06:00
Simon Glass
2a00d73d08 spl: mmc: Try to clean up raw-mode options
Make the raw-mode options depend on SPL_SYS_MMCSD_RAW_MODE in a more
direct way. This makes it easier to understand the options with
'make menuconfig'.

There are three different ways of specifying the offset:

- sector offset
- partition number
- partition type

So make these a choice, so it is more obvious what is going on.

Update existing boards to enable SPL_SYS_MMCSD_RAW_MODE where needed.

Reviewed-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Signed-off-by: Simon Glass <sjg@chromium.org>
2024-08-23 15:58:41 -06:00
Simon Glass
001b3109da rockchip: Move the default timer init to a common file
Rather than repeating the same code in two files (SPL and TPL), move it
to a shared filed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
2024-08-23 15:58:41 -06:00
Fabio Estevam
8ad6ac9fbd mx6: Expand bmode to support ecspi3 boot
Currently, the bmode command only supports booting from ecspi1.

Expand it to also support booting from ecspi3.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Peng Fan <peng.fan@nxp.com>
2024-08-23 14:50:15 -03:00
Fabio Estevam
3c72b81200 tqma6_mba6: Remove UART board code
With DM_SERIAL in place, there is no need to setup the UART pins
in the board code.

The UART pins are setup via devicetree, thanks to DM.

Remove the unneeded code.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2024-08-23 14:49:44 -03:00
Primoz Fiser
8827ec575e imx: imx9: Set correct critical temperature
Commit 3233349fa6e2 ("imx: imx9: fixup thermal trips from fuses")
wrongly set critical temperature to (maxc - 5) instead of maxc.

Fixes: 3233349fa6e2 ("imx: imx9: fixup thermal trips from fuses")
Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2024-08-23 14:49:26 -03:00
Tom Rini
e93d343cc7 Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-samsung into next 2024-08-22 08:15:04 -06:00
Tom Rini
158cf0270c Prepare v2024.10-rc3
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Merge tag 'v2024.10-rc3' into next

Prepare v2024.10-rc3
2024-08-19 18:24:58 -06:00
Tom Rini
f9e45be1a1 Merge patch series "clk: mediatek: mt7986: clk migration for OF_UPSTREAM"
Christian Marangi <ansuelsmth@gmail.com> says:

These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
2024-08-19 16:15:13 -06:00
Christian Marangi
54f8ba658f clk: mediatek: mt7986: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel
linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2024-08-19 16:14:44 -06:00
Christian Marangi
ba7969c5fb clk: mediatek: mt7986: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.

Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:44 -06:00
Christian Marangi
7124b9928a clk: mediatek: mt7986: drop 1/1 spurious factor for topckgen
Now that we can have advanced parent handling for mux, we can drop
spurious topckgen 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.

Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the apmixed clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for apmixed.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Christian Marangi
1062187a4b clk: mediatek: mt7986: rename TOPCKGEN factor clock to upstream naming
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.

Also rename rtc clock to drop the CB_ as upstream doesn't have that.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Christian Marangi
6df8029c9e clk: mediatek: mt7986: drop 1/1 infracfg spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7986.

Drop the factor entry from mt7986-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for infracfg and topckgen.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Christian Marangi
e69a1fed16 clk: mediatek: mt7986: rename CB_CKSQ_40M to TOP_XTAL
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:43 -06:00
Tom Rini
2f71d6ef32 Merge patch series "clk: mediatek: mt7988: clk migration for OF_UPSTREAM"
Christian Marangi <ansuelsmth@gmail.com> says:

These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
2024-08-19 16:14:29 -06:00
Christian Marangi
99c5fa184b clk: mediatek: mt7988: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel
linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Tested-by: Frank Wunderlich <frank-w@public-files.de>
2024-08-19 16:14:09 -06:00
Christian Marangi
ef4a648587 clk: mediatek: mt7988: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.

Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Christian Marangi
8b75c2c479 clk: mediatek: mt7988: rename TOPCKGEN factor clock to upstream naming
Rename TOPCKGEN factor clock to upstream neaming.
Upstream kernel linux reference the factor clock for apmixedpll with the
"pll" suffix. Align the naming to the upstream naming format in
preparation for OF_UPSTREAM support.

Also rename rtc clock to drop the CB_ as upstream doesn't have that.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Christian Marangi
78507c3a9f clk: mediatek: mt7988: drop 1/1 infracfg spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7988.

Drop the factor entry from mt7988-clk.h and reference to them in
mt7988.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Christian Marangi
b76b75bfc6 clk: mediatek: mt7988: rename CB_CKSQ_40M to TOP_XTAL
Upstream kernel linux clock include use TOP_XTAL instead of CB_CKSQ_40M.
Rename this clock to the upstream kernel in preparation for support of
OF_UPSTREAM.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:14:09 -06:00
Tom Rini
98cccbd680 Merge patch series "clk: mediatek: mt7981: clk migration for OF_UPSTREAM"
Christian Marangi <ansuelsmth@gmail.com> says:

These are all the required patches to migrate clk and correctly support
OF_UPSTREAM. This will align the clk index to upstream to support the same
clk implementation with downstream and upstream DTS.
2024-08-19 16:13:57 -06:00
Christian Marangi
02de3b9f04 clk: mediatek: mt7981: rename CK to CLK
Rename each entry from CK to CLK to match the include in upstream kernel
linux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
99da5bbd80 clk: mediatek: mt7981: convert to unified infracfg gates + muxes
Convert to infracfg gates + muxes implementation now that it's
supported.

Drop infracfg-ao nodes and rename all infracfg-ao clocks to infracfg.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
2d20cc4064 clk: mediatek: mt7981: fix support for pwm3 clock
Add and fix support for pwm3 clock. In the pwm DTSI node we were
actually using PWM2 clock for PWM3. Now that we have correct ID also add
the missing entry of gate and mux to support PWM3 clock.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
78487cd093 clk: mediatek: mt7981: drop 1/1 spurious factor
Now that we can have advanced parent handling for mux, we can drop
spurious infracfg 1/1 factor. This is in preparation to make the clk
ID match the ID in upstream include for mt7981.

Drop the factor entry from mt7981-clk.h and reference to them in
mt7981.dtsi. Muxes and gates are updated to reference the topckgen clk
following how it's done in upstream kernel linux. Add relevant clk type
flag in clk_tree for infracfg and topckgen.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
807624c1e1 clk: mediatek: mt7981: implement sgmii0/1 clock
Implement missing sgmii0/1 clock and update the compatible the DTS to
match upstream kernel linux and in preparation for OF_UPSTREAM support
since the ethernet node define these additional clocks.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
f8a58bb2b5 clk: mediatek: mt7981: swap wrong clock-names for spi nodes
Swap wrong clock-names for spi nodes as they were wrong and the spi-clk
was referencing the sel-clk and the sel-clk was referencing the spi-clk.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
37476e7eae clk: mediatek: mt7981: add missing clock for spi1 node
Add missing clock for spi1 node. Clocks taken from upstream clock
definition and clock mux.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
99bd00a97c clk: mediatek: mt7981: fix wrong clock definition for spi2
Fix wrong clock definition for spi2 node as they reference spi0 clock
instead of spi2.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Christian Marangi
99d3da81bd clk: mediatek: mt7981: fix typo for infra_i2c0_ck
Fix a typo for infra_i2c0_ck where 0 was misspelled as O.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2024-08-19 16:13:13 -06:00
Sam Protsenko
4a29c0d36b arm: dts: exynos: Remove outdated DW MMC properties in all Exynos dts
Upstream properties were added to device trees to follow current Linux
kernel. DW MMC driver was updated accordingly. Safely remove outdated
MMC properties. Details on removed properties are as follows:

* samsung,removable: replaced by non-removable
* samsung,bus-width: replaced by bus-width
* samsung,timing:
  - replaced by samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing
    in dw_mmc nodes
  - removed from sdhci nodes (it's neither described in bindings, nor
    it's used in s5p_sdhci.c driver)
* fifoth_val: replaced by fifo-depth
* bus_hz: replaced by clock-frequency
* div: the fixed CIU clock divider value was moved to the chip data in
  exynos_dw_mmc.c driver

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
9bedead15a mmc: exynos_dw_mmc: Improve coding style
Fix most of checkpatch warnings and other obvious style issues.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
9780ca6539 mmc: exynos_dw_mmc: Add support for ARM64 Exynos chips
Add the compatible entry and corresponding chip data for Exynos7
compatible chips, which covers modern ARM64 based Exynos chips. They
have some differences w.r.t. old ARM32 Exynos chips:
  - CLKSEL register offset is different
  - 64-bit IDMAC descriptor and 64-bit IDMAC registers are used
    (implemented in dw_mmc core driver)

In terms of the driver implementation, the CIU clock is obtained via CCF
framework (as opposed to ad-hoc clock driver implementation for ARM32
chips).

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
29b4ff362a arm: exynos: Add header guard for dwmmc.h
Add missing header guard to prevent possible build errors.

Fixes: 77b55e8cfcee ("ARM: exynos: move SoC sources to mach-exynos")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Sam Protsenko
d1c057fd49 arm: dts: exynos: Add upstream DW MMC properties to all Exynos dts
Some device tree properties for DW MMC block were updated in Linux
kernel. Let's follow its example and rework corresponding properties in
all Exynos device trees. Don't remove outdated properties yet, it'll be
done later once DW MMC driver is updated accordingly to read the updated
properties instead of outdated ones.

Next properties are added:

* samsung,dw-mshc-ciu-div and samsung,dw-mshc-sdr-timing:

  They were derived from outdated samsung,timing property.

* fifo-depth (generic replacement for fifoth_val):

  FIFO depth was calculated from fifoth_val (using expressions from
  FIFOTH register description in TRM):

      fifo-depth = ((fifoth_val >> 16) + 1) * 2

* bus-width: generic replacement for samsung,bus-width
* clock-frequency: generic replacement for bus_hz
* non-removable: generic replacement for samsung,removable = <0>

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
2024-08-19 16:09:06 +09:00
Richard Weinberger
c17b2a05dd x86: Fix ptrdiff_t for x86_64
sbrk() assumes ptrdiff_t is large enough to enlarge/shrink the heap
by LONG_MIN/LONG_MAX.
So, use the long type, also to match the rest of the Linux ecosystem.

Signed-off-by: Richard Weinberger <richard@nod.at>
Reviewed-by: Simon Glass <sjg@chromium.org>
2024-08-15 16:14:36 -06:00