A lot of the features in here are only relevant when running
multi-threaded with interrupts. Drop everything except what we need to
run single-threaded with a single TCS (which is all the rpmh-rsc
framework in U-Boot supports).
Keep rpmh_write_async() for simplicity and make it wrap the regular
rpmh_write().
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Drop unused/unsupported Linux headers and add dm/device.h for U-Boot.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Minor adjustments to fix building with U-Boot and work correctly as a
synchronous driver without interrupts. RPMh is fast enough that we can
get away with just firing off requests and assuming they complete.
U-Boot behaviour changes are annotated with a "U-Boot:" comment.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Rework the rpmh-rsc initialization to use U-Boot's driver model and
initialize cmd-db.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Remove unsupported / unused Linux headers and add those needed for
U-Boot.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Since U-Boot is single threaded, we can avoid most of the complexity
that comes with handling more than one in-flight TCS. Drop all the rpmh
code associated with multi-threading as we'll instead wait for a
response on each TCS.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Keep the header pointer in the .data section so we don't initialize it
again after relocation, adjust cmd_db_get_header() to work with the
U-Boot API, and skip validating the header since all cmd-db users are
children of the rpmh-rsc and those children will only probe if cmd-db
initializes successfully.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Integrate cmd-db into the U-Boot driver model.
This is just a wrapper around an in-memory database, so we just need to
get the address and validate that cmd-db is there.
Since cmd_db_header will be stored in the .data section we can skip
bind if it's already set.
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Due to our simpler rpmh-rsc driver and lack of debugfs, we don't need
quite a few cmd-db functions, just drop them.
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Import this function from Linux as of 6.10-rc6
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Enable True Random Number Generator (TRNG) on E850-96 board. To do so:
1. Enable DM_RNG and RNG_EXYNOS for TARGET_E850_96
2. Add TRNG node to E850-96 device tree
3. Enable 'rng' command support for easy TRNG testing
TRNG node is already applied in Linux kernel device tree, but it hasn't
appeared in upstream dts yet. Add it in U-Boot override dtsi file
temporarily; it can be removed once it appears in upstream dts.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add True Random Number Generator (TRNG) driver for Exynos chips. This
implementation is heavily based on Linux kernel's counterpart [1]. It
also follows upstream dt-bindings [2].
TRNG block is usually a part of SSS (Security Sub System) IP-core on
Exynos chips. Because SSS access on Exynos850 is protected by TZPC
(TrustZone Protection Control), it's not possible to read/write TRNG
registers from U-Boot, as it's running in EL1 mode. Instead, the
corresponding SMC calls should be used to make the secure software
running in EL3 mode access it for us. Those SMC calls are handled by
LDFW (Loadable Firmware), which has to be loaded first. For example, for
E850-96 board it's done in its board_init(), so by the time RNG
capabilities are needed the LDFW should be already loaded and TRNG
should be functional.
[1] drivers/char/hw_random/exynos-trng.c
[2] dts/upstream/Bindings/rng/samsung,exynos5250-trng.yaml
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add ACLK (operating clock) and PCLK (bus clock) for Security Sub System
(SSS) in Exynos850. Those clocks are needed for RNG enablement.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
LDFW is a Loadable Firmware which provides additional security
capabilities in EL3 monitor. For example, True Random Number Generator
(TRNG) block registers can't be accessed from EL1 (where U-Boot and
Linux kernel are running), but it's possible to access TRNG capabilities
via corresponding SMC calls, which in turn are handled by LDFW. To do
so, LDFW firmware has to be loaded first. It's stored on a raw eMMC
partition, so it has to be read into NWD (Normal World) RAM buffer, and
then loaded to SWD (Secure World) memory using the special SMC call to
EL3 monitor program. EL3_MON will load LDFW to SWD memory, more
specifically to the area starting at 0xbf700000 (with size of 7.5 MiB).
That memory area is reserved in device tree, so there shouldn't be any
collisions. After that LDFW becomes functional.
Implement LDFW firmware loading on board init. While at it, fix the
copyright date in header comments, as this board support was actually
added in 2024, not in 2020: it was probably a copy-paste mistake.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add an environment file for E850-96 board with default eMMC partition
list. It follows the Samsung's partition list used for Android-Q on
Exynos850 devices. It was verified on E850-96 board with:
=> gpt verify mmc 0 "$partitions"
Verify GPT: success!
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
The conversion to DM_I2C is mandatory, rework to remove
use of legacy I2C API.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachienergy.com>
Cc: Holger Brunck <holger.brunck@hitachienergy.com>
Cc: Tomas Alvarez Vanoli <tomas.alvarez-vanoli@hitachienergy.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heiko Schocher <hs@denx.de>
This board has not been converted to CONFIG_DM_I2C by the deadline.
Remove it.
Acked-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
This board has not been converted to CONFIG_DM_I2C by the deadline.
Remove it.
Acked-by: Robert Nelson <robertcnelson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/21728
- Conversions to DM_I2C and DM_SERIAL.
- Support for I2C3 and PWM1 for the imx6q clock driver.
- Improvements for udoo-neo
- Describe the i.MX93 CPU clocks in the devicetree to fix CPU clock printing
- Fix for SPI and NANC clk-imx8mn clock driver
Rework to remove use of legacy I2C API. Also switch
to DM_SERIAL to avoid board removal warning.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Eric Bénard <eric@eukrea.com>
Rework to remove use of legacy I2C API. Also switch
to DM_SERIAL to avoid board removal warning.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Cc: Troy Kisky <troy.kisky@boundarydevices.com>
Instead of using the local imx6sx-udoo-neo devicetree copies from U-Boot,
convert the imx6sx-udoo-neo boards to OF_UPSTREAM so that the upstream
kernel devicetrees can be used instead.
Tested on a imx6sx-udoo-neo-full board.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
The udoo_neo_defconfig target supports several board variants.
All of these variants use the imx6sx-udoo-neo-basic devicetree in U-Boot.
Currently, the devicetree model as well as the board variant name
are shown:
...
Model: UDOO Neo Basic
Board: UDOO Neo FULL
...
Printing the devicetree model that is used internally by U-Boot
may confuse users.
Unselect the CONFIG_DISPLAY_BOARDINFO option and move the board printing
inside board_init() so that only the real board name that is detected
in run-time is printed.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
u-boot.img has grown in such a way that it overwrites the
environment region.
Select CONFIG_LTO to help reducing the U-Boot binary size
and add a build-time size check to avoid U-Boot to overlap
the environment region.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Commit 68dcbdd594d4 ("ARM: imx: Add weak default reset_cpu()") caused
the 'reset' command in U-Boot to not cause a board reset.
Fix it by switching to the watchdog driver model via sysreset, which
is the preferred method for implementing the watchdog reset.
With the watchdog driver model in place, it is no longer needed
to have board code to initialize the watchdog, so remove
its related board code.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Currently, there is an error when the i.MX93 CPU frequency is
read:
Could not read CPU frequency: -2
CPU: NXP i.MX93(52) Rev1.1 A55 at 0 MHz
Fix it by describing the A55 clock nodes in the devicetree, like done
on other i.MX SoCs.
With this change, the CPU frequency error is gone and it can be correctly
retrieved:
CPU: NXP i.MX93(52) Rev1.1 A55 at 1700 MHz
CPU: Industrial temperature grade (-40C to 105C) at 35C
As the upstream imx93.dtsi does not describe the CPU clocks,
keep the clock node in imx93-u-boot.dtsi for now.
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Enabling CONFIG_CMD_PWM, and consequently CONFIG_DM_PWM, causes the pwm
command to fail due to a missing clock.
=> pwm enable 0 0
Enable clock-controller@20c4000 failed
Failed to enable per_clk
pwm: '0' not found
Command 'pwm' failed: Error -2
Note that it is trivial to also add the clocks for PWM2, PWM3, and PWM4.
However, I only tested PWM1 and thus only added the clock for that
signal.
Signed-off-by: Emil Kronborg <emil.kronborg@protonmail.com>
Commit 727fa4539ca2 ("clk: Add support for I2C clocks on NXP's imx6q SoC
which use CCF") added I2C clocks for I2C1 and I2C2, but not I2C3.
Consequently, devices using I2C3 fail after enabling CONFIG_CLK_IMX6Q
and thus CONFIG_CLK. Therefore, this commit adds the last I2C clock.
Signed-off-by: Emil Kronborg <emil.kronborg@protonmail.com>
The osc_24m is the clock-output-name and not the one that
is used as internal name reference from the strcmp. The clock
that use osc_24m, will not be able to reparent it as they should.
We need anyway register the osc_24m clock fixed factor in the clock
tree.
Fixes: 710c4ffb890 ("clk: imx: clk-imx8mn add gpmi nand clocks")
Fixes: 85b1c11989c ("clk: imx: Add ECSPI to iMX8MN")
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Daniel Schultz <d.schultz@phytec.de> says:
The overlays are specified in the bootenv.txt file that is loaded into
the environment. Then these overlays get loaded and applied via a script.
These scripts for loading and applying devicetree overlays are identical
for many phytec boards.
Create a common overlays.env that can be included.
Add support for devicetree overlays to phycore-imx8mp and include the
overlays.env for phycore-imx93.
Rename existing environment variables according to bootstd doc.
Move MMC boot logic into a common k3_mmc.env file and include the new
overlays.env file as well.
