20922 Commits

Author SHA1 Message Date
Aleksandar Gerasimovski
2ef53647d1 arm: ls102xa: select USB PHY erratum's only if USB is enabled
The USB support is not by default enabled on all designs, so it does not
make seance to have USB specific erratum's enabled on such a designs.

On our internal Hitachi-Powergrids design not using the USB controller
there is a crash when accessing those specific memory locations selected
by the erratum flags.

Signed-off-by: Aleksandar Gerasimovski <aleksandar.gerasimovski@hitachi-powergrids.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Chris Packham
0606bf2b7c powerpc: mpc85xx: Allow boards to override CONFIG_USB_MAX_CONTROLLER_COUNT
If the board isn't strapped to enable USB1 then attempting to access it
will result in a hang. Avoid this by allowing boards to define
CONFIG_USB_MAX_CONTROLLER_COUNT.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Alban Bedel
cbf77d2018 armv8: fsl-layerscape: Fix automatic setting of bootmcd with TF-A
When booting from TF-A there is a logic that attempt to detect if the
default environment is used, if this is the case it then set the
`bootcmd` and `mcinitcmd` depending of the device we booted from.
This detection logic is dubious as it access internals of the env
implementation and it doesn't always work correctly.

First of all it detect any valid environment as not being the
default, so after running `env default -a && saveenv` the board
doesn't boot anymore as `bootcmd` is then empty.
But it also fails in some other ways, for example it always detect a
default environment when redundant env is enabled on MMC, so in that
case `bootcmd` is overwritten on every boot.

Instead of increasing the complexity of the detection just check if
`bootcmd` and `mcinitcmd` are set in the environment and set them if
they are not.

Signed-off-by: Alban Bedel <alban.bedel@aerq.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Priyanka Singh
03d095e87d layerscape: fdt.c: Check for NULL return value from fdt_getprop()
Check for NULL return value from fdt_getprop() in
fdt_fixup_remove_jr()

Signed-off-by: Priyanka Singh <priyanka.singh@nxp.com>
[Fixed checkpatch errors/warnings]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal
9ed303dfa9 armv8: lx2162aqds: Add support for LX2162AQDS platform
This patch add base support for LX2162AQDS board.
LX2162AQDS board supports LX2162A family SoCs.
This patch add basic support of platform.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: hui.song <hui.song_1@nxp.com>
Signed-off-by: Manish Tomar <manish.tomar@nxp.com>
Signed-off-by: Vikas Singh <vikas.singh@nxp.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Meenakshi Aggarwal
3a187cff7a armv8: lx2162a: Add Soc changes to support LX2162A
LX2162 is LX2160 based SoC, it has same die as of LX2160
with different packaging.

LX2162A support 64-bit 2.9GT/s DDR4 memory, i2c, micro-click module,
microSD card, eMMC support, serial console, qspi nor flash, qsgmii,
sgmii, 25g, 40g, 50g network interface, one usb 3.0 and serdes
interface to support three PCIe gen3 interface.

Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
[Fixed whitespace errors]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
4c72d2d53b arm: dts: ls1028a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
04c2d93d36 arm: dts: ls1043a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
6ba8b6a8f8 arm: dts: ls1012a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
7dfc20ab1d arm: dts: ls1088a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
ba45dd21f3 arm: dts: ls2080a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
2adb7970cb arm: dts: ls1046a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:39 +05:30
Wasim Khan
6519ccd282 arm: dts: lx2160a: add label to pcie nodes in dts
Add label to pcie nodes in dts so that these nodes
are easy to refer.

Signed-off-by: Wasim Khan <wasim.khan@nxp.com>
[Rebased]
Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
2020-12-10 13:56:38 +05:30
Tom Rini
2a42de6df1 - Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
 - Enable internal pull-ups for SDMMC1 on DHCOM SoM
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Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board
- Update ARM STI and ARM STM STM32MP Arch maintainers emails
- Enable internal pull-ups for SDMMC1 on DHCOM SoM
2020-12-09 11:36:41 -05:00
Marek Vasut
9b36b7dc96 ARM: dts: stm32: Add USB OTG ID pin on DH AV96
Add USB OTG ID pin mux and switch the USB OTG port
from peripheral to OTG mode.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
1399be91cb ARM: dts: stm32: Enable SDMMC3 on DH DRC02
The DH DRC02 board has an on-board microSD slot,
add DT properties to enable the slot.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
75df748b87 ARM: dts: stm32: Disable SDMMC1 CKIN feedback clock
The STM32MP1 DHCOM SoM can be built with either bus voltage level shifter
or without one on the SDMMC1 interface. Because the SDMMC1 interface is
limited to 50 MHz and hence SD high-speed anyway, disable the SD feedback
clock to permit operation of the same U-Boot image on both SoM with and
without voltage level shifter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Marek Vasut
845c6720ec ARM: dts: stm32: Enable internal pull-ups for SDMMC1 on DHCOM SoM
The default state of SD bus and clock line is logical HI. SD card IO is
open-drain and pulls the bus lines LO. Always enable the SD bus pull ups
to guarantee this behavior on DHCOM SoM. Note that on SoMs with SD bus
voltage level shifter, the pull ups are built into the level shifter,
however that has no negative impact.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Patrice Chotard <patrice.chotard@st.com>
Cc: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2020-12-09 10:57:50 +01:00
Patrice Chotard
0f8106f8e0 treewide: Update email address Patrick Delaunay and Patrice Chotard
Update Patrick and my email address with the one dedicated to
upstream activities.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@st.com>
2020-12-09 10:57:50 +01:00
Tom Rini
19ea606109 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-imx 2020-12-08 09:53:03 -05:00
Tom Rini
ec79f5ce22 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
- Espressobin: Simplify DT handling of board variants (Pali)
- Add Luka Perkov to maintainers of Puzzle-M801 (Luka)
- Armada 38x: Enable board specific USB2 high-speed impedance
  threshold configuration (Joshua)
2020-12-07 11:46:12 -05:00
Pali Rohár
135973967b arm: mvebu: Espressobin: Add support for emmc into dts file
To simplify setup, configuration and compilation of u-boot, define emmc
node for all Espressobin boards. Espressobin boards without populated emmc
works correctly, just detection and initialization of emmc obviously fails.

Code for emmc is extracted from commit f1a43c84a960 ("arm64: dts: a3720:
add support for espressobin with populated emmc").

Signed-off-by: Pali Rohár <pali@kernel.org>
Tested-by: Gérald Kerma <gerald@gk2.net>
2020-12-07 07:11:37 +01:00
Pali Rohár
c5c4b69857 Revert "arm64: dts: a3720: add support for espressobin with populated emmc"
This reverts commit f1a43c84a960265309fa8365759de271a70c5a7e.
2020-12-07 07:11:37 +01:00
Pali Rohár
338c5ee26a Revert "arm64: dts: armada-3720-espressobin: split common parts to .dtsi"
This reverts commit 03bb6a9b1ed7085794c5f167307273d15c99d3f0.
2020-12-07 07:11:37 +01:00
Joshua Scott
28f0cbcdd2 arm: mvebu: a38x: Configurable USB2 high-speed impedance threshold
Hardware testing of a board using the Armada 385 has shown that an
impedance threshold setting of 0x7 performs better in an eye-diagram
test than with Marvell's recommended value 0x6.

As other boards may still perform better with Marvell's reccomended value,
a configuration option is added with a default value of 0x6.

Signed-off-by: Joshua Scott <joshua.scott@alliedtelesis.co.nz>
Reviewed-by: Stefan Roese <sr@denx.de>
2020-12-07 07:11:37 +01:00
Marcel Ziswiler
2f36a693e3 imx8: allow overriding memory layout
Introduce weak function board_mem_get_layout() which allows overriding
the memory layout from board code in runtime, useful for handling
different SKU versions.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
a51fdba3fa board: toradex: add apalis-imx8x 2gb wb it v1.1a module support
This commit adds initial support for the Toradex Apalis iMX8X 2GB WB
IT V1.1A System on Module support [1].

Boot log:
U-Boot 2020.10-02940-g894aebb7e8-dirty (Oct 22 2020 - 09:43:57 +0300)
CPU:   NXP i.MX8QXP RevB A35 at 1200 MHz at 30C
DRAM:  2 GiB
MMC:   FSL_SDHC: 0, FSL_SDHC: 1
Loading Environment from MMC... OK
In:    serial@5a070000
Out:   serial@5a070000
Err:   serial@5a070000
Model: Toradex Apalis iMX8 QuadXPlus 2GB Wi-Fi / BT IT V1.1A,
Serial# 06617018
Net:   eth0: ethernet@5b040000 [PRIME]
Hit any key to stop autoboot:  0

Functionality wise the following is known to be working:
  - eMMC and MMC/SD card
  - Ethernet (*)
  - GPIOs
  - I2C

Unfortunately, there is no USB functionality for the i.MX 8QXP as of
yet.

* With the SCU FW from the latest Toradex BSP 5.0.0 (SCU FW 1.5.1)
ETH PHY encounters bring up problems after reset, this will be fixed
soon on SCU FW side.

[1] https://www.toradex.com/computer-on-modules/apalis-arm-family/nxp-imx-8x
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Igor Opaniuk
3d1103cefc ARM: dts: fsl-imx8qxp-apalis: add initial device tree
Introduce initial hierarchy of device trees for Apalis iMX8X
System on Module.

Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Tim Harvey
bc479b2118 imx8m: fix cache setup for dynamic sdram size
the mem_map structure containing the size of SDRAM is used in various
cache functions in cache_v8.c thus we need to update it with the
sdram size the board is configured with as well. Without this
the cache functions do not get setup properly and can hang
in the case where a board reports more SDRAM than defined in
PHYS_SDRAM_SIZE.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
2020-12-06 15:31:37 +01:00
Max Krummenacher
caafc6c497 ARM: dts: imx8mm-verdin: follow changed pmic
The used PMIC has been changed from RHOM BD71837 to NXP PCA9450A.
Adjust the device tree accordingly.
Remove the old ADC node as the ADC has been changed and has no longer
a separate power rail.

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Igor Opaniuk <igor.opaniuk@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2020-12-06 15:31:37 +01:00
Ian Ray
559aaa2526 board: ge: reduce VPD EEPROM partition size
Reduce vital product data size to match the latest specification.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
2020-12-06 15:31:37 +01:00
Oliver Graute
b15cd88b22 imx: ahab: fix implicit declaration warning
Fix the following warning:

arch/arm/mach-imx/imx8/ahab.c:105:3: warning: implicit declaration of function ‘flush_dcache_range’ [-Wimplicit-function-declaration]
   flush_dcache_range(s, e);
   ^~~~~~~~~~~~~~~~~~

Include cpu_func.h header which declares the flush_dcache_range()
function.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
492b728f9f imx: ahab: fix compiler warnings in debug
arch/arm/mach-imx/imx8/ahab.c: In function ‘authenticate_os_container’:
arch/arm/mach-imx/imx8/ahab.c:96:9: warning: format ‘%x’ expects argument of type
‘unsigned int’, but argument 9 has type ‘ulong {aka long unsigned int}’ [-Wformat=]
   debug("img %d, dst 0x%x, src 0x%x, size 0x%x\n",

Fix those by using "%lu" specified.

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Oliver Graute
f4433e7f27 imx: ahab: Fix compiler warnings in printf
arch/arm/mach-imx/imx8/ahab.c:110:63: warning: format ‘%x’ expects
argument of type ‘unsigned int’, but argument 2 has type ‘u64 {aka long
long unsigned int}’ [-Wformat=]

Fix those by using %llx

Signed-off-by: Oliver Graute <oliver.graute@kococonnector.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: uboot-imx <uboot-imx@nxp.com>
2020-12-06 15:31:36 +01:00
Heiko Schocher
68163c3bf0 arm: dts: aristainetos: sync with changes in linux
sync with comaptible changes in linux from
Krzysztof Kozlowski.

https://patchwork.kernel.org/project/linux-arm-kernel/patch/20200930190143.27032-12-krzk@kernel.org/

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-12-06 15:07:35 +01:00
Heiko Schocher
015c026f7a imx6: add support for aristainetos2c_cslb board variant
add support for aristainetos2c_cslb board variant.

Signed-off-by: Heiko Schocher <hs@denx.de>
2020-12-06 15:07:06 +01:00
Heiko Schocher
3cf02f5ffa imx6: remove not longer supported aristainetos boards
Removed aristainetos2, 2b, 2b-csl. This boards have been
recalled and destroyed.

Adapt board code to remove stuff not needed anymore.

Fix checkpatch warning, remove fdt_high and initrd_high
from default environment.

Signed-off-by: Heiko Schocher <hs@denx.de>
zu remove
2020-12-06 15:06:16 +01:00
Simon Glass
51bb33846a bootm: Support string substitution in bootargs
In some cases it is necessary to pass parameters to Linux so that it will
boot correctly. For example, the rootdev parameter is often used to
specify the root device. However the root device may change depending on
whence U-Boot loads the kernel. At present it is necessary to build up
the command line by adding device strings to it one by one.

It is often more convenient to provide a template for bootargs, with
U-Boot doing the substitution from other environment variables.

Add a way to substitute strings in the bootargs variable. This allows
things like "rootdev=${rootdev}" to be used in bootargs, with the
${rootdev} substitution providing the UUID of the root device.

For example, to substitute the GUID of the kernel partition:

  setenv bootargs "console=/dev/ttyS0 rootdev=${uuid}/PARTNROFF=1
		kern_guid=${uuid}"
  part uuid mmc 2:2 uuid
  bootm

This is particularly useful when the command line from another place. For
example, Chrome OS stores the command line next to the kernel itself. It
depends on the kernel version being used as well as the hardware features,
so it is extremely difficult to devise a U-Boot script that works on all
boards and kernel versions. With this feature, the command line can be
read from disk and used directly, with a few substitutions set up.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 19:48:29 -05:00
Simon Glass
488d89afb8 x86: zimage: Add silent-console processing
At present zimage does its own command-line processing and does not
support the 'silent console' feature. There doesn't seem to be any good
reason for this.

Add support for silent console to zimage.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:10:00 -05:00
Simon Glass
f158ba15ee bootm: Add tests for fixup_silent_linux()
This function currently has no tests. Export it so that we can implement
a simple test on sandbox. Use IS_ENABLED() to remove the unused code,
instead #ifdef.

Signed-off-by: Simon Glass <sjg@chromium.org>
2020-12-04 16:09:26 -05:00
Michael Walle
4c450daf7d board: sl28: add OP-TEE Trusted OS support (bl32)
Add support to load the OP-TEE Trusted OS by the SPL.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
e057760f38 board: sl28: add ATF support (bl31)
Add support to load the bl31 part of the ARM Trusted Firmware by the
SPL.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
ea22783f40 board: sl28: remove u-boot from loadable DT node
It is not needed. Remove it.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
8084e918bc armv8: layerscape: don't initialize GIC in SPL
The BL31 expects the GIC to be uninitialized. Thus, if we are loading
the BL31 by the SPL we must not initialize it. If u-boot is loaded by
the SPL directly, it will initialize the GIC again (in the same
lowlevel_init()).

This was tested on a custom board with SPL loading the BL31 and jumping
to u-boot as BL33 as well as loading u-boot directly by the SPL. In case
the ATF BL1/BL2 is used, this patch won't change anything, because no
SPL is used at all.

Signed-off-by: Michael Walle <michael@walle.cc>
2020-12-04 16:09:06 -05:00
Michael Walle
59b07a257c treewide: use CONFIG_IS_ENABLED() for ARMV8_SEC_FIRMWARE_SUPPORT
There is SPL_ARMV8_SEC_FIRMWARE_SUPPORT and ARMV8_SEC_FIRMWARE_SUPPORT.
Thus use CONFIG_IS_ENABLED() instead of the simple #ifdef.

Signed-off-by: Michael Walle <michael@walle.cc>
Acked-by: Michal Simek <michal.simek@xilinx.com>
2020-12-04 16:09:05 -05:00
Patrick Delaunay
4f5128ff89 configs: cei-tk1-som: remove CONFIG_ARMV7_PSCI in include file
Activate ARCH_SUPPORT_PSCI as other TEGRA124 target and remove
CONFIG_ARMV7_PSCI and CONFIG_ARMV7_PSCI_NR_CPUS in configs file as they
are migrated in Kconfig.

Select CONFIG_ARMV7_PSCI_0_1 (the first PSCI version),
because CONFIG_ARMV7_PSCI_0_2 and CONFIG_ARMV7_PSCI_1_0
are not activated in this product.

Hi,

This patch depend on the previous serie [1].

I don't test this patch on real hardware but
after this patch the size of the binary don't change.

In .config we have:
  CONFIG_ARCH_SUPPORT_PSCI=y
  CONFIG_ARMV7_PSCI=y
  # CONFIG_ARMV7_PSCI_1_0 is not set
  # CONFIG_ARMV7_PSCI_0_2 is not set
  CONFIG_ARMV7_PSCI_0_1=y
  CONFIG_ARMV7_PSCI_NR_CPUS=4

In u-boot.cfg, this patch only add the 2 lines
  #define CONFIG_ARCH_SUPPORT_PSCI 1
  #define CONFIG_ARMV7_PSCI_0_1 1

[1] "Convert CONFIG_ARMV7_PSCI_1_0 and CONFIG_ARMV7_PSCI_0_2 to Kconfig"
http://patchwork.ozlabs.org/project/uboot/list/?series=184029

Regards
Patrick

END

Signed-off-by: Patrick Delaunay <patrick.delaunay@st.com>
Reviewed-by: Peter Chubb <peter.chubb@data61.csiro.au>
Signed-off-by: Tom Warren <twarren@nvidia.com>
2020-12-04 13:39:15 -07:00
Robert Marko
a282ada198 IPQ40xx: clk: add USB clock handling
USB clocks were completely forgotten as driver would always return 0 even if clock ID was unknown.

This behaviour changed with "IPQ40xx: clk: dont always return 0" and this will now causes the USB-s to fail probing as clock enable will return -EINVAL.

So to fix that lets add all of the USB clocks to the driver.

Fixes: 430e1dcf ("IPQ40xx: Add USB nodes")

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00
Robert Marko
20476b51aa IPQ40xx: clk: dont always return 0
Currently the driver will go through the clock ID-s and set/enable them as needed.
But if the ID is unknown it will fall through the switch case to the default case which will always return 0.

This is not correct and default cases should return a error code since clock ID is unknown.
So lets return -EINVAL instead.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00
Robert Marko
164cc98a7b IPQ40xx: clk: drop breaks in switch case
There is no point in having break statements in the switch case as there is already a return before break.

So lets drop them from the driver.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00
Robert Marko
90534536a3 IPQ40xx: clk: use dev_read_addr()
Lets convert the driver to use dev_read_addr() instead of the devfdt_get_addr().

While we are here, lets also alphabetise the includes.

Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Cc: Luka Perkov <luka.perkov@sartura.hr>
2020-12-01 14:12:28 -05:00