8 Commits

Author SHA1 Message Date
Neil Armstrong
c26fd49e90
clk: qcom: Add SM8650 clock driver
Add the GCC and TCSRCC clock driver for the SM8650 SoC.

The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
only supports gates.

The GCC enable and set_rate callbacks contains some tweaks to
setup clocks for Debug UART, SDCard controller and USB.

The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:11 +02:00
Neil Armstrong
458123ca62
clk: qcom: Add SM8550 clock driver
Add the GCC and TCSRCC clock driver for the SM8550 SoC.

The GCC driver uses the clk-qcom infrastructure to support GDSCs,
Resets and gates. While the TCSRCC is a simpler clock driver which
only supports gates.

The GCC enable and set_rate callbacks contains some tweaks to
setup clocks for Debug UART, SDCard controller and USB.

The TCSRCC gates returns the XO frequency, which is used by the
Synopsys eUSB2 driver to determine the PHY configuration.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:10 +02:00
Caleb Connolly
dcd688229c
clk/qcom: add driver for sm8250 GCC
Add a clock driver for the SM8250 SoC. This driver can enable necessary
clocks for UART, UFS, USB, and MMC.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:05 +02:00
Caleb Connolly
60b306e12f
clk/qcom: add driver for sm6115 GCC
Add a driver for the clock controller in the SM6115 SoC, this is used in
the QRB4210 RB2 board.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:04 +02:00
Caleb Connolly
c78210fce7
clk/qcom: add driver for qcm2290 GCC
Add a clock driver for the QCM2290 SoC which is used in the QRB2210 RB1
board.

Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-23 13:29:04 +02:00
Volodymyr Babchuk
b563e766fe
clk: qcom: add support for power domains uclass
Now sub-drivers for particular SoCs can register them as power domain
drivers. This is needed for upcoming SM8150 support, because it needs
to power up the Ethernet module.

Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@epam.com>
Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
[caleb: make ARCH_SNAPDRAGON select POWER_DOMAIN]
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-04-04 17:46:45 +02:00
Caleb Connolly
fac2121a47
clk/qcom: move ipq4019 driver from mach-ipq40xx
This driver is just a stub, but it's necessary to support the upcoming
reset driver changes.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-01-16 12:26:23 +00:00
Caleb Connolly
a623c14f43
clk/qcom: move from mach-snapdragon
Clock drivers don't belong here, move them to the right place and
declutter mach-snapdragon a bit.

To de-couple these drivers from specific "target" platforms, add
additional config options to enable each clock driver gated behind a
common CLK_QCOM option and enable them by default for the respective
targets. This will make future work easier as we move towards a generic
Qualcomm target.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2024-01-16 12:26:23 +00:00