917 Commits

Author SHA1 Message Date
Tom Rini
7410cde67d arm: Remove <common.h> and add needed includes
Remove <common.h> from the remainder of the files under arch/arm and
when needed add missing include files directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06 15:06:34 -06:00
Tom Rini
935b60f883 arm: fsl-layerscape: Remove <common.h> and add needed includes
Remove <common.h> from all fsl-layerscape related files and when needed
add missing include files directly.

Acked-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2024-05-06 15:06:34 -06:00
Michal Simek
81f3a665ab common: Convert *.c/h from UTF-8 to ASCII enconfing
Convert UTF-8 chars to ASCII in cases where make sense. No Copyright or
names are converted.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Acked-by: Marek Behún <kabel@kernel.org>
2024-04-22 11:01:48 -06:00
Pierre-Clément Tosi
4b36f01201 arm64: Fix map_range() not splitting mapped blocks
The implementation of map_range() creates the requested mapping by
walking the page tables, iterating over multiple PTEs and/or descending
into existing table mappings as needed. When doing so, it assumes any
pre-existing valid PTE to be a table mapping. This assumption is wrong
if the platform code attempts to successively map two overlapping ranges
where the latter intersects a block mapping created for the former.

As a result, map_range() treats the existing block mapping as a table
mapping and descends into it i.e. starts interpreting the
previously-mapped range as an array of PTEs, writing to them and
potentially even descending further (extra fun with MMIO ranges!).

Instead, pass any valid non-table mapping to split_block(), which
ensures that it actually was a block mapping (calls panic() otherwise)
before splitting it.

Fixes: 41e2787f5ec4 ("arm64: Reduce add_map() complexity")
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
Tested-by: Fabio Estevam <festevam@gmail.com>
Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Toradex Verdin AM62
Reviewed-by: Marc Zyngier <maz@kernel.org>
2024-04-10 08:41:00 -06:00
Tom Rini
6e2228fb05 Merge patch series "Clean up arm linker scripts"
Ilias Apalodimas <ilias.apalodimas@linaro.org> says:

The arm linker scripts had a mix of symbols and C defined variables in an
effort to emit relative references instead of absolute ones e.g [0]. A
linker bug prevented us from doing so [1] -- fixed since 2016.
This has led to confusion over the years, ending up with mixed section
definitions. Some sections are defined with overlays and different
definitions between v7 and v8 architectures.
For example __efi_runtime_rel_start/end is defined as a linker symbol for
armv8 and a C variable in armv7.

Linker scripts nowadays can emit relative references, as long as the symbol
definition is contained within the section definition. So let's switch most
of the C defined variables and clean up the arm sections.c file.
There's still a few symbols remaining -- __secure_start/end,
__secure_stack_start/end and __end which can be cleaned up
in a followup series.

For both QEMU v7/v8 bloat-o-meter shows now size difference
$~ ./scripts/bloat-o-meter u-boot u-boot.new
add/remove: 0/0 grow/shrink: 0/0 up/down: 0/0 (0)
Function                                     old     new   delta
Total: Before=798861, After=798861, chg +0.00%

The symbols seem largely unchanged apart from a difference in .bss
as well as the emited sections and object types of the affected variables.

On the output below the first value is from -next and the second comes from
-next + this patchset. The .bss_start/end sections have disappeared from
the newer binaries.

# For example on QEMU v8:
efi_runtime_start
  7945: 0000000000000178     0 OBJECT  GLOBAL DEFAULT    2 __efi_runtime_start
  7942: 0000000000000178     0 NOTYPE  GLOBAL DEFAULT    2 __efi_runtime_start
efi_runtime_stop
  9050: 0000000000000d38     0 OBJECT  GLOBAL DEFAULT    2 __efi_runtime_stop
  9047: 0000000000000d38     0 NOTYPE  GLOBAL DEFAULT    2 __efi_runtime_stop
__efi_runtime_rel_start
  7172: 00000000000dc2f0     0 OBJECT  GLOBAL DEFAULT   10 __efi_runtime_rel_start
  7169: 00000000000dc2f0     0 NOTYPE  GLOBAL DEFAULT   10 __efi_runtime_rel_start
__efi_runtime_rel_stop
  7954: 00000000000dc4a0     0 OBJECT  GLOBAL DEFAULT   10 __efi_runtime_rel_stop
  7951: 00000000000dc4a0     0 NOTYPE  GLOBAL DEFAULT   10 __efi_runtime_rel_stop
__rel_dyn_start
  7030: 00000000000dc4a0     0 OBJECT  GLOBAL DEFAULT   11 __rel_dyn_start
  7027: 00000000000dc4a0     0 NOTYPE  GLOBAL DEFAULT   11 __rel_dyn_start
__rel_dyn_end
  8959: 0000000000102b10     0 OBJECT  GLOBAL DEFAULT   12 __rel_dyn_end
  8956: 0000000000102b10     0 NOTYPE  GLOBAL DEFAULT   11 __rel_dyn_end
image_copy_start
  9051: 0000000000000000     0 OBJECT  GLOBAL DEFAULT    1 __image_copy_start
  9048: 0000000000000000     0 NOTYPE  GLOBAL DEFAULT    1 __image_copy_start
image_copy_end
  7467: 00000000000dc4a0     0 OBJECT  GLOBAL DEFAULT   11 __image_copy_end
  7464: 00000000000dc4a0     0 NOTYPE  GLOBAL DEFAULT   11 __image_copy_end
bss_start
    12: 0000000000102b10     0 SECTION LOCAL  DEFAULT   12 .bss_start
  8087: 0000000000000018     0 NOTYPE  GLOBAL DEFAULT    1 _bss_start_ofs
  8375: 0000000000102b10     0 OBJECT  GLOBAL DEFAULT   12 __bss_start
  8084: 0000000000000018     0 NOTYPE  GLOBAL DEFAULT    1 _bss_start_ofs
  8372: 0000000000102b10     0 NOTYPE  GLOBAL DEFAULT   12 __bss_start
bss_end
    14: 000000000010bc30     0 SECTION LOCAL  DEFAULT   14 .bss_end
  7683: 000000000010bc30     0 OBJECT  GLOBAL DEFAULT   14 __bss_end
  8479: 0000000000000020     0 NOTYPE  GLOBAL DEFAULT    1 _bss_end_ofs
  7680: 000000000010bbb0     0 NOTYPE  GLOBAL DEFAULT   12 __bss_end
  8476: 0000000000000020     0 NOTYPE  GLOBAL DEFAULT    1 _bss_end_ofs

# For QEMU v7:
efi_runtime_start
 10703: 000003bc     0 OBJECT  GLOBAL DEFAULT    2 __efi_runtime_start
 10699: 000003c0     0 NOTYPE  GLOBAL DEFAULT    2 __efi_runtime_start
efi_runtime_stop
 11796: 000012ec     0 OBJECT  GLOBAL DEFAULT    2 __efi_runtime_stop
 11792: 000012ec     0 NOTYPE  GLOBAL DEFAULT    2 __efi_runtime_stop
__efi_runtime_rel_start
  9937: 000c40dc     0 OBJECT  GLOBAL DEFAULT    8 __efi_runtime_rel_start
  9935: 000c40dc     0 NOTYPE  GLOBAL DEFAULT    9 __efi_runtime_rel_start
__efi_runtime_rel_stop
 10712: 000c41dc     0 OBJECT  GLOBAL DEFAULT   10 __efi_runtime_rel_stop
 10708: 000c41dc     0 NOTYPE  GLOBAL DEFAULT    9 __efi_runtime_rel_stop
__rel_dyn_start
  9791: 000c41dc     0 OBJECT  GLOBAL DEFAULT   10 __rel_dyn_start
  9789: 000c41dc     0 NOTYPE  GLOBAL DEFAULT   10 __rel_dyn_start
__rel_dyn_end
 11708: 000da5f4     0 OBJECT  GLOBAL DEFAULT   10 __rel_dyn_end
 11704: 000da5f4     0 NOTYPE  GLOBAL DEFAULT   10 __rel_dyn_end
image_copy_start
   448: 0000177c     0 NOTYPE  LOCAL  DEFAULT    3 _image_copy_start_ofs
 11797: 00000000     0 OBJECT  GLOBAL DEFAULT    1 __image_copy_start
   445: 0000177c     0 NOTYPE  LOCAL  DEFAULT    3 _image_copy_start_ofs
 11793: 00000000     0 NOTYPE  GLOBAL DEFAULT    1 __image_copy_start
image_copy_end
   450: 00001780     0 NOTYPE  LOCAL  DEFAULT    3 _image_copy_end_ofs
 10225: 000c41dc     0 OBJECT  GLOBAL DEFAULT   10 __image_copy_end
   447: 00001780     0 NOTYPE  LOCAL  DEFAULT    3 _image_copy_end_ofs
 10222: 000c41dc     0 NOTYPE  GLOBAL DEFAULT   10 __image_copy_end
bss_start
    11: 000c41dc     0 SECTION LOCAL  DEFAULT   11 .bss_start
 11124: 000c41dc     0 OBJECT  GLOBAL DEFAULT   11 __bss_start
 11120: 000c41dc     0 NOTYPE  GLOBAL DEFAULT   11 __bss_start
bss_end
    13: 000cbbf8     0 SECTION LOCAL  DEFAULT   13 .bss_end
 10442: 000cbbf8     0 OBJECT  GLOBAL DEFAULT   13 __bss_end
 10439: 000cbbf8     0 NOTYPE  GLOBAL DEFAULT   11 __bss_end

It's worth noting that since the efi regions are affected by the change, booting
with EFI is preferable while testing. Booting the kernel only should be enough
since the efi stub and the kernel proper do request boottime and runtime
services respectively.
Something along the lines of
> virtio scan && load virtio 0 $kernel_addr_r Image && bootefi $kernel_addr_r
will work for QEMU aarch64.

Tested platforms:
- QEMU aarch64
- Xilinx kv260 kria starter kit & zynq
- QEMU armv7
- STM32MP157C-DK2

[0] commit 3ebd1cbc49f0 ("arm: make __bss_start and __bss_end__ compiler-generated")
[1] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
2024-03-29 10:39:38 -04:00
Ilias Apalodimas
7828a1eeb2 arm: remove redundant section alignments
Previous patches cleaning up linker symbols, also merged any explicit
. = ALIGN(x); into section definitions -- e.g
.bss ALIGN(x) : instead of

. = ALIGN(x);
. bss : {...}

However, if the output address is not specified then one will be chosen
for the section. This address will be adjusted to fit the alignment
requirement of the output section following the strictest alignment of
any input section contained within the output section. So let's get rid
of the redundant ALIGN directives when they are not needed.

While at add comments for the alignment of __bss_start/end since our
C runtime setup assembly assumes that __bss_start - __bss_end will be
a multiple of 4/8 for armv7 and armv8 respectively.

It's worth noting that the alignment is preserved on .rel.dyn for
mach-zynq which was explicitly aligning that section on an 8b
boundary instead of 4b one.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-03-29 10:39:25 -04:00
Ilias Apalodimas
4ee32ea0c4 arm: move image_copy_start/end to linker symbols
image_copy_start/end are defined as c variables in order to force the compiler
emit relative references. However, defining those within a section definition
will do the same thing since [0].

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
a section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")

Suggested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-03-29 10:39:25 -04:00
Ilias Apalodimas
742752afc0 arm: clean up v7 and v8 linker scripts for __rel_dyn_start/end
commit 47bd65ef057f ("arm: make __rel_dyn_{start, end} compiler-generated")
were moving the __rel_dyn_start/end on c generated variables that were
injected in their own sections. The reason was that we needed relative
relocations for position independent code and linker bugs back then
prevented us from doing so [0].

However, the linker documentation pages states that symbols that are
defined within a section definition will create a relocatable
type with the value being a fixed offset from the base of a section [1].

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
[1] https://sourceware.org/binutils/docs/ld/Expression-Section.html

Suggested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-03-29 10:39:25 -04:00
Ilias Apalodimas
6b7f91cd83 arm: fix __efi_runtime_rel_start/end definitions
__efi_runtime_rel_start/end are defined as c variables for arm7 only in
order to force the compiler emit relative references. However, defining
those within a section definition will do the same thing since [0].
On top of that the v8 linker scripts define it as a symbol.

So let's remove the special sections from the linker scripts, the
variable definitions from sections.c and define them as a symbols within
the correct section.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")

Suggested-by: Sam Edwards <CFSworks@gmail.com>
Reviewed-by: Sam Edwards <CFSworks@gmail.com>
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-03-29 10:39:25 -04:00
Ilias Apalodimas
faf396aa1d arm: clean up v7 and v8 linker scripts for bss_start/end
commit 3ebd1cbc49f0 ("arm: make __bss_start and __bss_end__ compiler-generated")
and
commit f84a7b8f54db ("ARM: Fix __bss_start and __bss_end in linker scripts")
were moving the bss_start/end on c generated variables that were
injected in their own sections. The reason was that we needed relative
relocations for position independent code and linker bugs back then
prevented us from doing so [0].

However, the linker documentation pages states that symbols that are
defined within a section definition will create a relocatable type with
the value being a fixed offset from the base of a section [1].
So let's start cleaning this up starting with the bss_start and bss_end
variables. Convert them into symbols within the .bss section definition.

[0] binutils commit 6b3b0ab89663 ("Make linker assigned symbol dynamic only for shared object")
[1] https://sourceware.org/binutils/docs/ld/Expression-Section.html

Tested-by: Caleb Connolly <caleb.connolly@linaro.org> # Qualcomm sdm845
Tested-by: Sam Edwards <CFSworks@gmail.com> # Binary output identical
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2024-03-29 10:39:25 -04:00
Lukasz Wiecaszek
95167db37c arm: Check FEAT_CCIDX when parsing ccsidr_el1 register
Current Cache Size ID Register (ccsidr_el1) has two "flavors"
depending on whether FEAT_CCIDX is implemented or not.
When FEAT_CCIDX is implemented Associativity parameter
is coded on bits [23:3] and NumSets parameter on bits [55:32].
When FEAT_CCIDX is not implemented then Associativity parameter
is coded on bits [12:3] and NumSets parameter on bits [27:13].
Current U-Boot code does not check whether FEAT_CCIDX is implemented
and always parses ccsidr_el1 as if FEAT_CCIDX was not implemented.
This is of course wrong on systems where FEAT_CCIDX is implemented.
This patch fixes that problems and tests whether FEAT_CCIDX
is implemented or not and accordingly parses the ccsidr_el1 register.

Signed-off-by: Lukasz Wiecaszek <lukasz.wiecaszek@gmail.com>
2024-03-19 18:40:47 -04:00
Tom Rini
ea3348ebc2 Merge patch series "Handoff bloblist from previous boot stage"
Raymond Mao <raymond.mao@linaro.org> says:

This patch set adds/adapts a few bloblist APIs and implements Arm arch
custom function to retrieve the bloblist (aka. Transfer List) from
previous loader via boot arguments when BLOBLIST option is enabled and
all boot arguments are compliant to the register conventions defined
in the Firmware Handoff spec v0.9.

If an arch wishes to have different behaviors for loading bloblist
from the previous boot stage, it is required to implement the custom
function xferlist_from_boot_arg().
2024-02-29 09:24:49 -05:00
Raymond Mao
11f3171256 arm: armv8: save boot arguments
Save boot arguments x[0-3] into an array for handover of bloblist from
previous boot stage.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Suggested-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2024-02-29 09:24:22 -05:00
Mike Looijmans
121696c957 fsl-layerscape/soc.c: do not destroy bootcmd environment
When an XXX_BOOTCOMMAND isn't defined, the result is that bootcmd is set
to some random memory content. Fix it so that the function does nothing
in that case and leaves the bootcmd environment unmodified.

Signed-off-by: Mike Looijmans <mike.looijmans@topic.nl>
Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org>
2024-02-08 10:45:32 +08:00
Chris Packham
0585c28fda Revert "arm64: Use FEAT_HAFDBS to track dirty pages when available"
This reverts commit 6cdf6b7a340db4ddd008516181de7e08e3f8c213. This is
part of a series trying to make use of the arm64 hardware features for
tracking dirty pages. Unfortunately this series causes problems for the
AC5/AC5X SoCs. Having exhausted other options the consensus seems to be
reverting this series is the best course of action.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2023-11-17 11:58:26 -05:00
Chris Packham
eed8294b75 Revert "arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present"
This reverts commit 836b8d4b205d2175b57cb9ef271e638b0c116e89. This is
part of a series trying to make use of the arm64 hardware features for
tracking dirty pages. Unfortunately this series causes problems for the
AC5/AC5X SoCs. Having exhausted other options the consensus seems to be
reverting this series is the best course of action.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2023-11-17 11:58:26 -05:00
Chris Packham
ee23d7466c Revert "armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present"
This reverts commit c1da6fdb5c239b432440721772d993e63cfdeb20. This is
part of a series trying to make use of the arm64 hardware features for
tracking dirty pages. Unfortunately this series causes problems for the
AC5/AC5X SoCs. Having exhausted other options the consensus seems to be
reverting this series is the best course of action.

Signed-off-by: Chris Packham <judge.packham@gmail.com>
2023-11-17 11:58:26 -05:00
Andre Przywara
beeace9ba1 sunxi: refactor serial base addresses to avoid asm/arch/cpu.h
At the moment we have each SoC's memory map defined in its own cpu.h,
which is included in include/configs/sunxi_common.h. This will be a
problem with the introduction of Allwinner RISC-V support.

Remove the inclusion of that header file from the common config header,
instead move the required serial base addresses (for the SPL) into a
separate header file. Then include the original cpu.h file only where
we really need it, which is only under arch/arm now.

This disentangles the architecture specific header files from the
generic code.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2023-10-22 23:41:52 +01:00
Laurentiu Tudor
b9112cdfb5 armv8: fsl-layerscape: make some functions static
Some functions are not used outside this file, so make them static.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Laurentiu Tudor
487fa1aa97 fsl-layerscape: drop obsolete PPA secure firmware support
PPA was a secure firmware developed in-house which is no longer
supported and replaced by TF-A quite some years ago. Drop support
for it.

Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-10-10 10:13:32 +08:00
Simon Glass
9cbdc3a0fc spl: Rename SYS_SPL_ARGS_ADDR to SPL_PAYLOAD_ARGS_ADDR
Rename this so that SPL is first, as per U-Boot convention. Also add
PAYLOAD_ since this is where in memory the parameters for the payload
have been stored.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-10-06 14:38:11 -04:00
Simon Glass
6a32bfae61 freescale: Drop call to init_func_vid() in the init sequence
Use the misc_init_f event instead, which is designed for this purpose.

All boards with CONFIG_VID already enable CONFIG_EVENT.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-08-31 13:16:55 -04:00
Tom Rini
7e6e40c572 Prepare v2023.10-rc3
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmTjxwsACgkQFHw5/5Y0
 tyz4TAwAtVgllQGPVNIVDaEBdG93htm1DoZPc4EMZ4L5rf0nT0yJPeOhRCGygYY+
 zYL1ueleBZtpJhYOuHGetSns0B/M5Wx7gu1eGHNGrMNHH7zCV5Ynjjee2IaqKgbU
 tdSSc8XQpJ3PJY6rhJ6qZ7pO/EcUlQEdqplEUGFmA4JObx43j1+bmqyGTJA57vEw
 rrr+tyUVlr+Wv4lqlX/YJWzAB6IoSMUStv34M2lmiZvZoTYHezvIqBK33GrQ4Cwl
 hQ8nP7ymBXdA5GoMFBpfaBCA7aX3esx4yYN3JIRNRjNmnITJHYs0G8oIh8R5iNnJ
 psroU7GRPu3MmXfOnHlRfA/v0mo8xQGc2RQHyZUGXuApTI8+SFK/4WJPBny/IYse
 ggcVCHoI57dx1+j4+JHYhh61bMR1JUwARs4/UU4dKT3MRZM8Gb99OvbXO3+switZ
 R0YHSnDP///MTC7/MzbOPWzsJiTn9gkZd8nFVTXoncrVI8F3OtCc89G4HBruBSj7
 ptfylxqH
 =VlzD
 -----END PGP SIGNATURE-----

Merge tag 'v2023.10-rc3' into next

Prepare v2023.10-rc3

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-08-21 17:32:17 -04:00
Kevin Chen
fe85863086 armv8: Skip PIE in SPL due to load alignment fault.
When PIE is enabled in start.S, u-boot/-spl use __rel_dyn_start
and _rel_dyn_end symbol to be loaded to and executed at a
different address than it was linked at.

u-boot-spl.lds is used in SPL build, but relocation information
section(.rela*) were discarded.
In line number 80 in arch/arm/cpu/armv8/u-boot-spl.lds
 /DISCARD/ : { *(.rela*) }

If PIE enabled in SPL, __rel_dyn_start which is defined as
.rel_dyn_start in sections.c will be apended to the end of
.bss section.

In our ASPEED case, size of .bss section would let .rel_dyn_start
without 8-byte alignment, leading to alignment fault when
executing ldp instuction in pie_fix_loop.

Signed-off-by: Kevin Chen <kevin_chen@aspeedtech.com>
2023-08-17 16:39:20 -04:00
Tom Rini
a077ac13d0 Kconfigs: Correct default of "0" on hex type entries
It is not a parse error to have a default value of "0" for a "hex" type
entry, instead of "0x0".  However, "0" and "0x0" are not treated the
same even by the tools themselves. Correct this by changing the default
value from "0" to "0x0" for all hex type questions that had the
incorrect default. Fix one instance (in two configs) of a default of "0"
being used on a hex question to be "0x0". Remove the cases where a
defconfig had set a value of "0x0" to be used as the default had been
"0".

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-08-09 09:21:42 -04:00
Shenlin Liang
0f621ca9b9 arm64: fsl: layerscape: Remove unused functions
Function board_switch_core_volt has not been used since it was
defined

Signed-off-by: Shenlin Liang <liangshenlin@eswincomputing.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2023-08-09 16:17:53 +08:00
Abdellatif El Khlifi
d998735179 arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
add support for x0-x17 registers used by the SMC calls

In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
Results are returned in x0-x17.

This work is inspired from the following kernel commit:

arm64: smccc: Add support for SMCCCv1.2 extended input/output registers

[1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token=

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2023-08-08 10:22:03 -04:00
Mathew McBride
07164d0ef1 arch: arm: fsl-layerscape: allow "opt-out" of fsl_setenv_bootcmd
Allow individual Layerscape boards to opt-out of fsl_setenv_bootcmd
by declaring the original function as weak.

fsl_setenv_bootcmd is used to change the bootcmd based on the
TF-A boot source (e.g QSPI vs SD/MMC) for reasons including
secure boot / integrity measurements and DPAA2 configuration loading.
See previous discussion at [1].

On the Ten64 board, our bootcmd is the same across
all TF-A boot sources so we don't want this behaviour.

Signed-off-by: Mathew McBride <matt@traverse.com.au>

[1] https://patchwork.ozlabs.org/project/uboot/patch/20211110044639.7070-3-matt@traverse.com.au/#2790037

Reviewed-by: Peng Fan <peng.fan@nxp.com>
2023-08-03 09:40:50 -04:00
Tom Rini
94e7cb181a Revert "Merge branch '2023-07-24-introduce-FF-A-suppport'"
This reverts commit d927d1a80843e1c3e2a3f0b8f6150790bef83da1, reversing
changes made to c07ad9520c6190070513016fdb495d4703a4a853.

These changes do not pass CI currently.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-07-24 19:51:05 -04:00
Abdellatif El Khlifi
096d471a76 arm64: smccc: add support for SMCCCv1.2 x0-x17 registers
add support for x0-x17 registers used by the SMC calls

In SMCCC v1.2 [1] arguments are passed in registers x1-x17.
Results are returned in x0-x17.

This work is inspired from the following kernel commit:

arm64: smccc: Add support for SMCCCv1.2 extended input/output registers

[1]: https://documentation-service.arm.com/static/5f8edaeff86e16515cdbe4c6?token=

Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Tom Rini <trini@konsulko.com>
2023-07-24 15:30:02 -04:00
Michal Simek
1be82afa80 global: Use proper project name U-Boot
Use proper project name in comments, Kconfig, readmes.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Qu Wenruo <wqu@suse.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/0dbdf0432405c1c38ffca55703b6737a48219e79.1684307818.git.michal.simek@amd.com
2023-06-12 13:24:31 +02:00
Mathew McBride
8586a93868 armv8: fsl-layerscape: check for crypto node first in fdt_fixup_remove_jr
This a problem I found while updating the U-Boot fsl-ls1088a.dtsi
to match the Linux version.

fdt_fixup_remove_jr did not check whether there was a "crypto"
alias in the device tree before calling more fdt_* functions,
which resulted in a crash.

Fixes: a797f274
("ARMv8/sec_firmware : Update chosen/kaslr-seed with random number")

Signed-off-by: Mathew McBride <matt@traverse.com.au>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Tested-by: Ioana Ciornei <ioana.ciornei@nxp.com> # on LS1088A-RDB
2023-05-05 09:46:03 +08:00
Tom Rini
a27c8ea7f7 arm: Centralize fixed register logic
When building for ARM64, we need to pass -ffixed-x18 and otherwise pass
-ffixed-r9. Rather than having this logic in two places, we can do this
once in arch/arm/config.mk. Further, while gcc will ignore being passed
both -ffixed-r9 and -ffixed-x18 and simply use -ffixed-x18, clang will
note that -ffixed-r9 is not used. Remove this duplication to also remove
the warning.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-04-25 15:31:27 -04:00
meitao
c1da6fdb5c armv8: enable HAFDBS for other ELx when FEAT_HAFDBS is present
u-boot could be run at EL1/EL2/EL3. so we set it as same as EL1 does.
otherwise it will hang when enable mmu, that is what we encounter
in our SOC.

Signed-off-by: meitao <meitaogao@asrmicro.com>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3bf38943ae
2023-04-25 15:31:27 -04:00
Marc Zyngier
836b8d4b20 arm64: Use level-2 for largest block mappings when FEAT_HAFDBS is present
In order to make invalidation by VA more efficient, set the largest
block mapping to 2MB, mapping it onto level-2. This has no material
impact on u-boot's runtime performance, and allows a huge speedup
when cleaning the cache.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 417a73581a
2023-04-25 15:31:27 -04:00
Marc Zyngier
6cdf6b7a34 arm64: Use FEAT_HAFDBS to track dirty pages when available
Some recent arm64 cores have a facility that allows the page
table walker to track the dirty state of a page. This makes it
really efficient to perform CMOs by VA as we only need to look
at dirty pages.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[ Paul: pick from the Android tree. Rebase to the upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 3c433724e6
2023-04-25 15:31:27 -04:00
Marc Zyngier
94d30f476f arm64: Reduce PT size estimation complexity
count_required_pts()'s complexity is high if mappings are not using the
largest possible block size (due to some other requirement such as tracking
dirty pages, for example).

Let's switch to a method that follows the pattern established with
the add_map() helper, and make it almost instantaneous instead of
taking a large amount of time if 2MB mappings are in use instead of
1GB.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
  upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 5d756d147e
Link: 6be9330601
2023-03-06 17:03:56 -05:00
Marc Zyngier
41e2787f5e arm64: Reduce add_map() complexity
In the add_map() function, for each level it populates, it iterates from
the root of the PT tree, making it ineficient if a mapping needs to occur
past level 1.

Instead, replace it with a recursive (and much simpler) algorithm
that keeps the complexity as low as possible. With this, mapping
512GB at level 2 goes from several seconds down to not measurable
on an A55 machine.

We keep the block mappings at level 1 for now though.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. Rebase to the
  upstream ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: 96ad729cf4
Link: 6be9330601
2023-03-06 17:03:56 -05:00
Marc Zyngier
46dc542870 arm: cpu: Add optional CMOs by VA
Exposing set/way cache maintenance to a virtual machine is unsafe, not
least because the instructions are not permission-checked but also
because they are not broadcast between CPUs. Consequently, KVM traps and
emulates such maintenance in the host kernel using by-VA operations and
looping over the stage-2 page-tables. However, when running under
protected KVM, these instructions are not able to be emulated and will
instead result in an exception being delivered to the guest.

Introduce CONFIG_CMO_BY_VA_ONLY so that virtual platforms can select
this option and perform by-VA cache maintenance instead of using the
set/way instructions.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <willdeacon@google.com>
Signed-off-by: Pierre-Clément Tosi <ptosi@google.com>
[ Paul: pick from the Android tree. Fixup Pierre's commit. And fix some
  checkpatch warnings. Rebased to upstream. ]
Signed-off-by: Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>
Cc: Tom Rini <trini@konsulko.com>
Link: db5507f47f
Link: 2baf54e743
2023-03-06 17:03:55 -05:00
Simon Glass
e7ec875dd1 Correct SPL use of SYS_FSL_ERRATUM_A010539
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_SYS_FSL_ERRATUM_A010539 defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-10 07:41:40 -05:00
Simon Glass
dbcbbfd725 mtd: Drop unused CONFIG_S32V234
This option does not exist, so the Makefile rule does nothing. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-02-07 14:33:49 -05:00
Marek Vasut
11a1a3b73d arm: psci: Fix RESET2 hook
The RESET2 hook is a PSCI v1.1 functionality, rename the macro accordinly.
Add missing handler for the RESET2 hook, so it can be implemented by U-Boot.

Signed-off-by: Marek Vasut <marex@denx.de>
2023-01-31 15:46:39 +01:00
Andre Przywara
4871650c95 sunxi: armv8: fel: load only 32-bit values
Both the values and the MMIO addresses that we need during the 64-bit FEL
restore are smaller than 2^32, so we don't need to do any 64-bit loads.

Change the loads to only load 32 bits worth of data, that saves us some
bytes for storing the values.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
Tested-by: Samuel Holland <samuel@sholland.org>
2023-01-21 01:32:23 +00:00
Tom Rini
6e7df1d151 global: Finish CONFIG -> CFG migration
At this point, the remaining places where we have a symbol that is
defined as CONFIG_... are in fairly odd locations. While as much dead
code has been removed as possible, some of these locations are simply
less obvious at first. In other cases, this code is used, but was
defined in such a way as to have been missed by earlier checks.  Perform
a rename of all such remaining symbols to be CFG_... rather than
CONFIG_...

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
2023-01-20 12:27:24 -05:00
Tom Rini
a84fa1bef4 nxp: Finish migration of SYS_FSL_SRDS_[12] to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
listed in arch/Kconfig.nxp and match how they're currently used by
select'ing them under the required PowerPC ARCH_xxx options.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:23 -05:00
Tom Rini
89c90cadf3 nxp: Finish migration of SYS_FSL_IFC_BANK_COUNT to Kconfig
As this is used on both ARM and PowerPC platforms, this needs to be
asked in arch/Kconfig.nxp.  Set the PowerPC defaults based on
arch/powerpc/include/asm/config_mpc85xx.h and remove the default set in
drivers/mtd/nand/raw/fsl_ifc_nand.c

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
80c75ce00d fsl-layerscape: Rework usage of CONFIG_CLUSTER_CLK_FREQ
In the case where CONFIG_CLUSTER_CLK_FREQ is not defined, simply set
cluster_clk to get_board_sys_clk().

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Tom Rini
ae8a922bd2 arm: Rework usage of CONFIG_ARMV[78]_SECURE_BASE in linker scripts
In order to avoid defining CONFIG_ARMV[78_]SECURE_BASE as empty in the
linker scripts, if not already defined, add and use
__ARMV[78_]SECURE_BASE for when the base is not defined and we want the
linker scripts to continue.

Signed-off-by: Tom Rini <trini@konsulko.com>
2023-01-20 12:27:06 -05:00
Simon Glass
d81d17637a arm: Support trace on armv8
Use the notrace attribute so that timer functions can be used when
tracing. This is required to avoid infinite loops when recording a trace.

Signed-off-by: Simon Glass <sjg@chromium.org>
2023-01-18 11:49:13 -07:00
Tom Rini
f5dd0c5e19 configs: Remove unused or redundant CONFIG symbols
A number of CONFIG symbols have crept in that are never referenced in
code, so drop them here. Further, we have two symbols being enabled
in headers while already enabled correctly in Kconfig, so these lines
can also be removed.

Signed-off-by: Tom Rini <trini@konsulko.com>
2022-12-23 10:15:13 -05:00