Commit Graph

3611 Commits

Author SHA1 Message Date
Baruch Siach
9d169ac973 net: designware: fix bus address dereference
Device bus address might not be valid for direct access when the bus
address and CPU address are not the same. Use dev_bus_to_phys() to
translate bus address back to CPU address.

Fixes: 3d98b8c504 ("net: designware: Invalidate RX buffer cache before freeing the DMA descriptor")
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
2025-06-22 10:16:29 -06:00
Martin Kaistra
6759bd73e9 net: gem: ignore tx_clk if MII is used
If the MII interface is used, the PHY is the clock master, thus don't
set the clock rate. On Zynq-7000, this will prevent the following
error:
  zynq_gem ethernet@e000b000: failed to set tx clock rate 25000000

Signed-off-by: Martin Kaistra <martin.kaistra@linutronix.de>
Link: https://lore.kernel.org/r/20250415150400.136723-1-martin.kaistra@linutronix.de
Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-06-02 09:13:49 +02:00
Thomas Schaefer
9373e5aecf net: fsl_enetc: fix imdio register calculation
With commit cc4e8af2c5, fsl_enetc register accessors have been split to
handle different register offsets on different SoCs. However, for
internal MDIO register calculation, only ENETC_PM_IMDIO_BASE was fixed
without adding the SoC specific MAC register offset.

As a result, the network support for the Kontron SMARC-sAL28 and
probably other boards based on the LS1028A CPU is broken.

Add the SoC specific MAC register offset to calculation of imdio.priv to
fix this.

Fixes: cc4e8af2c5 ("net: fsl_enetc: Split register accessors")
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # LS1028A
Tested-by: Tim Harvey <tharvey@gateworks.com> # imx95_19x19_evk
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
2025-05-12 18:43:19 -03:00
Nikunj Kela
fff21d27a9 net: dwc: xgmac: Allow DMA buffers above 4GB
Currently, Synopsis xgmac driver only works if DMA region is under 4GB.
This change enables the DMA buffers allocations above 4GB memory
regions.

Signed-off-by: Nikunj Kela <nikunj.kela@sima.ai>
2025-05-09 15:02:38 -06:00
Christoph Fritz
115a0cb9a2 net: gmac_rockchip: Add RMII support for rk3288
Add RMII-specific handling to rk3288_gmac_fix_mac_speed() so that it
properly sets the RMII clock (2.5 MHz vs. 25 MHz) and speed bits
(10 Mbps vs. 100 Mbps). Also define a new rk3288_gmac_set_to_rmii()
function to set the PHY interface field and RMII_MODE bit.

Signed-off-by: Christoph Fritz <chf.fritz@googlemail.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-05-08 11:48:13 +08:00
ZhiJie.zhang
81191427a4 eth: Support E1000E I225-V
1. Add pcie device id 0x15f3
2. Add IIC phy id 0x67C9DC00

Signed-off-by: ZhiJie.Zhang <zhangzhijie@bosc.ac.cn>
2025-05-05 14:16:50 -06:00
Christophe Roullier
20afca89ed net: dwc_eth_qos: add support of stm32mp2 platform
Add compatible "st,stm32mp25-dwmac" to manage STM32MP2 boards

Signed-off-by: Christophe Roullier <christophe.roullier@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-05-05 15:51:47 +02:00
Paul Barker
2fc48febcd net: ravb: Add RZ/G2L Support
The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
interfaces which can be supported using the ravb driver. Some RZ/G2L
specific steps need to be taken during initialization due to differences
between this SoC and previously supported SoCs. We also need to ensure
that the module reset is de-asserted after the module clock is enabled
but before any Ethernet register reads/writes take place.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:25:03 +02:00
Paul Barker
46706c3427 net: ravb: Add optional reset deassertion
In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we introduce optional de-assertion and re-assertion of
a reset signal in ravb_probe() and ravb_remove().

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:25:03 +02:00
Paul Barker
ba2d1d7666 net: ravb: Refactor out R-Car specific code
In order to add support for the Renesas RZ/G2L Ethernet IP in a
subsequent patch, we move all R-Car specific code into new functions and
introduce a device_ops function pointer table.

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:25:03 +02:00
Marek Vasut
6fae565f54 net: ravb: Fix RX error handling
Correctly handle RX errors in ravb_recv() by returning 0 instead
of -EAGAIN on RX error.

In case the RAVB driver detects an RX error in ravb_recv(), it must
not return the -EAGAIN, but instead must return 0. Both error codes
are handled in eth-uclass.c eth_rx() and -EAGAIN is rewritten to 0
at the end of eth_rx(), but negative return code from the .recv()
callback does not trigger .free_pkt() callback, which would clean
up and re-enqueue the descriptor which holds the currently received
corrupted packet. The .free_pkt() must be called for this descriptor,
otherwise the follow up received data become corrupted too, even if
those packets are correctly received. Returning 0 from the .recv()
callback assures the corrupted packet is not processed by the network
stack, but is skipped instead.

For TFTP loading, an RX error produces the timeout "T" output and
resumes the TFTP loading operation shortly afterward, without any
data corruption.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-05-04 20:23:31 +02:00
Siddharth Vadapalli
05dc050059 net: ti: am65-cpsw-nuss: invoke phy_config() in driver's .start callback
Currently, the phy_config() API is invoked by the driver only once since it
has been probed. While this works in general, it doesn't allow the driver
to bring the PHY back to its default reset state. As a result, the driver
might not be able to recover the PHY from a bad state. To address this,
move phy_config() into the driver's start callback (am65_cpsw_start()).

Apart from providing the means to recover the PHY in the event of failure,
the implementation is in line with the idea of "reset and configure" that
is already followed by am65_cpsw_start() when it comes to programming the
CPSW MAC.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
2025-04-28 13:24:56 -06:00
Samuel Holland
a948f57118 net: dwc_eth_qos: Fix hang when freeing packet after stop
If eqos_free_pkt() is called after eqos_stop(), eqos_stop_resets() will
have been called already. This may prevent accessing the MMIO space to
update the RX descriptor tail pointer, so we must skip the descriptor
maintenance logic. This is okay because the descriptors and tail pointer
will all be rewritten anyway during the next call to eqos_start().

This hang was observed after a failed TFTP transaction:

  eqos_recv(dev=000000047fb57330, flags=1):
  eqos_recv: *packetp=000000c3ffb5c080, length=151

  TFTP error: 'file <FILE> not found for <IP>' (1)
  Not retrying...
  eqos_stop(dev=000000047fb57330):
  eqos_stop: OK
  eqos_free_pkt(packet=000000c3ffb5c080, length=151)
  <HANG>

Fixes: ba4dfef146 ("net: add driver for Synopsys Ethernet QoS device")
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
2025-04-24 08:22:59 -06:00
Tom Rini
6e325df489 Merge tag 'u-boot-rockchip-20250423' of https://source.denx.de/u-boot/custodians/u-boot-rockchip
CI: https://source.denx.de/u-boot/custodians/u-boot-rockchip/-/pipelines/25909

Please pull the updates for rockchip platform:
- New SoC support: RK3528, RK3576
- New Board support: rk3528 Radxa E20C, rk3576 Firefly ROC-RK3576-PC;
- Add generic board for rk3288 and rk3399;
- rng driver binding update;
- misc updates on board level or header files;
2025-04-23 11:34:53 -06:00
Heiko Stuebner
ed71874a73 net: dwc_eth_qos_rockchip: Add support for RK3576
Add rk_gmac_ops and other special handling that is needed for GMAC to
work on RK3576.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-04-23 22:12:05 +08:00
Jonas Karlman
838bf2f09b net: dwc_eth_qos_rockchip: Add support for RK3528
Rockchip RK3528 has two Ethernet controllers based on Synopsys DWC
Ethernet QoS IP.

Add initial support for the RK3528 GMAC variant.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-04-23 22:12:04 +08:00
Jerome Forissier
ca8db26928 net: lwip: allow DM_DSA=y when NET_LWIP=y
Now that the DSA tests in test/dm/dsa.c are compatible with NET_LWIP,
remove the dependency of DM_DSA on NET.

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-23 10:02:49 +02:00
Jerome Forissier
94289e291f drivers: net: sandbox: add support for NET_LWIP
Make the sandbox mock ethernet driver (drivers/net/sandbox.c) compatible
with NET_LWIP by not relying on any of the structures or functions
defined in net-legacy.h. This is done by providing local definitions of
the various protocol structures (Ethernet, ARP, IPv4, ICMP). Drop the
stub driver that was introduced specifically for NET_LWIP
(drivers/net/sandbox-lwip.c).

Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Simon Glass <sjg@chromium.org>
2025-04-23 10:02:49 +02:00
Tom Rini
d36aa5057e Revert "net: phy: Add the Airoha EN8811H PHY driver"
This was applied prematurely by me as I missed the feedback provided at
the time.

This reverts commit c9c8df2c37.

Signed-off-by: Tom Rini <trini@konsulko.com>
2025-04-21 11:05:05 -06:00
Christian Marangi
74fcb6a7a7 net: airoha: Add Airoha Ethernet driver
Add airoha Ethernet driver for Airoha AN7581 SoC. This is a majorly
rewritten and simplified version of the Linux airoha_eth.c driver.

It's has been modified to support a single RX/TX ring to reflect U-Boot
implementation with recv and send API.

The struct and the define are kept as similar as possible to upstream
one to not diverge too much.

The AN7581 SoC include an Ethernet Switch based on the Mediatek MT753x
but doesn't require any modification aside from setting the CPU port and
applying the Flood configuration hence it can be handled entirely in the
Ethernet driver.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
2025-04-16 16:51:45 -06:00
Lucien.Jheng
c9c8df2c37 net: phy: Add the Airoha EN8811H PHY driver
Add the driver for the Airoha EN8811H 2.5 Gigabit PHY. The PHY supports
100/1000/2500 Mbps with auto negotiation only.

The driver uses two firmware files, for which updated versions are added to
linux-firmware already.

Based on the Linux upstream 8811 driver code(air_en8811h.c),
I have modified the relevant process to align with the U-Boot boot sequence.
and have validated this on Banana Pi BPI-R3 Mini.

The MD32 FW is currently stored in eMMC partition 1 on Banana Pi BPI-R3 Mini,
and it is loaded from there.

Signed-off-by: Lucien.Jheng <lucienzx159@gmail.com>
2025-04-16 16:48:13 -06:00
Tom Rini
1f0281294d Merge patch series "Annotate switch/case fallthrough cases"
Andre Przywara <andre.przywara@arm.com> says:

C's implicit fallthrough behaviour in switch/case statements can lead to
subtle bugs. Quite some while ago many compilers introduced warnings in
those cases, requiring intentional fallthrough's to be annotated.

So far we were not enabling that compiler option, so many ambiguities
and some bugs in the code went unnoticed.

This series adds the required annotations in code paths that the first
stage of the U-Boot CI covers. There is a large number of cases left
in the libbz2 code. The usage of switch/case is borderline insane there,
labels are hidden in macros, and there are no breaks, but just goto's.
Upstream still uses very similar code, without any annotations. I still
am not 100% sure those are meant to fall through or not, and plan to do
further investigations, but didn't want to hold the rest of the patches
back. You can see for yourself by applying patch 18/18 and building for
sandbox64, for instance.

Because of this we cannot quite enable the warning in the Makefile yet,
but those fixes are worth regardless, and be it to increase readability.

Please note that those patches do not fix anything, really, they just add
those fallthrough annotations, so the series is not really critical.

Link: https://lore.kernel.org/r/20250327153313.2105227-1-andre.przywara@arm.com
2025-04-08 16:24:12 -06:00
Andre Przywara
960d3d933d net: e1000: annotate switch/case fallthrough
The E1000 driver uses an implicit switch/case fallthrough for sharing
some code supporting different PHYs.

Add our "fallthrough;" statement-like macro before the two labels in
e1000_set_phy_type(), to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-04-08 16:23:51 -06:00
Andre Przywara
5ddb7d1265 net: sun8i-emac: annotate fallthrough
The Allwinner sun8i EMAC driver uses an implicit switch/case fallthrough
when setting up the MAC/PHY communication protocol, to handle the case
when RMII is requested, but would not be supported by the hardware.

Add our "fallthrough;" statement-like macro before the default branch in
sun8i_emac_set_syscon(), to avoid a warning when GCC's
-Wimplicit-fallthrough warning option is enabled.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2025-04-08 16:23:51 -06:00
Richard Genoud
2f132281cc net: am65-cpsw: cpsw_mdio: fix typo in error message
Replace "froced" by "forced"

Signed-off-by: Richard Genoud <richard.genoud@bootlin.com>
2025-03-31 17:04:20 -06:00
Paul Barker
95d10669c0 net: phy: ksz90x1: Simplify ksz9131_config_rgmii_delay
We can call phy_modify_mmd() instead of manually calling drv->readext()
and drv->writeext().

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-19 03:38:51 +01:00
Paul Barker
28e85996ff net: phy: ksz90x1: Load skew values from device tree
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.

This is based on the ksz9131 phy driver in Linux v6.11.

Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-19 03:38:51 +01:00
Paul Barker
fbc3539456 net: phy: ksz90x1: Handle ksz9131 LED errata
Micrel KSZ9131 PHY LED behavior is not correct when configured in
Individual Mode, LED1 (Activity LED) is in the ON state when there is
no-link.

Workaround this by setting bit 9 of register 0x1e after verifying that
the LED configuration is Individual Mode.

This issue is described in KSZ9131RNX Silicon Errata DS80000693B [*]
and according to that it will not be corrected in a future silicon
revision.

[*] https://ww1.microchip.com/downloads/en/DeviceDoc/KSZ9131RNX-Silicon-Errata-and-Data-Sheet-Clarification-80000863B.pdf

Based on commit 0316c7e66bbd in the Linux kernel.

Tested-by: Quentin Schulz <quentin.schulz@cherry.de> # RK3588 Tiger
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-19 03:38:51 +01:00
Paul Barker
667ab63f93 net: ravb: Fix error handling in ravb_probe
In ravb_probe(), we were missing a couple of things in the error
handling path:

  * We must unregister the MDIO bus before freeing the corresponding
    struct mii_dev instance to avoid the potential for use-after-free
    bugs.

  * We must free the resources acquired by clk_get_bulk() even if the
    clocks have not yet been enabled.

Fixes: 8ae51b6f32 ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-19 03:37:41 +01:00
Tom Rini
81ef65099e Merge patch series "drivers: Driver support for ADI SC5xx SoCs"
Greg Malysa <malysagreg@gmail.com> says:

This series adds all of the supported peripheral drivers for the sc5xx
series of SoCs from Analog Devices and other drivers that are used by
the evaluation kits, such as a GPIO expander used by the EZLITE carrier
boards. This series passes gitlab CI tests.

Link: https://lore.kernel.org/r/20250226173150.13198-1-malysagreg@gmail.com
2025-03-12 10:25:13 -06:00
Greg Malysa
df831ebf61 net: Add support for ADI SC5xx SoCs with DWC QoS ethernet
The ADI SC598 includes a Designware QoS 5.20a IP block. This
commit adds support for using the existing ethernet QoS driver
with the SC598 SoC.

Co-developed-by: Ian Roberts <ian.roberts@timesys.com>
Signed-off-by: Ian Roberts <ian.roberts@timesys.com>
Co-developed-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Nathan Barrett-Morrison <nathan.morrison@timesys.com>
Signed-off-by: Vasileios Bimpikas <vasileios.bimpikas@analog.com>
Signed-off-by: Utsav Agarwal <utsav.agarwal@analog.com>
Signed-off-by: Arturs Artamonovs <arturs.artamonovs@analog.com>
Signed-off-by: Oliver Gaskell <Oliver.Gaskell@analog.com>
Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2025-03-12 10:24:58 -06:00
Paul Barker
4226433858 net: ravb: Fix RX frame size limit
The value written to the RFLR register includes the length of the CRC
data at the end of each Ethernet frame. So we need to increase the value
written to this register to ensure that we can receive full size frames.

While we're here we can also copy the improved comment from the Linux
kernel.

Fixes: 8ae51b6f32 ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Fix comment
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-11 23:06:18 +01:00
Paul Barker
78e15e2dd9 net: ravb: Add dependency on CONFIG_BITBANGMII
The Renesas RAVB driver always requires bitbang MDIO bus support.

Fixes: 8ae51b6f32 ("net: ravb: Add Renesas Ethernet RAVB driver")
Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-11 23:06:18 +01:00
Marek Vasut
256306593e net: miiphybb: Drop bb_miiphy_alloc()/bb_miiphy_free() and struct bb_miiphy_bus
These functions are no longer necessary, remove them.
The struct bb_miiphy_bus is no longer necessary either,
remove it as well.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
f6fba83857 net: sh_eth: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.

This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.

Fixes: 08eefb5e79 ("net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
877e29cfb1 net: ravb: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.

This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.

Fixes: 079eaca6e7 ("net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
ce7e9a5a63 net: designware: Switch back to mdio_alloc()
Use mdio_alloc() again to allocate MDIO bus. This is possible
because all the miiphybb parameters and ops passing is handled in
at bb_miiphy_read()/bb_miiphy_write() level.

This also fixes previously missed bb_miiphy_free() in .remove
callback of this driver. which does not pose a problem anymore.

Fixes: cbb69c2faf ("net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
596d67e516 net: miiphybb: Drop priv from struct bb_miiphy_bus
Remove the priv member from struct bb_miiphy_bus and its assignment
from drivers. This turns struct bb_miiphy_bus int struct mii_dev
wrapper, to be cleaned up next.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
7cded10da3 net: miiphybb: Pass struct mii_dev directly to bb_miiphy_read/write()
Access to MDIO bus private data can be provided by both
struct mii_dev .priv member and struct bb_miiphy_bus .priv
member, use the former directly and remove .priv from the
later. Drop unused bb_miiphy_getbus(). This removes any
dependency on struct bb_miiphy_bus from the miiphybb code,
except for helper functions which will be removed later.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
c5318bdcf8 net: miiphybb: Pass struct bb_miiphy_bus_ops directly to bb_miiphy_read/write()
The access to struct bb_miiphy_bus_ops via ops pointer in
struct bb_miiphy_bus is not necessary with wrappers added
in previous patch. Pass the ops pointer directly to both
bb_miiphy_read() and bb_miiphy_write() functions.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
3374d3783a net: miiphybb: Wrap driver side bb_miiphy_read/write() accessors
Do not call bb_miiphy_read()/bb_miiphy_write() accessors directly
in drivers, instead call them through wrapper functions. Those are
meant to be used as function parameter adaptation layer between
struct mii_dev callback function parameters and what the miiphybb
does expect and will soon expect. This is a preparatory patch, no
functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Marek Vasut
c9671c9036 net: miiphybb: Split off struct bb_miiphy_bus_ops
Move miiphybb operations into separate struct bb_miiphy_bus_ops
structure, add pointer to struct bb_miiphy_bus_ops into the base
struct bb_miiphy_bus and access the ops through this pointer in
miiphybb generic code. The variable reshuffling in miiphybb.c
cannot be easily avoided.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-03-11 23:05:57 +01:00
Tom Rini
1b42f57ec8 Prepare v2025.04-rc4
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Merge tag 'v2025.04-rc4' into next

This uses Heinrich's merge of lib/efi_loader/efi_net.c which results in
no changes.
2025-03-10 20:18:51 -06:00
J. Neuschäfer
63a23cb465 net: tsec: Re-arm packet buffer in error case
When an error is detected in the TSEC receive path, the driver currently
prints an error message, but leaves the corresponding packet descriptor
in its old state (i.e. owned by the CPU side). As a result, the packet
queue can be starved of available buffers if enough errors happen.

To recover from errors, re-arm the packet buffer descriptor after an
error has been detected.

Errors can be provoked by changing a PHY with phy-mode = "rgmii-id" to
phy-mode = "rgmii".

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-03-03 14:18:49 +08:00
J. Neuschäfer
a149456d6a net: tsec: Reorder tsec_recv and tsec_free_pkt
This is necessary for the following patch. No functional change.

Signed-off-by: J. Neuschäfer <j.ne@posteo.net>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
2025-03-03 14:18:48 +08:00
Marek Vasut
4e6fed49be net: miiphybb: Drop bb_miiphy_buses and bb_miiphy_buses_num
Neither bb_miiphy_buses nor bb_miiphy_buses_num are used anymore.
Drop both of them.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26 18:26:57 +01:00
Marek Vasut
6d76c997e9 net: sh_eth: Drop use of miiphy_get_dev_by_name()
Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-26 18:26:57 +01:00
Marek Vasut
fd54dac345 net: ravb: Drop use of miiphy_get_dev_by_name()
Instead of doing another lookup, trivially access the struct mii_dev
embedded in struct bb_miiphy_bus . No functional change.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26 18:26:57 +01:00
Marek Vasut
a23f9a786b net: miiphybb: Drop name field from struct bb_miiphy_bus
The struct bb_miiphy_bus embeds struct struct mii_dev, which
already contains one copy of name field. Drop the duplicate
top level copy of name field.

The a38x code does static assignment of disparate names, use
snprintf(...) to fill in matching name in probe to avoid any
breakage.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26 18:26:57 +01:00
Marek Vasut
ed4ab7c5e0 net: miiphybb: Use container_of() in bb_miiphy_getbus()
Replace the name based look up in bb_miiphy_getbus() with trivial
container_of() call. This works because the struct bb_miiphy_bus
always embeds the matching struct mii_dev . This also makes the
code much simpler and more efficient.

Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-26 18:26:57 +01:00