27884 Commits

Author SHA1 Message Date
Tom Rini
4101b56d0b Merge branch 'nand-next' of https://source.denx.de/u-boot/custodians/u-boot-nand-flash into next
CI: https://source.denx.de/u-boot/custodians/u-boot-nand-flash/-/pipelines/25178

This merge request add support for cadence raw nand driver for agilex
board and add a fix to meson driver.
2025-03-17 10:18:18 -06:00
Tom Rini
3e806c41aa Pull request efi-2025-04-rc5
UEFI:
 
 * Export _start symbol from crt0_*_efi stubs
 * Move .dynamic out of .text in EFI
 * scripts/Makefile.lib: Preserve the .dynstr section as well
 
 Documentation:
 
 * net: miiphybb: Convert documentation to rst
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEK7wKXt3/btL6/yA+hO4vgnE3U0sFAmfX39kACgkQhO4vgnE3
 U0vo6xAAgr67Fq0wnNAllOa0UnL92pPWqJ/pCiTsG2aqs764KRTj0YPqruhZGCCR
 NnC83CFMK4SI2MEJ+/BlR+b42798gS8mKRsaKKFTIDW/VBmuqmNVH7BXA4IhhVc9
 /msBqFYRNjhWM4M8gkyn98nEfUKC0jtnmJJDzCf2KnlCD9jqgV7/IqsvzhfOxSfY
 Xwf0ceZ5LbutGG0wF/8pc50sQw6Q6W+cPiBWN0GN1Ld9m8KyJbbpHwtT1U97SQmq
 18zwDgQe/asRdVml22gcvU3X4KJhnUbKmcMHukVtzSpg5ZtTMsBc0M7BIjAfr81+
 pzyAqYVyQgxaru9SGFUK33X+ah2azYb9NOQOAoIp31WY8kAfHF+3FM80jB6lae/x
 sUD0B6hVnVi5qZaIi3vr0yBM21a0irIxJiJ2MkaOSE8YcBOP+QX5wlsgwWaXrj5d
 F5rQ3pp8dBxMw5NBnmKwOJIUxcDXq/rW1PBoy3w3phhZp0Ob+DPz6pxSYqDeREHU
 bmS4hc/KAG/6Ai5wmGq6mnumfG0HkGWmvQTaA+FywLWrh41pTwdztL4Z4/yRFqfv
 caeGZaG78W2ObNb9jVRpZyNu6fufpAehh43aBqW77IfkT/nmhJC4+GSwP1E8EeZ9
 v2OMer0Kf1meH+4JADV6p77SErKSxEclX7PrXn/jp74yPffxvVM=
 =33pH
 -----END PGP SIGNATURE-----

Merge tag 'efi-2025-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2025-04-rc5

CI:

* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25196

UEFI:

* Export _start symbol from crt0_*_efi stubs
* Move .dynamic out of .text in EFI
* scripts/Makefile.lib: Preserve the .dynstr section as well

Documentation:

* net: miiphybb: Convert documentation to rst
2025-03-17 08:00:40 -06:00
Sam Day
61a1a1b8ca
mach-snapdragon: use PSCI sysreset driver
Drop the `board_reset` function from mach-snapdragon board code, and
instead use the standard PSCI sysreset driver.

Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250125-msm8916-sysreset-v1-1-62073932ff0e@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-03-17 13:38:19 +00:00
Sam Day
773a46b18b
mach-snapdragon: handle platforms without PSCI support
Most MSM8916 devices shipped without PSCI support. The history is quite
nuanced (a good overview can be found in [1]), but the end result is
that the upstream DTs for this SoC pretend that PSCI exists, and it's
expected that the bootloader handles the case where it doesn't. This is
codified by the de-facto bootloader for MSM8916 devices, lk2nd [2].

So we handle it here by deleting the /psci node if we detect the absence
of PSCI. We need to do this early to ensure sysreset works correctly,
since the PSCI firmware driver is PRE_RELOC and binds the PSCI sysreset
driver.

Additionally, show_psci_version is updated to check that PSCI exists.
Currently this banner outputs "PSCI: 65535.65535" on devices without
PSCI support, which isn't very useful :)

[1]: https://github.com/msm8916-mainline/linux/issues/388
[2]: https://github.com/msm8916-mainline/lk2nd/blob/8183ea2/lk2nd/smp/spin-table/spin-table.c#L237

Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250127-qcom-handle-absent-psci-v1-1-e762f2db938c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-03-17 13:38:18 +00:00
Sam Day
11ff5a57e2
mach-snapdragon: support parsing memory info from external FDT
qcom_parse_memory is updated to return a -ENODATA error if the passed
FDT does not contain a /memory node, or that node is incomplete (size=0)

board_fdt_blob_setup first tries to call qcom_parse_memory with the
internal FDT (if present+valid). If that fails, it tries again with the
external FDT (again, if present+valid).

When booting with an internal FDT from upstream, it's likely that this
change results in a slight performance hit, since virtually all upstream
qcom DTs lack a fully specified memory node. The impact should be
negligible, though.

qcom_parse_memory was given a detailed docstring adapted from Caleb's
original commit message that introduced the function.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250123-qcom-parse-memory-updates-v3-1-c5332b81ea9f@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-03-17 13:38:18 +00:00
Varadarajan Narayanan
25edbbf7fd
dts: ipq9574-rdp433-u-boot: add override dtsi
Add initial support for the IPQ9574 MMC based RDP platforms.
Define memory layout statically.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-3-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
2025-03-17 13:38:16 +00:00
Sam Edwards
214a87757a arm: riscv: efi: Export _start symbol from crt0_*_efi stubs
While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since  ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.

However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.

This patch doesn't affect the final output binaries in any way.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
2025-03-17 09:22:03 +01:00
Minda Chen
05aa34cef9 spl: starfive: visionfive2: Disable USB overcurrent pin by default.
For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
2025-03-17 01:55:19 +01:00
Marek Vasut
15111aeb9c arm64: dts: renesas: Make OTP available in SPL on R8A779G0 V4H
The DBSC5 DRAM controller driver needs access to OTP fuses to discern
Renesas R-Car V4H-3, V4H-5 and V4H-7 SoC variants based on OTP fuse
programming. Make OTP block DT node available in U-Boot SPL DT so the
DBSC5 driver can determine its base address and read out the OTP fuses.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-03-16 14:56:16 +01:00
Dinesh Maniyam
efb9cae1f1 arm: dts: agilex5: Enabled cdns-nand dts setting
Enable cdns-nand dts setting for the socfpga_agilex5
family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
2025-03-15 10:35:00 +01:00
Jim Liu
ef254ccf37 arm: dts: npcm7xx: correct the timer node
Correct the timer node of dts

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
2025-03-14 12:26:55 -06:00
Tom Rini
973c366ce6 Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
 map the memory properly.
 This pull request adds basics support for mapping the U-Boot binary with
 proper (RO, RW, RW^X) memory permissions on aarch64 right after we
 relocate U-Boot in the top of DRAM.
 It's worrth noting that the linker script annotations are only added for
 the aarch64 architecture. We can, in the future, try to unify the linker --
 at least for the architectures that have enough in common and expand this
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEgWII69YpahbL5iK5gS8AYozs+qIFAmfUFksACgkQgS8AYozs
 +qLa0hAAg/wmSJhOfzYw+7fMsQebtWMcY7dEa88u3I5QyUQfYFujXuVj+Y5PbguR
 o6DsO26HVRwzo/+YSdVih+GTS1C0BVGVdNE5HZmM1ju4lzgnsZHLuiNx7859Uq0H
 8PWpGb7okB9m22YBOqbXaj5o7QFryU6AU5gEBJYCV6aRxXv5Ha4VoQsdrOkj9eVN
 8QHm5m7EKApYPmjDRul1TNlFNUjhmDNkcEij4pmpNAOl92zbyn4r62c6/u3jYov7
 P9eFt9CLnkCm8k86e+ciXUvykSNxhNGSvCUMLwDJA3oqizBJPfvYF5yyHW0LeCi+
 pXYtxQ9igGfh+AYeEn4vxYcLqIf1Iqr78QKg/De3Vok6e7+UJBOspxCUS/gxjvAi
 Yn1/n31KzaP9hAJKcZ+NTAKOhgyENnDIZ/qSTMhEDwXbiWmn36hGJlnZZE610TbR
 zxgeYChCbcI7eXq/wCJDPNVP51xMh/MZUGup3rREp/0YG5Cl1dMJ1WjcX1O0W1u3
 WKv8MZ6XP5fKTR8dUr+H4V3tcJ6VGuMQ1oHH9xZ/dar4RMboFPMZeFFIzhBIOQT4
 rcQfjmORrQ/ES6Inv+7QgjpZScJ8E+8yFEW1o9y+7tOf+CL8Jq+l0OW9NdNcRRox
 MxrgAIRkdAiKQj2qvLqV2RGhc/OSa/U75cLbVEcTjcJ+ya/0wfg=
 =AKxY
 -----END PGP SIGNATURE-----

Merge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next

Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this
2025-03-14 09:31:36 -06:00
Ilias Apalodimas
ec1c6cfb1c treewide: Add a function to change page permissions
For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions

Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:37:54 +02:00
Ilias Apalodimas
ff0a979fc3 arm64: mmu_change_region_attr() add an option not to break PTEs
The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:37:54 +02:00
Ilias Apalodimas
1c7d0c411c arm: Prepare linker scripts for memory permissions
Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.

It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.

The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).

The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.

Due to the above ignore EFI for now and fix it later once we have the
rest in place.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:30:12 +02:00
Ilias Apalodimas
e34ecf9d5e meminfo: add memory details for armv8
Upcoming patches are mapping memory with RO, RW^X etc permsissions.
Fix the meminfo command to display them properly

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-03-14 13:30:12 +02:00
Tom Rini
bbfabe2901 Merge tag 'u-boot-imx-next-20250313' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25142

- Support Toradex i.MX6 Apalis/Colibri v1.2 SoM.
- Guard tee.bin inclusion on imx9,
- Remove unneeded regulator entry on DH i.MX6 DHCOM DRC02 devicetree.
- Add i.MX mailbox driver
- Convert ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig.
- Cope with existing optee node on imx8m.
2025-03-13 16:45:19 -06:00
Marek Vasut
15d6518c94 ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.

Signed-off-by: Marek Vasut <marex@denx.de>
2025-03-13 15:22:48 -06:00
Bryan Brattlof
096aa229a9 mach-k3: common_fdt: create a reserved memory node
Some device trees may not have a reserved-memory node. Rather than
exiting early we should create a new reserved-memory node along with
the memory carveout for the firmware we (U-Boot) have placed.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
2025-03-13 14:22:57 -06:00
Marek Vasut
a1cd1ac79a ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.

Signed-off-by: Marek Vasut <marex@denx.de>
2025-03-13 15:15:50 -03:00
Vincent Stehlé
048fabc21b imx8m: soc: cope with existing optee node
On i.MX8M SoCs, the /firmware/optee Devicetree node is created just before
booting the OS when OP-TEE is found running. If the node already exists,
this results in an error, which prevents the OS to boot:

  Could not create optee node.
  ERROR: system-specific fdt fixup failed: FDT_ERR_EXISTS
   - must RESET the board to recover.

  failed to process device tree

On the i.MX8M systems where CONFIG_OF_SYSTEM_SETUP is defined, the
ft_add_optee_node() function is called before booting the OS. It will
create the OP-TEE Devicetree node and populate it with reserved memory
informations gathered at runtime.

On on most i.MX8M systems the Devicetree is built with an optee node if
CONFIG_OPTEE is defined. This node is indeed necessary for commands and
drivers communicating with OP-TEE, even before attempting OS boot.

The aforementioned issue can happen on the Compulab IOT-GATE-iMX8, which is
the only in-tree i.MX8M system where both CONFIG_OPTEE and
CONFIG_OF_SYSTEM_SETUP are defined (see the imx8mm-cl-iot-gate*
defconfigs).

Deal with an existing optee node gracefully at runtime to fix this issue.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>

Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tim Harvey <tharvey@gateworks.com>
2025-03-13 15:15:50 -03:00
Fabio Estevam
9028da7675 imx9: container.cfg: Guard tee.bin inclusion
Guard the inclusion of tee.bin with the CONFIG_OPTEE symbol to fix the
following build warning:

  CHECK    u-boot-container.cfgout
WARNING './tee.bin' not found, resulting binary may be not-functional
  BINMAN  .binman_stamp
  OFCHK   .config

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-03-13 15:15:50 -03:00
Tom Rini
569dceef2e mmc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig
The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be
handled easily enough in Kconfig. This lets us remove a function but not
obviously correct usage of the IS_ENABLED() macro.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
2025-03-13 15:15:50 -03:00
Svyatoslav Ryhel
2dd1092ab8 video: tegra20: provide driver support for the HDMI controller
Tegra platforms feature native HDMI support. Implement a driver to enable
functionality. This driver will initially support Tegra 2 and 3, with
future extensibility.

Co-developed-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-13 19:12:56 +02:00
Tom Rini
3e73373c37 Merge patch series "xPL-stack cleanup"
Simon Glass <sjg@chromium.org> says:

This series was split from the VBE part H series. It adjusts the logic
for selecting the top of the stack so that it is more consistent across
xPL phases.

Link: https://lore.kernel.org/r/20250228122042.1277079-1-sjg@chromium.org
2025-03-13 10:36:11 -06:00
Simon Glass
ffa98c08e8 spl: Use CONFIG_VAL() to obtain the SPL stack
Now that we have the same option for SPL and TPL, simplify the logic for
determining the initial stack.

Note that this changes behaviour as current SPL_STACK is a fallback for
TPL. However, that was likely unintended and can be handled with Kconfig
defaults if needed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Tom Rini <trini@konsulko.com>
Suggested-by: Tom Rini <trini@konsulko.com>
2025-03-13 10:36:10 -06:00
Simon Glass
d6a53f523a spl: Add an SPL_HAVE_INIT_STACK option
At present there is a hex value SPL_STACK which both determines whether
SPL has its own initial stack and the hex value of that stack.

Split off the former into SPL_HAVE_INIT_STACK with SPL_STACK depending
on that and only providing the latter.

Signed-off-by: Simon Glass <sjg@chromium.org>
[trini: Resync defconfig files]
2025-03-13 10:36:09 -06:00
Simon Glass
e7741f1124 tpl: Rename TPL_NEEDS_SEPARATE_STACK to TPL_HAVE_INIT_STACK
The most common word for features that make a platform work is to use
'HAVE_xxx'. Rename this option to match.

Update the help to use the word 'phase' rather than 'stage', since
that is the current terminology. Also clarify that, absent this setting,
the stack pointer generally comes from the value used by U-Boot proper,
rather than SPL.

Move the option just above TPL_STACK which depends on it.

Signed-off-by: Simon Glass <sjg@chromium.org>
2025-03-13 10:35:22 -06:00
Tom Rini
54e5e8b340 Merge patch series "arm: mach-sc5xx: Remove manual bss_clear"
This series from Greg Malysa <malysagreg@gmail.com> provides two more
fixes for the mach-sc5xx platforms.

Link: https://lore.kernel.org/r/20250228185837.25741-1-malysagreg@gmail.com
2025-03-13 09:52:36 -06:00
Greg Malysa
74f4170a87 arm: mach-sc5xx: Remove inappropriate board-specific functions
The sc5xx machine code includes implementations of board_init and
board_early_init_f which should not be included in the base soc support
code, as they should be implemented by a board where necessary.

This removes the default empty implementations of both from mach-sc5xx.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2025-03-13 09:52:33 -06:00
Greg Malysa
3ce975ab88 arm: mach-sc5xx: Remove manual bss_clear
The arm library includes an implementation of bss_clear that is already
called from crt0.S. This re-clearing of BSS should not be performed in
the machine code and should therefore be removed.

Signed-off-by: Greg Malysa <malysagreg@gmail.com>
2025-03-13 09:52:33 -06:00
Tom Rini
2b487bf99f Merge patch series "Update DDR Configurations"
Santhosh Kumar K <s-k6@ti.com> says:

This series is to update the DDR configurations of AM64x EVM, AM62x SK,
AM62x LP SK, AM62Ax SK and AM62Px SK boards according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Test logs: https://gist.github.com/santhosh21/43723900f3615e4cf98da57ed9618cf9

Link: https://lore.kernel.org/r/20250226063923.2266288-1-s-k6@ti.com
2025-03-13 09:51:46 -06:00
Santhosh Kumar K
226f16e406 arm: dts: k3-am62p: Update DDR Configurations
Update the DDR Configurations for AM62Px SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
2025-03-13 09:50:14 -06:00
Santhosh Kumar K
1df8c8bce6 arm: dts: k3-am62a: Update DDR Configurations
Update the DDR Configurations for AM62Ax SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
2025-03-13 09:50:14 -06:00
Santhosh Kumar K
1132a455f4 arm: dts: k3-am62-lp: Update DDR Configurations
Update the DDR Configurations for AM62x LP SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
2025-03-13 09:50:14 -06:00
Santhosh Kumar K
af3d03c28b arm: dts: k3-am62x: Update DDR Configurations
Update the DDR Configurations for AM62x SK according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
2025-03-13 09:50:14 -06:00
Santhosh Kumar K
a11f351ed4 arm: dts: k3-am64: Update DDR Configurations
Update the DDR Configurations for AM64x EVM according to the SysConfig
DDR Configuration tool for AM64x, AM625, AM623, AM62Ax, AM62Px v0.10.02.

Signed-off-by: Santhosh Kumar K <s-k6@ti.com>
2025-03-13 09:50:14 -06:00
Tom Rini
eeefcacb85 - Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
 - Add support for environment in eMMC on STM32MP13xx DHCOR SoM
 - Introduce DH STM32MP15xx DHSOM board specific defconfigs
 - Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
 - Update maintainer for board stm32f746-disco
 - Fix Linux cmdline for stm32f769-disco
 - Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
   legacy led and button management.
 -----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmfRsL4cHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/psU2D/9LPdhwyvmi595AgjNf
 0t4rqKKTPhjb43UZeuAnFOg4PJcH7eXd2tQq5htK+ir8jeLU7cZWRGjA6eXtRQni
 IKYtWlz4OY/xuQhJbQqMBGb1EVJE432LlfVp3rKpCpBMoANU+h//opd/m4CKsMYN
 SiIikf3Xasgy7APSGTQcNGZyzVcVPeL8e68hEAOuFfCBMmd4JRb7RMwro9mG+/SU
 9PzOLvCEfNTq9k87vT8SH4UQHv/NF8OaH6v77SJFt+RHdQr/G9MNbdP5IVwuWkgU
 CfcWRFzmofFACueZ/6vA+hFYarF5tsv043GJyJkTh/0CUbFx8vS0+x1WoL7YcviA
 5Ro+tEEfpB1F1qLyOJV698l1vm3Zj452oZ6e2PBPMGqfKy1vkBjh9OjhfqpjILHX
 uAkxxd/dx6FzK8jo4Qki7JT4W2MmD3jTeHsVunLOC1tS1f44MHwnjpZZH2ttXT/4
 VLPkIYf9kKJA/squ0Lx+ZCjFtiM/XenWHhQxsO9QxKUqSHgBZuwBj8VRNRrMs/N+
 3mN4PLNuYtagJjCvvsxiMg0aB7LH22kXA657nQfHM01WlR9I/B2K0aIil/I/kVV9
 b9LtUven4sXUEexszEY/xFxF2utU+Xh57wKh+3qm2XVw8pfSKItvBXBK/lo/ULWV
 62xL179ziFFGrE/2o/m87VT30w==
 =xL/c
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20250312' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

CI: https://source.denx.de/u-boot/custodians/u-boot-stm/-/pipelines/25112

- Add drivers for MFD STM32 TIMERS and STM32 PWM and enable them on stm32mp135f-dk
- Restrict _debug_uart_init() usage in STM32 serial driver
- Add support for environment in eMMC on STM32MP13xx DHCOR SoM
- Introduce DH STM32MP15xx DHSOM board specific defconfigs
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on DH STM32MP1 DHSOM
- Update maintainer for board stm32f746-disco
- Fix Linux cmdline for stm32f769-disco
- Cleanup in stm32f***-u-boot.dtsi and in board_late_init() by removing
  legacy led and button management.
2025-03-12 21:36:52 -06:00
Patrice Chotard
1a87755ecd serial: stm32: restrict _debug_uart_init() usage
Since commit 948da7773e34 ("arm: Add new config option ARCH_VERY_EARLY_INIT")
debug_uart_init() is called respectively in crt0.S and crt0_64.S.
That means that _debug_uart_init() is called for all STM32MP platforms
even for those which doesn't support SPL_BUILD.

So restrict _debug_uart_init() execution for platforms which can have
SPL_BUILD enabled (STM32MP1 platform only).

It's more needed to call debug_uart_init() in stm32mp1/cpu.c.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-03-12 16:44:31 +01:00
Cheick Traore
0cb823917e ARM: dts: stm32: Add TIMERS inverted PWM channel 3 on STM32MP135F-DK
The pwm source TIM1_CH3N channel (on PE12) in inverted polarity mode
will be used to manage the brightness of the panel backlight on
STM32MP135F-DK.

Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-03-12 16:40:02 +01:00
Cheick Traore
17d57b7494 mach-stm32: add multifunction timer driver support
Add support for STM32MP timer multi-function driver.
These timers can be use as counter, trigger or pwm generator.
This driver will be used to manage the main resources of the timer to
provide them to the functionnalities which need these ones.

Signed-off-by: Cheick Traore <cheick.traore@foss.st.com>
Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-03-12 16:39:15 +01:00
Tom Rini
0731697f9d Merge branch 'staging' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next 2025-03-12 07:56:16 -06:00
Tom Rini
cf1c0f3963 Merge branch 'graph' of https://source.denx.de/u-boot/custodians/u-boot-tegra into next 2025-03-12 07:55:47 -06:00
Svyatoslav Ryhel
c825b1f892 ARM: tegra20: mark second DC with bootph-all
For the Tegra 2, similar to other Tegra SoC generations, 'bootph-all'
must be applied to both display controllers.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-11 17:39:52 +02:00
Jonas Schwöbel
dbc27c2462 ARM: tegra: clock: fix PLLD/PLLD2 related clock calculations
While PLLD/D2 is the nominal parent clock, all derived clocks are generated
from its single output, plld_out0, which is PLLD/D2 divided by two. Direct
use of PLLD/D2 is absent in peripheral clock configurations. Therefore,
clock derivation formulas must take in account this division.

Signed-off-by: Jonas Schwöbel <jonasschwoebel@yahoo.de>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-11 17:39:52 +02:00
Svyatoslav Ryhel
d41adba553 board: xiaomi: mocha: add Xiaomi Mi Pad A0101 support
The Mi Pad is a tablet computer based on Nvidia Tegra K1 SoC which
originally ran the Android operating system. The Mi Pad has a 7.9" IPS
display with 1536 x 2048 (324 ppi) resolution. 2 GB of RAM and 16/64 GB of
internal memory that can be supplemented with a microSDXC card giving up to
128 GB of additional storage.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-03-11 17:38:38 +02:00
Tom Rini
1b42f57ec8 Prepare v2025.04-rc4
-----BEGIN PGP SIGNATURE-----
 
 iQGzBAABCgAdFiEEGjx/cOCPqxcHgJu/FHw5/5Y0tywFAmfPdnYACgkQFHw5/5Y0
 tyw17wv+KqFxDoJKTGVWeP4fu+zhTQlFo0f2tAlWylAdJnDP6nR/I49zid2mjRbZ
 2Bq3mE3G2Ag1efJ3UGHck0Zn1O9OpqVvk734IHSJFygN77l2xmNSMXZd8MLOsbaU
 4JXhxbLUdumCSkwVjjc9/sN+kJUfpwmFBwjqPWmE8rVU+IjApdZP0hBmfxACivl3
 p0JJZ870JkgSd5KuAGO/MUbinl/QYOdpitbo2EinOyqnLnivw5PzlcAYF0STNcgJ
 XfsT7Ap9T3woPTkT1mXGo+0gBs1OPxXcXp6nywFY75EVIGYRetDEXr8/jf74Jg83
 XK8+mqFP+bhlLOMydCdRHyQU8+WGNPfWtcOa7ekC3DjR9Kf7VwoTujqa9B9ILg6m
 UBagI/zUIWGAHi4oe2vMV16nR1cPT1ZexPoswZJrj/iDC6WaN0gWwDQgcPODm0UL
 rPYYNPWne/iGYgbkhy1zqZMEj7ytnvtjaVMRFdbTSwWUR3s23q9btqjlOwfXbtYZ
 0ENfAAu0
 =xGcd
 -----END PGP SIGNATURE-----

Merge tag 'v2025.04-rc4' into next

This uses Heinrich's merge of lib/efi_loader/efi_net.c which results in
no changes.
2025-03-10 20:18:51 -06:00
Tom Rini
124b75644c Merge tag 'u-boot-dfu-next-20250310' of https://source.denx.de/u-boot/custodians/u-boot-dfu into next
u-boot-dfu-next-20250310

CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/25060

Usb gadget:
- Remove legacy CONFIG_USB_DEVICE
- Remove legacy usbtty driver
2025-03-10 10:13:03 -06:00
Tom Rini
444cc6f080 ARM: stm32mp: Fix boot hang on STM32MP15xx with 1 GiB of DRAM.
-----BEGIN PGP SIGNATURE-----
 
 iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmfOptocHHBhdHJpY2Uu
 Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pkgJD/9d/E9CLGU19WEb6wP+
 58ADB3zwQXiqou00Dbbf/Sg7LfVsAfO09tbUCl5K1Z8ZpajGHeVZV0oXH8nwhiwj
 DOp15J9hyw3eMvDyBDwTkcgIyijIzq2sTKdMFmeAJNNe3tLn4drUk9YgaCwo6b0A
 vWSh3RaYwGUu1c0dVV52W57iFbpINNmZ/zzE5EF5HtW/mMDbGWgES9cSua4iRUuF
 ThH0/iYf8XZvHp8oy4YrnL33ykNSA8PrgsuQcBpOgGqQ7zkg/2NTY1O9itNul+nH
 PINjwi1dDRXSIcZRK6Y1Aksgzj/ujRPEsh73CJuoRMlkTm+ltf6FnrzxxPdAqnfx
 nMo5ZTH8cGkZ2QB0R2bXEci8U44CcNpbRl2iuHHfeNZqF4p0QdKdVYhOj4cYLmnQ
 vcvvHOPbYb14Quq/YHJVM5gPzlFs3XpcEKcjfYej1qlq+troN80bYNig/RvFkISd
 egbxMkMJ0yFGYOXy189unfFrl1T3Qssv3r1xjUNovtBufEitOFSL+IPe3+eIgzwK
 HOZoZ35/aq2CBhtsGqGyNTCGcFGg9Dxo7LfmiNeyno9X/+VCPQuOG84GUps7J5Fp
 2pXIeOI+ZJJF8krCAbXnLJOQ9Jy4IQ+BRcJA3U7Bpr0DijqJmqAXWkk3rOXEhTd7
 M4koJPQEsKKLsqRdUiFRCtJMqA==
 =03U9
 -----END PGP SIGNATURE-----

Merge tag 'u-boot-stm32-20250310' of https://source.denx.de/u-boot/custodians/u-boot-stm

ARM: stm32mp: Fix boot hang on STM32MP15xx with 1 GiB of DRAM.
2025-03-10 07:48:25 -06:00
Marek Vasut
19585f3da6 ARM: dts: stm32: Add support for environment in eMMC on STM32MP13xx DHCOR SoM
Enable support for environment in eMMC on STM32MP13xx DHCOR SoM,
in addition to existing support for environment in SPI NOR. The
environment size is the same, except in case the environment is
placed in eMMC, it is stored at the end of eMMC BOOT partitions
in the last 32 sectors of each eMMC HW BOOT partition.

Signed-off-by: Marek Vasut <marex@denx.de>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-03-10 14:15:15 +01:00