Commit Graph

6597 Commits

Author SHA1 Message Date
Tom Rini
1b42f57ec8 Prepare v2025.04-rc4
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Merge tag 'v2025.04-rc4' into next

This uses Heinrich's merge of lib/efi_loader/efi_net.c which results in
no changes.
2025-03-10 20:18:51 -06:00
Tom Rini
962217d218 Merge patch series "boards: siemens: iot2050: SM variant, sysinfo support, fixes & cleanups"
Baocheng Su <baocheng.su@siemens.com> says:

This introduces a sysinfo driver which also permits SMBIOS support.

The first 10 patches of v2 have already been applied. The remaining is
solely the sysinfo driver. To maintain consistency and ease of searching
through the history, the series title remains unchanged.

Link: https://lore.kernel.org/r/20250218023614.52574-1-baocheng.su@siemens.com
2025-02-28 08:42:01 -06:00
Baocheng Su
a9737a0073 sysinfo: Add driver for IOT2050 boards
This brings a sysinfo driver and DT entry for the IOT2050 board series.
It translates the board information passed from SE-Boot to SPL into
values that can be retrieved via the sysinfo API. Will is already used
to fill the SMBIOS table when booting via EFI.

Signed-off-by: Baocheng Su <baocheng.su@siemens.com>
Signed-off-by: Li Hua Qian <huaqian.li@siemens.com>
[Jan: split-off as separate patch, cleanup]
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
2025-02-28 08:41:54 -06:00
Justin Klaassen
ed073246e8 rockchip: nanopi-r4s: Enable second usb port and fix crash
The patch enables the second USB3.0 Type-A USB port on the NanoPi R4S
board, which prevents a crash when initializing the usb system in U-Boot
and allows both Type-A USB ports to be used for booting.

=> usb start
starting USB...
Bus usb@fe380000: USB EHCI 1.00
Bus usb@fe3c0000: "Synchronous Abort" handler, esr 0x96000010, far 0x0

Signed-off-by: Justin Klaassen <justin@tidylabs.net>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-28 19:15:21 +08:00
Jonas Karlman
4871db6082 rockchip: rk3308-rock-s0: Fix SD-card boot on v1.1 hw revision
BootROM leave GPIO4_D6 configured as SDMMC_PWREN function and DW MMC
driver set PWREN high in dwmci_init().

However, HW revision prior to v1.2 must pull GPIO4_D6 low to access
sdmmc. For HW revision v1.2 the state of GPIO4_D6 has no impact.

Upstream Linux commit 26c100232b09 "arm64: dts: rockchip: Fix sdmmc
access on rk3308-rock-s0 v1.1 boards" fixed this issue by adding a
vcc_sd regulator.

Include the new vcc_sd regulator in SPL and enable required Kconfig
options to set GPIO4_D6 low to fix reading sdmmc on v1.1 hw revision.

Fixes: 25438c40a0 ("board: rockchip: Add Radxa ROCK S0")
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
2025-02-28 19:13:50 +08:00
Daniel Schultz
b78f8677cd arch: arm: dts: k3-am642-phycore-som-binman: Add custMpk to overlays
There are some device-tree overlays with missing entries for the
keyfile. Add them to sign all images in the U-Boot FIT image.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-02-27 08:07:38 -06:00
Daniel Schultz
c5aa4a4624 arch: arm: dts: k3-am625-phycore-som-binman: Add custMpk to overlays
There are some device-tree overlays with missing entries for the
keyfile. Add them to sign all images in the U-Boot FIT image.

Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
2025-02-27 08:07:38 -06:00
Fabio Estevam
ce154a45a7 imx6q-lxr: Convert to OF_UPSTREAM
The imx6q-lxr devicetree has landed in kernel 6.13.

Switch to OF_UPSTREAM to make use of the upstream devicetree.

Signed-off-by: Fabio Estevam <festevam@denx.de>
2025-02-27 10:03:29 -03:00
Jesse Taube
978e39e865 ARM: dts: imxrt1050: Migrate to OF_UPSTREAM
The device tree for imxrt1050 is now
available in the /dts/upstream directory.
Migrate board to use OF_UPSTREAM.

Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
2025-02-27 09:52:36 -03:00
Tom Rini
4da90796ca Merge tag 'u-boot-socfpga-next-20250225' of https://source.denx.de/u-boot/custodians/u-boot-socfpga into next
CI: https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/24816

Please pull the SoCFPGA changes for next from u-boot-socfpga, containing
boot support for the  Altera SoCFPGA Agilex 5 platform in U-Boot. The
changes include:

1. Board-specific configurations and setup required to enable Agilex 5
   operation in U-Boot.
2. Integration of cache coherency unit (CCU) initialization routine,
   including CCU conguration in DT.
3. Clock, firewall (configured in DT), SMMU, low level initialization
   specific to Agilex 5.
4. Integration of memory initialization routine, including DDR setup.

This patch set has been tested on Agilex 5 devkit with QSPI boot
(UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).
2025-02-25 10:54:05 -06:00
Tingting Meng
04ea9147d5 ddr: altera: Add DDR driver for Agilex5 series
Adding DDR driver support for Agilex5 series.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
2025-02-25 10:54:01 -06:00
Tien Fong Chee
0d2010faac arm: socfpga: agilex5: Add SMMU initialization
Allow non-secure accesses only with SMMU peripherals. This would protect
the content in DDR secure region from accidentally modified by SMMU
peripherals.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25 10:53:57 -06:00
Tien Fong Chee
fe41a5e1b9 arm: dts: agilex5: Enable XGMAC
Enable XGMAC for SoCFPGA Agilex5 devkit.

Link: https://lore.kernel.org/all/20241204064755.10226-2-mun.yew.tham@intel.com/
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25 10:53:53 -06:00
Tien Fong Chee
f504e59e00 arm: dts: agilex5: Add firewall configure settings
These firewall configure settings are needed to disable firewall on
respective hardware component so both secure and non-secure transactions
are allowed.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25 10:53:52 -06:00
Tien Fong Chee
e3097ca2bb arm: dts: agilex5: Add HPS cache coherency unit configuration settings
These configuration settings are required to enable cache maintenance and
access between initiators and targets.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
2025-02-25 10:53:48 -06:00
Alif Zakuan Yuslaimi
cbb6b57d3e arch: arm: dts: agilex5: Enable I2C3
Enable i2c3 node in Agilex5 device tree

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
2025-02-25 10:53:30 -06:00
Tom Rini
3ecda19009 Prepare v2025.04-rc3
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Merge tag 'v2025.04-rc3' into next

Prepare v2025.04-rc3
2025-02-24 17:15:14 -06:00
Tom Rini
5061eab96a Merge branch 'picasso' of https://source.denx.de/u-boot/custodians/u-boot-tegra
Branch contains bringup of Acer Iconia Tab A500 (codename picasso), a
Tegra 2 Android device with decent Linux kernel support. Ondevice tests
and U-Boot test suit all passed.
2025-02-22 08:42:01 -06:00
Johan Jonker
d4aac2894a rockchip: use OF_UPSTREAM for rk3036
The device tree for rk3036 combined is now
available in the /dts/upstream directory.
Use imply OF_UPSTREAM to migrate all rk3036 boards.

Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
2025-02-19 23:14:50 +08:00
Svyatoslav Ryhel
ad3ec11b39 board: acer: picasso: add Acer Iconia Tab A500 support
The Acer Iconia A500 is a tablet computer designed, developed and
marketed by Acer Inc. It is powered by 1 GHz Nvidia Tegra 2 processor
and 1GB DDR2 RAM. The A500 is sold with 64 GB, although both 16 GB
and 32 GB models are available.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-16 19:11:43 +02:00
Svyatoslav Ryhel
279289e0cf ARM: tegra124: dts: mark HOST1X and DC with pre-relocation flag
Same as on previous SoC generations this is required for proper
video output work.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-13 16:52:13 +02:00
Svyatoslav Ryhel
dedc0468b2 ARM: tegra124: dts: add missing DSI nodes
Bind missing DSI and MIPI calibration devices.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Svyatoslav Ryhel
f47a02825a ARM: tegra30: dts: complete DSI nodes
Sync DSI nodes with Linux tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12 10:35:17 +02:00
Manikandan Muralidharan
973143219c ARM: dts: at91: Align pinctrl node with Linux Devicetree
The GPIO banks are added as sub nodes or child nodes under the
pinctrl node (as per Linux ABI) and the reg property which points
to an array of controllers physical base address is removed
to align with the Linux devicetree.

Signed-off-by: Charan Pedumuru <charan.pedumuru@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
2025-02-12 10:31:56 +02:00
Manikandan Muralidharan
836bf51f91 ARM: dts: at91: sam9x60: Add missing pinctrl node properties
Add the missing properties for the pinctrl node and for its
corresponding GPIO bank nodes to align with the Linux DT.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2025-02-12 10:31:51 +02:00
Manikandan Muralidharan
4e9eaf5371 ARM: dts: at91: sam9x60: Move pinmux node to board DTS
Move pinmux nodes defined under the pinctrl node from sam9x60 SoC
DT to its board specific DTS files.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2025-02-12 10:31:35 +02:00
Balamanikandan Gunasundar
5451d21ac2 ARM: dts: at91: sam9x60: Define pinctrl node with its label
Define the pinctrl nodes with its label to align with the Linux DT.
Without this change the pinmux nodes are grouped under an additional
'pinctrl' child node which is not identified by the pinctrl driver
when the GPIO banks are made as child nodes of pinctrl node.

Signed-off-by: Balamanikandan Gunasundar <balamanikandan.gunasundar@microchip.com>
Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2025-02-12 10:31:13 +02:00
Manikandan Muralidharan
d16bc6282f ARM: dts: at91: sam9x60: Add AIC node
Add Advanced Interrupt Controller node and define it as interrupt
parent in sam9x60 SoC DT.

Signed-off-by: Manikandan Muralidharan <manikandan.m@microchip.com>
Reviewed-by: Eugen Hristev <eugen.hristev@linaro.org>
2025-02-12 10:30:23 +02:00
Tom Rini
7f89b40f1c Merge tag 'u-boot-dfu-20250211' of https://source.denx.de/u-boot/custodians/u-boot-dfu
u-boot-dfu-20250211:

CI:
- https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24556

Android:
- Handle boot images with missing DTB

Usb gadget:
- Fix nullptr in g_dnl when serial# is unset
- Add missing schedule() in f_mass_storage gadget
- Add support for STih407 in dwc3-generic
- Fix usb clocks on STih407
- Migrate STih407 to DM_USB_GADGET
2025-02-11 08:56:54 -06:00
Patrice Chotard
3810cd52cb ARM: dts: sti: Add fixed clock for ehci and ohci nodes in stih410-b2260.dtsi
On STi platforms, all clocks are enabled by BOOTROM, so CONFIG_CLK is
not set as no clock driver for STI exists.

As ehci-generic and ohci-generic drivers are used on platforms where
CONFIG_CLK is set, clk_get_bulk() returns-ENOSYS in case of
stih410-b2260.
To avoid this error, add fixed clocks for ehci and ohci nodes for
stih410-b2260 to fix the following errors:

Bus usb@9a03c00: ohci_generic usb@9a03c00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a03e00: ehci_generic usb@9a03e00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a83c00: ohci_generic usb@9a83c00: Failed to get clocks (ret=-19)
Port not available.
Bus usb@9a83e00: ehci_generic usb@9a83e00: Failed to get clocks (ret=-19)
Port not available.
scanning bus dwc3@9900000 for devices... 1 USB Device(s) found
       scanning usb for storage devices... 0 Storage Device(s) found

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Marek Vasut <marex@denx.de>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250130163547.512990-2-patrice.chotard@foss.st.com
Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11 09:00:42 +01:00
Weijie Gao
738deb56b6 mediatek: mt7981: enable ethernet switch auto-detction
This patch enables switch auto-detction for mt7981 as some new mt7981
boards will use AN8855 ethernet switch.

Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10 10:28:31 -06:00
Wadim Egorov
7c652360c8 arch: arm: dts: phyboard-electra-uboot.dtsi: Add bootph props to i2c
Add bootph-all properties to I2C0 nodes to ensure the bus and EEPROM
are accessible across all stages. This enables reading the SoM
configuration at any point during the boot process.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Tested-by: Daniel Schultz <d.schultz@phytec.de>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
2025-02-10 10:28:05 -06:00
Weijie Gao
6331b8b0c8 mediatek: mt7986: rename pinctrl to pio in mt7986-u-boot.dtsi
The change from pinctrl to pio was missing in mt7986-u-boot.dtsi and will
cause build failure. Now fix it.

Fixes: f1775996ba (mediatek: mt7986: move gpio-controller up and rename pinctrl to pio)
Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10 10:26:54 -06:00
Tom Rini
c2e00482d0 AMD/Xilinx changes for v2025.04-rc2
fpga:
 - Cleanup help
 - Show xilinx only options on Xilinx devices
 
 ospi-versal:
 - Fix alignment issue
 - Fix cadence_qspi_flash_reset() prototype
 
 zynqmp:
 - Define usb_pgood_delay
 - Fix bootseq number
 
 versal:
 - Fix mini_ospi configuration
 
 versal2:
 - Enable OPTEE
 
 xilinx:
 - Enable some flashes
 - Clean up SYS_MALLOC_F_LEN Kconfig
 - Some binman fixes
 - DT updates
 - Enable mkfwumdata compilation
 - Enable meminfo command
 - Switch to LWIP and enable HTTPS
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Merge tag 'xilinx-for-v2025.04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.04-rc2

fpga:
- Cleanup help
- Show xilinx only options on Xilinx devices

ospi-versal:
- Fix alignment issue
- Fix cadence_qspi_flash_reset() prototype

zynqmp:
- Define usb_pgood_delay
- Fix bootseq number

versal:
- Fix mini_ospi configuration

versal2:
- Enable OPTEE

xilinx:
- Enable some flashes
- Clean up SYS_MALLOC_F_LEN Kconfig
- Some binman fixes
- DT updates
- Enable mkfwumdata compilation
- Enable meminfo command
- Switch to LWIP and enable HTTPS
2025-02-06 08:09:54 -06:00
Michal Simek
eade90fd00 arm64: zynqmp: Describe images without TF-A
U-Boot can run out of EL3, NS-EL2 and NS-EL1. Currently default
configuration is NS-EL2 with TF-A but when TF-A is not passed and
configured images can still boot just fine. That's why support this
configuration and describe it via binman.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9b3dad80138e97005df3d033b4611c9d7e05a177.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
f339584992 arm64: zynqmp: Use DTB address base from .config
CONFIG_XILINX_OF_BOARD_DTB_ADDR holds DTB address which U-Boot is checking.
Currently address in binman match default value but macro can be used
directly.
Also sync node name (s/hash-1/hash/) and sync location to have the same
order load/hash/image.

All binman DTSes are compiled that's why also guard
CONFIG_XILINX_OF_BOARD_DTB_ADDR which depends on OF_BOARD || OF_SEPARATE
which is a problem for mini configurations which are using OF_EMBED.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a22c9671b965b222bfd419f5bfaee012929f3d88.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
89e26b49a9 arm64: zynqmp: Fix TEE loading address and add hash
There is incorrect loading address listed for TEE.
CONFIG_BL32_LOAD_ADDR should be used.
Also there is missing hash for this entry which is present for other nodes.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/4e7e3a7110acc050ea7c06ac661e5b5be46e8602.1738659214.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Michal Simek
c4a7112536 arm64: zynqmp: Describe ethernet controllers via aliases on SOM
Add ethernet aliases to CC (Carrier card) description to create a
connection which is used by fdt_fixup_ethernet() for updating
local-mac-address in DT.
On Kria SOM MAC address is read from i2c eeprom at start and based on it
environment variables are created. Without creating aliases U-Boot is not
able to inject local-mac-address DT property and OS won't get the same MAC
address unless another i2c read is happening in OS.
Also aliases are using string not phandle that's why full path has to be
provided but that shouldn't be a big issue because location of ethernet
controller is fixed.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6d360e71a0530d201578e27a6997dbd472772e39.1737466907.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Prasad Kummari
0184f3eead arm64: zynqmp: enable u-boot itb generation via binman if SPL is enabled
Output images are generated via Binman only if SPL is enabled, as
there is no consumer for them otherwise. An #ifdef check ensures that
when SPL is enabled, Binman generates the U-Boot ITB. If SPL is disabled,
ITB generation is skipped since the ITB format is supported only by SPL.
Without SPL, generating such an image is unnecessary, as it would not be
used

The second reason is that when a DTB is passed, the current logic cannot
handle it without an additional step in U-Boot to parse an appended FIT
image and enable board-specific code to select the correct DTB config.
The MULTI_DTB_FIT configuration should be used if support for multiple
DTBs is required, but SPL is not being used.

Signed-off-by: Prasad Kummari <prasad.kummari@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/7cba738ae36dacf7d1b0cfbaf13e0c9b3a0df225.1737462296.git.michal.simek@amd.com
2025-02-05 16:22:55 +01:00
Marek Vasut
8a2ffd5a85 arm64: renesas: Add R-Car S4 Starter Kit support
Add support for the R-Car S4 Starter Kit with R8A779F4 SoC support.
This implementation natively uses OF_UPSTREAM to pull in most recent
DT. The defconfig is derived from S4 Spider, with reduced UART baud
rate to 921600 Bdps. The DT alias to rswitch is removed as the alias
should point to rswitch ports, not to rswitch itself, see [1].

[1] https://lore.kernel.org/linux-arm-kernel/20250118111344.361617-5-marek.vasut+renesas@mailbox.org/

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-04 23:32:00 +01:00
Tom Rini
bfaed6969c Merge patch series "mediatek: final preparation for OF_UPSTREAM support"
Christian Marangi <ansuelsmth@gmail.com> says:

This is the last batch of part to push actual support of
OF_UPSTREAM for the mediatek SoC.

The plan is to make the current downstream DTS on part with
upstream implementation so we can permit a gradual transition to
it while we don't cause any regression to any user.

This is to have the same node downstream and upstream.
Mediatek is working hard upstream to also push all the remaining
nodes.

All patch are the final changes after the pinctrl patch
merged previously.

All patch pass CI tests

Link: https://github.com/u-boot/u-boot/pull/731
Link: https://lore.kernel.org/r/20250127134046.26345-1-ansuelsmth@gmail.com
2025-02-04 11:57:36 -06:00
Christian Marangi
c6f8119dc4 arm: dts: mediatek: add PCIe node for MT7981
Add PCIe node for MT7981 with all the required properties to make PCIe
work.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
John Crispin
5fa18e47e4 arm: dts: mediatek: add USB nodes for MT7981
Add USB PHY nodes for MT7981. These are needed for USB support and also
for PCIe support as the u3 PHY can also be used for PHY.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
4d173d4a64 mediatek: mt7981: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
cd06e60c44 mediatek: mt7988: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
8c2cb748ef pinctrl: mediatek: mt7988: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
f1775996ba mediatek: mt7986: move gpio-controller up and rename pinctrl to pio
Move gpio-controller up to pinctrl node and rename label to "pio" to
match the label used in upstream kernel linux.

Update any DTS that reference the pinctrl to follow the new naming and
structure.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
08e70f772c pinctrl: mediatek: mt7986: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Christian Marangi
8b1ea8a4b9 pinctrl: mediatek: mt7981: rename reg-names to upstream linux format
Rename reg-names to upstream linux format. Upstream linux drop the
"_base". To make use of upstream DTSI, align to the upstream naming.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Weijie Gao <weijie.gao@mediatek.com>
Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-04 10:20:36 -06:00
Tom Rini
a582e48533 STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
 - Fixes for stm32prog
 - Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
 - Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
 - Clean env_get_location() for STM32MP1
 - Fix board_get_usable_ram_top() to fix infinite loop in cache
   management for STM32MP2.
 - Fix ck_flexgen_08 frequency for STM32MP2
 
 STM32 MCU:
 - Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
 - Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
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Merge tag 'u-boot-stm32-20250131' of https://source.denx.de/u-boot/custodians/u-boot-stm

STM32 MPU:
- Remove dt-bindings headers available in dts/upstream
- Fixes for stm32prog
- Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs
- Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13
- Clean env_get_location() for STM32MP1
- Fix board_get_usable_ram_top() to fix infinite loop in cache
  management for STM32MP2.
- Fix ck_flexgen_08 frequency for STM32MP2

STM32 MCU:
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco
- Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
2025-01-31 08:32:11 -06:00