From a5bb384caa050660220270beb19452bbe927a72b Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 10 Mar 2021 10:27:22 +0100 Subject: [PATCH 1/7] dfu: dfu_mtd: remove the mtd_block_op error when mtd_lock is not supported Fix the result of DFU_OP_WRITE operation in mtd_block_op function when mtd_lock is not supported (-EOPNOTSUPP) to avoid DFU stack error on the DFU manifestation of the MTD device, when dfu_flush_medium_mtd is called. Without this patch, dfu-util failed on dfuERROR state at the end of the write operation on the alternate even if MTD write opeartion is correctly performed. $> dfu-util -a 3 -D test.bin .... DFU mode device DFU version 0110 Device returned transfer size 4096 Copying data from PC to DFU device .... Download [=========================] 100% 225469 bytes Download done. state(10) = dfuERROR, status(14) = Something went wrong, but the device does not know what it was Done! Fixes: 65f3fc18fc1e ("dfu_mtd: Add provision to unlock mtd device") Signed-off-by: Patrick Delaunay Acked-by: Sughosh Ganu --- drivers/dfu/dfu_mtd.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/dfu/dfu_mtd.c b/drivers/dfu/dfu_mtd.c index ca67585a7e4..ec40b8f6bba 100644 --- a/drivers/dfu/dfu_mtd.c +++ b/drivers/dfu/dfu_mtd.c @@ -150,7 +150,9 @@ static int mtd_block_op(enum dfu_op op, struct dfu_entity *dfu, /* Write done, lock again */ debug("Locking the mtd device\n"); ret = mtd_lock(mtd, lock_ofs, lock_len); - if (ret && ret != -EOPNOTSUPP) + if (ret == -EOPNOTSUPP) + ret = 0; + else if (ret) printf("MTD device lock failed\n"); } return ret; From 6d734be905ef16043471dca6ce5495a905a8590f Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Wed, 28 Apr 2021 13:42:45 +0200 Subject: [PATCH 2/7] reset: stm32: Fix bank and offset computation BITS_PER_LONG is used to represent register's size which is 32. But when compiled on arch64, BITS_PER_LONG is then equal to 64. Fix bank and offset computation to make it work on arch32 and arch64 and ensure that register's size is always equal to 32. Signed-off-by: Patrice Chotard Signed-off-by: Pankaj Dev Reviewed-by: Patrick Delaunay --- drivers/reset/stm32-reset.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/reset/stm32-reset.c b/drivers/reset/stm32-reset.c index daa2e47ebbe..bbc6b135a93 100644 --- a/drivers/reset/stm32-reset.c +++ b/drivers/reset/stm32-reset.c @@ -40,8 +40,8 @@ static int stm32_reset_free(struct reset_ctl *reset_ctl) static int stm32_reset_assert(struct reset_ctl *reset_ctl) { struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev); - int bank = (reset_ctl->id / BITS_PER_LONG) * 4; - int offset = reset_ctl->id % BITS_PER_LONG; + int bank = (reset_ctl->id / (sizeof(u32) * BITS_PER_BYTE)) * 4; + int offset = reset_ctl->id % (sizeof(u32) * BITS_PER_BYTE); dev_dbg(reset_ctl->dev, "reset id = %ld bank = %d offset = %d)\n", reset_ctl->id, bank, offset); @@ -61,8 +61,8 @@ static int stm32_reset_assert(struct reset_ctl *reset_ctl) static int stm32_reset_deassert(struct reset_ctl *reset_ctl) { struct stm32_reset_priv *priv = dev_get_priv(reset_ctl->dev); - int bank = (reset_ctl->id / BITS_PER_LONG) * 4; - int offset = reset_ctl->id % BITS_PER_LONG; + int bank = (reset_ctl->id / (sizeof(u32) * BITS_PER_BYTE)) * 4; + int offset = reset_ctl->id % (sizeof(u32) * BITS_PER_BYTE); dev_dbg(reset_ctl->dev, "reset id = %ld bank = %d offset = %d)\n", reset_ctl->id, bank, offset); From 5c38c06ec09b3bad6a2c16ce2e11db18ea5d5faf Mon Sep 17 00:00:00 2001 From: Christoph Niedermaier Date: Wed, 5 May 2021 18:23:51 +0200 Subject: [PATCH 3/7] ARM: stm32: Update dhelectronics/dh_stm32mp1/MAINTAINERS file Adding new DH electronics mailing list. Signed-off-by: Christoph Niedermaier Reviewed-by: Patrick Delaunay --- board/dhelectronics/dh_stm32mp1/MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/board/dhelectronics/dh_stm32mp1/MAINTAINERS b/board/dhelectronics/dh_stm32mp1/MAINTAINERS index fd70131f9e6..9ce21c3ab29 100644 --- a/board/dhelectronics/dh_stm32mp1/MAINTAINERS +++ b/board/dhelectronics/dh_stm32mp1/MAINTAINERS @@ -1,5 +1,6 @@ DH_STM32MP1_PDK2 BOARD M: Marek Vasut +L: u-boot@dh-electronics.com S: Maintained F: arch/arm/dts/stm32mp15xx-dhcom* F: board/dhelectronics/dh_stm32mp1/ From 5c54260130a99601c699b447687dc5a82987c769 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 3 May 2021 13:31:39 +0200 Subject: [PATCH 4/7] ARM: stm32: Add additional ID register check for KSZ8851 presence Currently the code sets eth1addr only if /ethernet1 alias exists in DT, the node pointed to by the alias has "micrel,ks8851-mll" compatible string, and the KSZ8851 CCR register read indicates programmed EEPROM is not connected. This is not sufficient to detect cases where the DT still contains the KSZ8851 nodes, but the chip itself is not present. Extend the detection to handle these cases. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- board/dhelectronics/dh_stm32mp1/board.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/board/dhelectronics/dh_stm32mp1/board.c b/board/dhelectronics/dh_stm32mp1/board.c index 49b12c4c042..ac1af718d4a 100644 --- a/board/dhelectronics/dh_stm32mp1/board.c +++ b/board/dhelectronics/dh_stm32mp1/board.c @@ -86,6 +86,8 @@ DECLARE_GLOBAL_DATA_PTR; #define KS_CCR_EEPROM BIT(9) #define KS_BE0 BIT(12) #define KS_BE1 BIT(13) +#define KS_CIDER 0xC0 +#define CIDER_ID 0x8870 int setup_mac_address(void) { @@ -123,11 +125,18 @@ int setup_mac_address(void) * is present. If EEPROM is present, it must contain valid * MAC address. */ - u32 reg, ccr; + u32 reg, cider, ccr; reg = fdt_get_base_address(gd->fdt_blob, off); if (!reg) goto out_set_ethaddr; + writew(KS_BE0 | KS_BE1 | KS_CIDER, reg + 2); + cider = readw(reg); + if ((cider & 0xfff0) != CIDER_ID) { + skip_eth1 = true; + goto out_set_ethaddr; + } + writew(KS_BE0 | KS_BE1 | KS_CCR, reg + 2); ccr = readw(reg); if (ccr & KS_CCR_EEPROM) { From 5ed2136fb3c115ccf160a1c3cfd463538ded4723 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Mon, 3 May 2021 13:31:48 +0200 Subject: [PATCH 5/7] ARM: stm32: Enable UNZIP on DHSOM by default The CMD_UNZIP provides the 'gzwrite' command, which is convenient for writing e.g. gz-compressed images to eMMC from U-Boot. Signed-off-by: Marek Vasut Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- configs/stm32mp15_dhcom_basic_defconfig | 1 + configs/stm32mp15_dhcor_basic_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 3e62a589870..a127506a5f8 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -36,6 +36,7 @@ CONFIG_SYS_PROMPT="STM32MP> " CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y CONFIG_CMD_ADC=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index c1d333183f3..40d06f4e00f 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -34,6 +34,7 @@ CONFIG_SYS_PROMPT="STM32MP> " CONFIG_CMD_EEPROM=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y CONFIG_CMD_ADC=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y From 59066cd114ea550e379585e45e45b479821a4b88 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Thu, 6 May 2021 09:31:00 +0200 Subject: [PATCH 6/7] configs: stm32mp: Enable UNZIP on STMicroelectronics stm32mp15 boards The CMD_UNZIP provides the 'gzwrite' command, which is convenient for writing e.g. gz-compressed images to eMMC from U-Boot. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 2 files changed, 2 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 0d4c2311c94..3ff46f70489 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -38,6 +38,7 @@ CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y CONFIG_CMD_ADC=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index d5fc4d015a1..afbf721299b 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -21,6 +21,7 @@ CONFIG_CMD_ERASEENV=y CONFIG_CMD_NVEDIT_EFI=y CONFIG_CMD_MEMINFO=y CONFIG_CMD_MEMTEST=y +CONFIG_CMD_UNZIP=y CONFIG_CMD_ADC=y CONFIG_CMD_CLK=y CONFIG_CMD_DFU=y From 7bda7cee2dfc824eccc6a76ea531fc90b4f7923f Mon Sep 17 00:00:00 2001 From: Grzegorz Szymaszek Date: Mon, 19 Apr 2021 19:55:52 +0200 Subject: [PATCH 7/7] arm: dts: stm32mp157c-odyssey-som: enable the RNG1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Enable the true random number generator. It can be used, for example, to generate partition UUIDs when partitioning with the gpt command. The generator is already enabled in the device trees of several other STM32MP1‐based boards, like DKx or DHCOM. Signed-off-by: Grzegorz Szymaszek Cc: Patrice Chotard Cc: Patrick Delaunay Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi index 83ff2e7ce17..e367a311c42 100644 --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi @@ -258,6 +258,10 @@ status = "okay"; }; +&rng1 { + status = "okay"; +}; + &sdmmc2 { pinctrl-names = "default", "opendrain", "sleep"; pinctrl-0 = <&sdmmc2_b4_pins_a>;