From d5de3d497849d337b4da601c93a4cee2d127c20a Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Mon, 15 Oct 2018 20:35:10 +0200 Subject: [PATCH 1/3] arm: socfpga: fpga: fix type of local variable The 'status' variable in 'socfpga_load()' for both gen5 and arria10 is of type 'unsigned long' while it is always used as 'int' only. Change it to 'int'. Signed-off-by: Simon Goldschmidt --- drivers/fpga/socfpga_arria10.c | 2 +- drivers/fpga/socfpga_gen5.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c index d6b59498e5d..114dd910ab0 100644 --- a/drivers/fpga/socfpga_arria10.c +++ b/drivers/fpga/socfpga_arria10.c @@ -453,7 +453,7 @@ int fpgamgr_program_finish(void) */ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) { - unsigned long status; + int status; /* disable all signals from hps peripheral controller to fpga */ writel(0, &system_manager_base->fpgaintf_en_global); diff --git a/drivers/fpga/socfpga_gen5.c b/drivers/fpga/socfpga_gen5.c index 184de743fd3..6d16e0b37fb 100644 --- a/drivers/fpga/socfpga_gen5.c +++ b/drivers/fpga/socfpga_gen5.c @@ -204,7 +204,7 @@ static int fpgamgr_program_poll_usermode(void) */ int socfpga_load(Altera_desc *desc, const void *rbf_data, size_t rbf_size) { - unsigned long status; + int status; if ((uint32_t)rbf_data & 0x3) { puts("FPGA: Unaligned data, realign to 32bit boundary.\n"); From f457c52eb8bc0287288edd56670c075a4ecb6b38 Mon Sep 17 00:00:00 2001 From: Stefan Roese Date: Tue, 30 Oct 2018 10:00:22 +0100 Subject: [PATCH 2/3] arm: socfpga: Fix bootcounter located at the end of internal SRAM Commit 768f23dc8ae3 ("ARM: socfpga: Put stack at the end of SRAM") broke those socfpga boards that keep the bootcounter at the end of the internal SRAM as the bootcounter needs 8 bytes by default and thus the very first SPL call to board_init_f_alloc_reserve overwrites the bootcounter. This patch allows to move the initial stack pointer down a bit by checking if CONFIG_SYS_BOOTCOUNT_ADDR is located in the internal SRAM area and then using this address as location for the start of the stack pointer. No new macros / defines are added by this approach. Signed-off-by: Stefan Roese Cc: Marek Vasut Cc: Simon Goldschmidt --- include/configs/socfpga_common.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 2330143cf1c..bd8f5c8c412 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -31,8 +31,21 @@ #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 #define CONFIG_SYS_INIT_RAM_SIZE 0x40000 /* 256KB */ #endif + +/* + * Some boards (e.g. socfpga_sr1500) use 8 bytes at the end of the internal + * SRAM as bootcounter storage. Make sure to not put the stack directly + * at this address to not overwrite the bootcounter by checking, if the + * bootcounter address is located in the internal SRAM. + */ +#if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ + (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE))) +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_BOOTCOUNT_ADDR +#else #define CONFIG_SYS_INIT_SP_ADDR \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) +#endif #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 From f48db4ede07b52290477e188de714e327e4954de Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Tue, 30 Oct 2018 20:21:49 +0100 Subject: [PATCH 3/3] arm: socfpga: imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION Using imply for SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION instead of select ensures we can build without partition support (used to build a network boot only version of SPL and U-Boot). Signed-off-by: Simon Goldschmidt --- arch/arm/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 326d5c0daad..1f3fa1575a3 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -807,7 +807,6 @@ config ARCH_SOCFPGA select SPL_SPI_SUPPORT if DM_SPI select SPL_WATCHDOG_SUPPORT select SUPPORT_SPL - select SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE select SYS_NS16550 select SYS_THUMB_BUILD if TARGET_SOCFPGA_GEN5 || TARGET_SOCFPGA_ARRIA10 imply CMD_DM @@ -817,6 +816,7 @@ config ARCH_SOCFPGA imply DM_SPI_FLASH imply FAT_WRITE imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION + imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE config ARCH_SUNXI bool "Support sunxi (Allwinner) SoCs"