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arm64: zynqmp: Use mdio node by vp-x-a2785-00-revA and vpk120-revA

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All boards have been converted to use mdio node that's why move ethernet
phys under mdio node too.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/6c60f5d29b9d9992bd0130fd263c8ed13cb8166c.1697115523.git.michal.simek@amd.com
This commit is contained in:
Michal Simek 2023-10-12 14:58:47 +02:00
parent 971a772624
commit f87696afa0
2 changed files with 14 additions and 6 deletions
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10
arch/arm/dts/zynqmp-vp-x-a2785-00-revA.dts
View File

@ -119,9 +119,13 @@
phy-mode = "sgmii"; /* DTG generates this properly 1512 */
is-internal-pcspma;
/* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */
/* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
phy0: ethernet-phy@0 { /* u131 - M88e1512 */
reg = <0>;
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
/* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
phy0: ethernet-phy@0 { /* u131 - M88e1512 */
reg = <0>;
};
};
};

10
arch/arm/dts/zynqmp-vpk120-revA.dts
View File

@ -120,9 +120,13 @@
phy-mode = "sgmii"; /* DTG generates this properly 1512 */
is-internal-pcspma;
/* phys = <&psgtr 0 PHY_TYPE_SGMII 0 0>; */
/* phy-reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
phy0: ethernet-phy@0 {
reg = <0>;
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
/* reset-gpios = <&gpio 142 GPIO_ACTIVE_LOW>; */
phy0: ethernet-phy@0 {
reg = <0>;
};
};
};