diff --git a/arch/arm/dts/sam9x60ek.dts b/arch/arm/dts/sam9x60ek.dts
index 54c694bd784..eb44868a3e3 100644
--- a/arch/arm/dts/sam9x60ek.dts
+++ b/arch/arm/dts/sam9x60ek.dts
@@ -80,26 +80,26 @@
 			};
 
 			pinctrl {
-					pinctrl_qspi: qspi {
-						atmel,pins =
-							<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
-							 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
-							 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
-							 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
-							 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
-							 AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
-					};
+				pinctrl_qspi: qspi {
+					atmel,pins =
+						<AT91_PIOB 19 AT91_PERIPH_A AT91_PINCTRL_NONE
+						 AT91_PIOB 20 AT91_PERIPH_A AT91_PINCTRL_NONE
+						 AT91_PIOB 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+						 AT91_PIOB 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+						 AT91_PIOB 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
+						 AT91_PIOB 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
+				};
 
-					pinctrl_flx0: flx0_default {
-						atmel,pins =
-							<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
-							 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
-					};
+				pinctrl_flx0: flx0_default {
+					atmel,pins =
+						<AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_NONE
+						 AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_NONE>;
+				};
 
-					pinctrl_onewire_tm_default: onewire_tm_default {
-						atmel,pins =
-							<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
-					};
+				pinctrl_onewire_tm_default: onewire_tm_default {
+					atmel,pins =
+						<AT91_PIOD 14 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
+				};
 
 			};
 		};
diff --git a/arch/arm/dts/sama7g5-pinfunc.h b/arch/arm/dts/sama7g5-pinfunc.h
index 38d6962d004..b77185f8eda 100644
--- a/arch/arm/dts/sama7g5-pinfunc.h
+++ b/arch/arm/dts/sama7g5-pinfunc.h
@@ -261,7 +261,7 @@
 #define PIN_PB2__FLEXCOM6_IO0		PINMUX_PIN(PIN_PB2, 2, 1)
 #define PIN_PB2__ADTRG			PINMUX_PIN(PIN_PB2, 3, 1)
 #define PIN_PB2__A20			PINMUX_PIN(PIN_PB2, 4, 1)
-#define PIN_PB2__FLEXCOM11_IO0		PINMUX_PIN(PIN_PB2, 6, 3)
+#define PIN_PB2__FLEXCOM11_IO1		PINMUX_PIN(PIN_PB2, 6, 3)
 #define PIN_PB3				35
 #define PIN_PB3__GPIO			PINMUX_PIN(PIN_PB3, 0, 0)
 #define PIN_PB3__RF1			PINMUX_PIN(PIN_PB3, 1, 1)