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arm: dts: k3-am642-sk: Fix boot

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Since commit [1] A53 u-boot proper is broken.
This is because nodes marked as 'bootph-pre-ram' are
not available at u-boot proper before relocation.

To fix this we mark all nodes in sk-u-boot.dtsi as
'bootph-all'.

Move cbass_mcu node to -r5-sk.dts as it is only required
for R5 SPL.

[1]
9e644284ab812 ("dm: core: Report bootph-pre-ram/sram node as pre-reloc after relocation")

Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Nishanth Menon <nm@ti.com>
This commit is contained in:
Roger Quadros 2023-09-29 16:46:43 +03:00 committed by Tom Rini
parent 398bd2965c
commit f3285deeca
2 changed files with 40 additions and 40 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/dts/k3-am642-r5-sk.dts
View File

@ -53,6 +53,10 @@
bootph-pre-ram; bootph-pre-ram;
}; };
&cbass_mcu {
bootph-pre-ram;
};
&mcu_esm { &mcu_esm {
bootph-pre-ram; bootph-pre-ram;
}; };

76
arch/arm/dts/k3-am642-sk-u-boot.dtsi
View File

@ -11,129 +11,125 @@
}; };
memory@80000000 { memory@80000000 {
bootph-pre-ram; bootph-all;
}; };
}; };
&cbass_main{ &cbass_main{
bootph-pre-ram; bootph-all;
};
&cbass_mcu {
bootph-pre-ram;
}; };
&main_timer0 { &main_timer0 {
bootph-pre-ram; bootph-all;
clock-frequency = <200000000>; clock-frequency = <200000000>;
}; };
&main_conf { &main_conf {
bootph-pre-ram; bootph-all;
chipid@14 { chipid@14 {
bootph-pre-ram; bootph-all;
}; };
}; };
&main_pmx0 { &main_pmx0 {
bootph-pre-ram; bootph-all;
}; };
&main_i2c0_pins_default { &main_i2c0_pins_default {
bootph-pre-ram; bootph-all;
}; };
&main_i2c0 { &main_i2c0 {
bootph-pre-ram; bootph-all;
}; };
&main_uart0_pins_default { &main_uart0_pins_default {
bootph-pre-ram; bootph-all;
}; };
&main_uart0 { &main_uart0 {
bootph-pre-ram; bootph-all;
}; };
&dmss { &dmss {
bootph-pre-ram; bootph-all;
}; };
&secure_proxy_main { &secure_proxy_main {
bootph-pre-ram; bootph-all;
}; };
&dmsc { &dmsc {
bootph-pre-ram; bootph-all;
k3_sysreset: sysreset-controller { k3_sysreset: sysreset-controller {
compatible = "ti,sci-sysreset"; compatible = "ti,sci-sysreset";
bootph-pre-ram; bootph-all;
}; };
}; };
&k3_pds { &k3_pds {
bootph-pre-ram; bootph-all;
}; };
&k3_clks { &k3_clks {
bootph-pre-ram; bootph-all;
}; };
&k3_reset { &k3_reset {
bootph-pre-ram; bootph-all;
}; };
&sdhci0 { &sdhci0 {
status = "disabled"; status = "disabled";
bootph-pre-ram; bootph-all;
}; };
&sdhci1 { &sdhci1 {
bootph-pre-ram; bootph-all;
}; };
&main_mmc1_pins_default { &main_mmc1_pins_default {
bootph-pre-ram; bootph-all;
}; };
&cpsw3g { &cpsw3g {
bootph-pre-ram; bootph-all;
ethernet-ports { ethernet-ports {
bootph-pre-ram; bootph-all;
}; };
}; };
&cpsw_port2 { &cpsw_port2 {
bootph-pre-ram; bootph-all;
}; };
&main_bcdma { &main_bcdma {
bootph-pre-ram; bootph-all;
}; };
&main_pktdma { &main_pktdma {
bootph-pre-ram; bootph-all;
}; };
&rgmii1_pins_default { &rgmii1_pins_default {
bootph-pre-ram; bootph-all;
}; };
&rgmii2_pins_default { &rgmii2_pins_default {
bootph-pre-ram; bootph-all;
}; };
&mdio1_pins_default { &mdio1_pins_default {
bootph-pre-ram; bootph-all;
}; };
&cpsw3g_phy1 { &cpsw3g_phy1 {
bootph-pre-ram; bootph-all;
}; };
&main_usb0_pins_default { &main_usb0_pins_default {
bootph-pre-ram; bootph-all;
}; };
&serdes_ln_ctrl { &serdes_ln_ctrl {
@ -141,25 +137,25 @@
}; };
&usbss0 { &usbss0 {
bootph-pre-ram; bootph-all;
}; };
&usb0 { &usb0 {
bootph-pre-ram; bootph-all;
}; };
&serdes_wiz0 { &serdes_wiz0 {
bootph-pre-ram; bootph-all;
}; };
&serdes0_usb_link { &serdes0_usb_link {
bootph-pre-ram; bootph-all;
}; };
&serdes0 { &serdes0 {
bootph-pre-ram; bootph-all;
}; };
&serdes_refclk { &serdes_refclk {
bootph-pre-ram; bootph-all;
}; };