mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-08-26 17:11:36 +02:00
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commit
f31f5367f4
@ -5,7 +5,7 @@ dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb
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dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt.dtb
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dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNLEASHED) += hifive-unleashed-a00.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb hifive-unmatched-a00-rev1.dtb
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dtb-$(CONFIG_TARGET_SIFIVE_UNMATCHED) += hifive-unmatched-a00.dtb
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dtb-$(CONFIG_TARGET_SIPEED_MAIX) += k210-maix-bit.dtb
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targets += $(dtb-y)
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File diff suppressed because it is too large
Load Diff
@ -1,7 +0,0 @@
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
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/*
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* Copyright (C) 2021 SiFive, Inc
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*/
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#include "hifive-unmatched-a00-u-boot.dtsi"
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#include "fu740-hifive-unmatched-a00-ddr-rev1.dtsi"
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@ -1,4 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0+
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/* Copyright (c) 2021 SiFive, Inc */
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#include "hifive-unmatched-a00.dts"
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@ -50,7 +50,12 @@ int booti_setup(ulong image, ulong *relocated_addr, ulong *size,
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return -EINVAL;
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}
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*size = lhdr->image_size;
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*relocated_addr = gd->ram_base + lhdr->text_offset;
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if (force_reloc ||
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(gd->ram_base <= image && image < gd->ram_base + gd->ram_size)) {
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*relocated_addr = gd->ram_base + lhdr->text_offset;
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} else {
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*relocated_addr = image;
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}
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unmap_sysmem(lhdr);
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@ -401,24 +401,6 @@ static void set_product_id(char *string)
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update_crc();
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}
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/**
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* set_serial_number() - set the PCB serial number in the in-memory copy
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*
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* Set the board serial number in the in-memory EEPROM copy from the supplied
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* string argument, and update the CRC.
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*/
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static void set_serial_number(char *string)
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{
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if (strlen(string) > SERIAL_NUMBER_BYTES) {
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printf("Serial number must not be greater than 16 bytes\n");
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return;
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}
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memset(e.serial, 0, sizeof(e.serial));
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strncpy((char *)e.serial, string, sizeof(e.serial));
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update_crc();
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}
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/**
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* init_local_copy() - initialize the in-memory EEPROM copy
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*
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@ -468,10 +450,7 @@ int do_mac(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
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return 0;
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}
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if (!strcmp(cmd, "serial_number")) {
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set_serial_number(argv[2]);
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return 0;
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} else if (!strcmp(cmd, "manuf_test_status")) {
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if (!strcmp(cmd, "manuf_test_status")) {
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set_manuf_test_status(argv[2]);
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return 0;
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} else if (!strcmp(cmd, "mac_address")) {
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@ -10,68 +10,111 @@
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#include <spl.h>
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#include <misc.h>
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#include <log.h>
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#include <fdtdec.h>
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#include <dm/root.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <asm/gpio.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/spl.h>
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#include <asm/arch/eeprom.h>
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#define UBRDG_RESET SIFIVE_GENERIC_GPIO_NR(0, 7)
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#define ULPI_RESET SIFIVE_GENERIC_GPIO_NR(0, 9)
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#define UHUB_RESET SIFIVE_GENERIC_GPIO_NR(0, 11)
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#define GEM_PHY_RESET SIFIVE_GENERIC_GPIO_NR(0, 12)
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#define MODE_SELECT_REG 0x1000
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#define MODE_SELECT_SD 0xb
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#define MODE_SELECT_MASK GENMASK(3, 0)
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int spl_board_init_f(void)
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static inline int spl_reset_device_by_gpio(const char *label, int pin, int low_width)
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{
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int ret;
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#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_MULTI_DTB_FIT)
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int rescan;
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ret = fdtdec_resetup(&rescan);
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if (!ret && rescan) {
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dm_uninit();
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dm_init_and_scan(true);
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}
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#endif
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ret = spl_soc_init();
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ret = gpio_request(pin, label);
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if (ret) {
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debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
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debug("%s gpio request failed: %d\n", label, ret);
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return ret;
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}
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ret = gpio_direction_output(pin, 1);
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if (ret) {
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debug("%s gpio direction set failed: %d\n", label, ret);
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return ret;
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}
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udelay(1);
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gpio_set_value(pin, 0);
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udelay(low_width);
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gpio_set_value(pin, 1);
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return ret;
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}
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static inline int spl_gemgxl_init(void)
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{
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int ret;
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/*
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* GEMGXL init VSC8541 PHY reset sequence;
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* leave pull-down active for 2ms
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*/
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udelay(2000);
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ret = gpio_request(GEM_PHY_RESET, "gem_phy_reset");
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if (ret) {
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debug("gem_phy_reset gpio request failed: %d\n", ret);
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return ret;
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}
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/* Set GPIO 12 (PHY NRESET) */
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ret = gpio_direction_output(GEM_PHY_RESET, 1);
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if (ret) {
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debug("gem_phy_reset gpio direction set failed: %d\n", ret);
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return ret;
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}
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udelay(1);
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/* Reset PHY again to enter unmanaged mode */
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gpio_set_value(GEM_PHY_RESET, 0);
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udelay(1);
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gpio_set_value(GEM_PHY_RESET, 1);
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ret = spl_reset_device_by_gpio("gem_phy_reset", GEM_PHY_RESET, 1);
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mdelay(15);
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return 0;
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return ret;
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}
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static inline int spl_usb_pcie_bridge_init(void)
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{
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return spl_reset_device_by_gpio("usb_pcie_bridge_reset", UBRDG_RESET, 3000);
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}
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static inline int spl_usb_hub_init(void)
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{
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return spl_reset_device_by_gpio("usb_hub_reset", UHUB_RESET, 100);
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}
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static inline int spl_ulpi_init(void)
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{
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return spl_reset_device_by_gpio("ulpi_reset", ULPI_RESET, 1);
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}
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int spl_board_init_f(void)
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{
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int ret;
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ret = spl_soc_init();
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if (ret) {
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debug("HiFive Unmatched FU740 SPL init failed: %d\n", ret);
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goto end;
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}
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ret = spl_gemgxl_init();
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if (ret) {
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debug("Gigabit ethernet PHY (VSC8541) init failed: %d\n", ret);
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goto end;
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}
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ret = spl_usb_pcie_bridge_init();
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if (ret) {
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debug("USB Bridge (ASM1042A) init failed: %d\n", ret);
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goto end;
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}
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ret = spl_usb_hub_init();
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if (ret) {
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debug("USB Hub (ASM1074) init failed: %d\n", ret);
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goto end;
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}
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ret = spl_ulpi_init();
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if (ret) {
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debug("USB 2.0 PHY (USB3320C) init failed: %d\n", ret);
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goto end;
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}
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end:
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return ret;
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}
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u32 spl_boot_device(void)
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@ -92,18 +135,7 @@ u32 spl_boot_device(void)
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#ifdef CONFIG_SPL_LOAD_FIT
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int board_fit_config_name_match(const char *name)
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{
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/*
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* Apply different DDR params on different board revision.
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* Use PCB revision which is byte 0x7 in I2C platform EEPROM
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* to distinguish that.
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*/
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if (get_pcb_revision_from_eeprom() == PCB_REVISION_REV3 &&
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!strcmp(name, "hifive-unmatched-a00"))
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return 0;
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else if (get_pcb_revision_from_eeprom() != PCB_REVISION_REV3 &&
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!strcmp(name, "hifive-unmatched-a00-rev1"))
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return 0;
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return -1;
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/* boot using first FIT config */
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return 0;
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}
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#endif
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@ -5,7 +5,6 @@ CONFIG_NR_DRAM_BANKS=1
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CONFIG_SPL_DM_SPI=y
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CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00"
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CONFIG_SPL_MMC_SUPPORT=y
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CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000
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CONFIG_SPL=y
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CONFIG_SPL_SPI_SUPPORT=y
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CONFIG_TARGET_SIFIVE_UNMATCHED=y
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@ -28,9 +27,6 @@ CONFIG_CMD_PWM=y
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CONFIG_CMD_GPT_RENAME=y
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CONFIG_CMD_PCI=y
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CONFIG_CMD_USB=y
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CONFIG_SPL_MULTI_DTB_FIT=y
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CONFIG_SPL_OF_LIST="hifive-unmatched-a00 hifive-unmatched-a00-rev1"
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CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
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CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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CONFIG_SPL_CLK=y
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CONFIG_E1000=y
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