From 7950b1dcf1e32017466a6f79872efb33594412d7 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Thu, 16 Mar 2023 08:03:42 +0100 Subject: [PATCH 01/10] configs: stm32mp15: Add usb_pgood_delay for ST boards Add usb_pgood_delay to ensure a correct detection of USB devices. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- include/configs/stm32mp15_st_common.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h index d0cd4130cec..866cd7a719f 100644 --- a/include/configs/stm32mp15_st_common.h +++ b/include/configs/stm32mp15_st_common.h @@ -9,6 +9,7 @@ #define __CONFIG_STM32MP15_ST_COMMON_H__ #define STM32MP_BOARD_EXTRA_ENV \ + "usb_pgood_delay=2000\0" \ "console=ttySTM0\0" #include From ac31663c9caebcec558104dddb8d8a407356e2be Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Thu, 16 Mar 2023 08:03:43 +0100 Subject: [PATCH 02/10] configs: stm32mp13: Increase usb_pgood_delay for ST boards With some USB device, the current usb_pgood_delay value is not long enough to ensure a correct detection. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- include/configs/stm32mp13_st_common.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/configs/stm32mp13_st_common.h b/include/configs/stm32mp13_st_common.h index ad8126f6103..20ec11477d6 100644 --- a/include/configs/stm32mp13_st_common.h +++ b/include/configs/stm32mp13_st_common.h @@ -9,7 +9,7 @@ #define __CONFIG_STM32MP13_ST_COMMON_H__ #define STM32MP_BOARD_EXTRA_ENV \ - "usb_pgood_delay=1000\0" \ + "usb_pgood_delay=2000\0" \ "console=ttySTM0\0" #include From bff0d846c716a4337c8fa4316d9b3b03aff4db0d Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 27 Mar 2023 09:46:41 +0200 Subject: [PATCH 03/10] pinctrl: pinctrl_stm32: Add slew rate support for stm32_pinctrl_get_pin_muxing() For debug purpose, it should be useful to indicate the slew rate for each pins. Add ospeed register information for pins which are configured in either alternate function or gpio output. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- drivers/pinctrl/pinctrl_stm32.c | 19 +++++++++++++++---- 1 file changed, 15 insertions(+), 4 deletions(-) diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index b755fa42b4f..b06da50b2cd 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -61,6 +61,13 @@ static const char * const pinmux_otype[] = { [STM32_GPIO_OTYPE_OD] = "open-drain", }; +static const char * const pinmux_speed[] = { + [STM32_GPIO_SPEED_2M] = "Low speed", + [STM32_GPIO_SPEED_25M] = "Medium speed", + [STM32_GPIO_SPEED_50M] = "High speed", + [STM32_GPIO_SPEED_100M] = "Very-high speed", +}; + static int stm32_pinctrl_get_af(struct udevice *dev, unsigned int offset) { struct stm32_gpio_priv *priv = dev_get_priv(dev); @@ -201,6 +208,7 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, int af_num; unsigned int gpio_idx; u32 pupd, otype; + u8 speed; /* look up for the bank which owns the requested pin */ gpio_dev = stm32_pinctrl_get_gpio_dev(dev, selector, &gpio_idx); @@ -214,6 +222,7 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, priv = dev_get_priv(gpio_dev); pupd = (readl(&priv->regs->pupdr) >> (gpio_idx * 2)) & PUPD_MASK; otype = (readl(&priv->regs->otyper) >> gpio_idx) & OTYPE_MSK; + speed = (readl(&priv->regs->ospeedr) >> gpio_idx * 2) & OSPEED_MASK; switch (mode) { case GPIOF_UNKNOWN: @@ -222,13 +231,15 @@ static int stm32_pinctrl_get_pin_muxing(struct udevice *dev, break; case GPIOF_FUNC: af_num = stm32_pinctrl_get_af(gpio_dev, gpio_idx); - snprintf(buf, size, "%s %d %s %s", pinmux_mode[mode], af_num, - pinmux_otype[otype], pinmux_bias[pupd]); + snprintf(buf, size, "%s %d %s %s %s", pinmux_mode[mode], af_num, + pinmux_otype[otype], pinmux_bias[pupd], + pinmux_speed[speed]); break; case GPIOF_OUTPUT: - snprintf(buf, size, "%s %s %s %s", + snprintf(buf, size, "%s %s %s %s %s", pinmux_mode[mode], pinmux_otype[otype], - pinmux_bias[pupd], label ? label : ""); + pinmux_bias[pupd], label ? label : "", + pinmux_speed[speed]); break; case GPIOF_INPUT: snprintf(buf, size, "%s %s %s", pinmux_mode[mode], From 60edabc0a38e9f5ee0d84dad19710873fabac5e7 Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 3 Apr 2023 08:04:11 +0200 Subject: [PATCH 04/10] ARM: dts: stm32: Add QSPI support on STM32MP13x SoC family Add QSPI support on STM32MP13x SoC family Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/dts/stm32mp131.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index 3cf51f09bcb..5a064d5566e 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -191,6 +191,21 @@ dma-requests = <48>; }; + qspi: spi@58003000 { + compatible = "st,stm32f469-qspi"; + reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; + reg-names = "qspi", "qspi_mm"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + dmas = <&mdma 26 0x2 0x10100002 0x0 0x0>, + <&mdma 26 0x2 0x10100008 0x0 0x0>; + dma-names = "tx", "rx"; + clocks = <&rcc QSPI_K>; + resets = <&rcc QSPI_R>; + status = "disabled"; + }; + sdmmc1: mmc@58005000 { compatible = "st,stm32-sdmmc2", "arm,pl18x", "arm,primecell"; arm,primecell-periphid = <0x20253180>; From acf9f03634c472041dd2f4a5d7fa5c9b0d0b081d Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Mon, 3 Apr 2023 08:04:43 +0200 Subject: [PATCH 05/10] spi: stm32_qspi: Remove useless struct stm32_qspi_flash Currently, in stm32_qspi_claim_bus(), QSPI_CR and QSPI_DCR registers are saved in stm32_ospi_flash struct on first flash memory initialization and restored on each flash accesses. As the logic of spi-uclass.c changed since 'commit 741280e9accd ("spi: spi-uclass: Fix spi_claim_bus() speed/mode setup logic")' set_speed() and set_mode() callbacks are called systematically when bus speed or bus mode need to be updated, QSPI_CR and QSPI_DCR registers are set accordingly. So stm32_qspi_claim_bus() can be updated by removing QSPI_CR and QSPI_DCR save/restore code and struct stm32_ospi_flash can be removed as well. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- drivers/spi/stm32_qspi.c | 27 +++------------------------ 1 file changed, 3 insertions(+), 24 deletions(-) diff --git a/drivers/spi/stm32_qspi.c b/drivers/spi/stm32_qspi.c index 90c207d5184..eb52ff73b23 100644 --- a/drivers/spi/stm32_qspi.c +++ b/drivers/spi/stm32_qspi.c @@ -115,15 +115,8 @@ struct stm32_qspi_regs { #define STM32_BUSY_TIMEOUT_US 100000 #define STM32_ABT_TIMEOUT_US 100000 -struct stm32_qspi_flash { - u32 cr; - u32 dcr; - bool initialized; -}; - struct stm32_qspi_priv { struct stm32_qspi_regs *regs; - struct stm32_qspi_flash flash[STM32_QSPI_MAX_CHIP]; void __iomem *mm_base; resource_size_t mm_size; ulong clock_rate; @@ -407,25 +400,11 @@ static int stm32_qspi_claim_bus(struct udevice *dev) return -ENODEV; if (priv->cs_used != slave_cs) { - struct stm32_qspi_flash *flash = &priv->flash[slave_cs]; - priv->cs_used = slave_cs; - if (flash->initialized) { - /* Set the configuration: speed + cs */ - writel(flash->cr, &priv->regs->cr); - writel(flash->dcr, &priv->regs->dcr); - } else { - /* Set chip select */ - clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL, - priv->cs_used ? STM32_QSPI_CR_FSEL : 0); - - /* Save the configuration: speed + cs */ - flash->cr = readl(&priv->regs->cr); - flash->dcr = readl(&priv->regs->dcr); - - flash->initialized = true; - } + /* Set chip select */ + clrsetbits_le32(&priv->regs->cr, STM32_QSPI_CR_FSEL, + priv->cs_used ? STM32_QSPI_CR_FSEL : 0); } setbits_le32(&priv->regs->cr, STM32_QSPI_CR_EN); From d6fe59b781e1b0e8f3e5874fe2e96376a01836ae Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 7 Apr 2023 11:37:08 +0200 Subject: [PATCH 06/10] configs: stm32mp15: increase malloc size for pre-reloc The early malloc usage increased so the associated defined CONFIG_SYS_MALLOC_F_LEN need to be increased. For example, for stm32mp15_defconfig and stm32mp157c-dk2-scmi.dtsi, we have: Early malloc usage: 280b8 / 80000 Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- configs/stm32mp15_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 0005e426644..2676ff381d8 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -1,7 +1,7 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y -CONFIG_SYS_MALLOC_F_LEN=0x20000 +CONFIG_SYS_MALLOC_F_LEN=0x80000 CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 From fa998c8aea43171959ad3d5dbcac37ca2441e8f9 Mon Sep 17 00:00:00 2001 From: Christophe Kerello Date: Thu, 30 Mar 2023 11:26:17 +0200 Subject: [PATCH 07/10] ARM: dts: stm32: add FMC support on STM32MP13x SoC family Add FMC support on STM32MP13x SoC family. Signed-off-by: Christophe Kerello Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32mp131.dtsi | 33 +++++++++++++++++++++++++++++++++ 1 file changed, 33 insertions(+) diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index 5a064d5566e..6d82bf646d2 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -191,6 +191,39 @@ dma-requests = <48>; }; + fmc: memory-controller@58002000 { + compatible = "st,stm32mp1-fmc2-ebi"; + reg = <0x58002000 0x1000>; + ranges = <0 0 0x60000000 0x04000000>, /* EBI CS 1 */ + <1 0 0x64000000 0x04000000>, /* EBI CS 2 */ + <2 0 0x68000000 0x04000000>, /* EBI CS 3 */ + <3 0 0x6c000000 0x04000000>, /* EBI CS 4 */ + <4 0 0x80000000 0x10000000>; /* NAND */ + #address-cells = <2>; + #size-cells = <1>; + clocks = <&rcc FMC_K>; + resets = <&rcc FMC_R>; + status = "disabled"; + + nand-controller@4,0 { + compatible = "st,stm32mp1-fmc2-nfc"; + reg = <4 0x00000000 0x1000>, + <4 0x08010000 0x1000>, + <4 0x08020000 0x1000>, + <4 0x01000000 0x1000>, + <4 0x09010000 0x1000>, + <4 0x09020000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + interrupts = ; + dmas = <&mdma 24 0x2 0x12000a02 0x0 0x0>, + <&mdma 24 0x2 0x12000a08 0x0 0x0>, + <&mdma 25 0x2 0x12000a0a 0x0 0x0>; + dma-names = "tx", "rx", "ecc"; + status = "disabled"; + }; + }; + qspi: spi@58003000 { compatible = "st,stm32f469-qspi"; reg = <0x58003000 0x1000>, <0x70000000 0x10000000>; From bb0352009822239044ac7f2eafcdff8c71d56ed2 Mon Sep 17 00:00:00 2001 From: Christophe Kerello Date: Thu, 30 Mar 2023 11:16:21 +0200 Subject: [PATCH 08/10] mtd: rawnand: stm32_fmc2: remove unsupported EDO mode Remove the EDO mode support from as the FMC2 controller does not support the feature. Signed-off-by: Christophe Kerello Reviewed-by: Patrice Chotard --- drivers/mtd/nand/raw/stm32_fmc2_nand.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c index fb3279b405e..69dbb629e93 100644 --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c @@ -735,6 +735,9 @@ static int stm32_fmc2_nfc_setup_interface(struct mtd_info *mtd, int chipnr, if (IS_ERR(sdrt)) return PTR_ERR(sdrt); + if (sdrt->tRC_min < 30000) + return -EOPNOTSUPP; + if (chipnr == NAND_DATA_IFACE_CHECK_ONLY) return 0; From daf07215e8c4aed16af81e1615396f5502040c1f Mon Sep 17 00:00:00 2001 From: Rasmus Villemoes Date: Fri, 24 Mar 2023 08:55:19 +0100 Subject: [PATCH 09/10] stm32mp: fix various array bounds checks In all these cases, the index on the LHS is immediately afterwards used to access the array appearing in the ARRAY_SIZE() on the RHS - so if that index is equal to the array size, we'll access one-past-the-end of the array. Signed-off-by: Rasmus Villemoes Reviewed-by: Patrice Chotard Reviewed-by: Patrick Delaunay --- arch/arm/mach-stm32mp/cpu.c | 4 ++-- board/st/stm32mp1/stm32mp1.c | 2 +- drivers/ram/stm32mp1/stm32mp1_interactive.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c index dc4112d5e6c..e2f67fc4233 100644 --- a/arch/arm/mach-stm32mp/cpu.c +++ b/arch/arm/mach-stm32mp/cpu.c @@ -190,7 +190,7 @@ static void setup_boot_mode(void) __func__, boot_ctx, boot_mode, instance, forced_mode); switch (boot_mode & TAMP_BOOT_DEVICE_MASK) { case BOOT_SERIAL_UART: - if (instance > ARRAY_SIZE(serial_addr)) + if (instance >= ARRAY_SIZE(serial_addr)) break; /* serial : search associated node in devicetree */ sprintf(cmd, "serial@%x", serial_addr[instance]); @@ -220,7 +220,7 @@ static void setup_boot_mode(void) break; case BOOT_FLASH_SD: case BOOT_FLASH_EMMC: - if (instance > ARRAY_SIZE(sdmmc_addr)) + if (instance >= ARRAY_SIZE(sdmmc_addr)) break; /* search associated sdmmc node in devicetree */ sprintf(cmd, "mmc@%x", sdmmc_addr[instance]); diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c index ca8f0255ae0..1a1b1844c8c 100644 --- a/board/st/stm32mp1/stm32mp1.c +++ b/board/st/stm32mp1/stm32mp1.c @@ -872,7 +872,7 @@ int mmc_get_boot(void) STM32_SDMMC3_BASE }; - if (instance > ARRAY_SIZE(sdmmc_addr)) + if (instance >= ARRAY_SIZE(sdmmc_addr)) return 0; /* search associated sdmmc node in devicetree */ diff --git a/drivers/ram/stm32mp1/stm32mp1_interactive.c b/drivers/ram/stm32mp1/stm32mp1_interactive.c index f0fe7e61e33..2c19847c663 100644 --- a/drivers/ram/stm32mp1/stm32mp1_interactive.c +++ b/drivers/ram/stm32mp1/stm32mp1_interactive.c @@ -391,7 +391,7 @@ bool stm32mp1_ddr_interactive(void *priv, if (next_step < 0) return false; - if (step < 0 || step > ARRAY_SIZE(step_str)) { + if (step < 0 || step >= ARRAY_SIZE(step_str)) { printf("** step %d ** INVALID\n", step); return false; } From 0d5bd362f61dd3dc54f9a32fd38541b8d5c5d869 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Fri, 9 Sep 2022 11:45:24 +0200 Subject: [PATCH 10/10] configs: stm32mp15: set CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2s With some USB devices connected on USB HUB for the STMicroelectronics boards, set the usb_pgood_delay=2 is not enough to ensure a correct detection for all cases; but it is solved with USB_HUB_DEBOUNCE_TIMEOUT=2s. For example, issue encountered with the USB flash disk: ID 058f:6387 Alcor Micro Corp. Flash Drive Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- configs/stm32mp15_basic_defconfig | 1 + configs/stm32mp15_defconfig | 1 + configs/stm32mp15_trusted_defconfig | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index faf5f0993b0..086e6bce35b 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -46,6 +46,7 @@ CONFIG_SPL_POWER=y CONFIG_SPL_SPI_FLASH_MTD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_FDT_SIMPLEFB=y +CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 2676ff381d8..a8eda7b4ad8 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -22,6 +22,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y +CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index 06fa43b20f8..2269156eb3b 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -23,6 +23,7 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_FDT_SIMPLEFB=y +CONFIG_USB_HUB_DEBOUNCE_TIMEOUT=2000 CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_CMD_ADTIMG=y