From 62b096d907820b70f309e0d039a2ab402e784d6d Mon Sep 17 00:00:00 2001 From: Chintan Vankar Date: Mon, 26 Aug 2024 15:55:05 +0530 Subject: [PATCH 01/11] common: spl: spl: Init DRAM size in R5/A53 SPL Initialize DRAM size in SPL stage since networking requires DDR to be initialized. Reviewed-by: Dhruva Gole Reviewed-by: Tom Rini Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Chintan Vankar --- common/spl/spl.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/common/spl/spl.c b/common/spl/spl.c index 7c6e322ffd7..43a29db23bd 100644 --- a/common/spl/spl.c +++ b/common/spl/spl.c @@ -718,7 +718,7 @@ void board_init_r(gd_t *dummy1, ulong dummy2) initr_watchdog(); if (IS_ENABLED(CONFIG_SPL_OS_BOOT) || CONFIG_IS_ENABLED(HANDOFF) || - IS_ENABLED(CONFIG_SPL_ATF)) + IS_ENABLED(CONFIG_SPL_ATF) || IS_ENABLED(CONFIG_SPL_NET)) dram_init_banksize(); if (CONFIG_IS_ENABLED(PCI) && !(gd->flags & GD_FLG_DM_DEAD)) { From 48ea3107715a91bb9b90bfbb17343346ec9fd86a Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 26 Aug 2024 15:55:06 +0530 Subject: [PATCH 02/11] firmware: ti_sci: Add No-OP for "RX_FL_CFG" RX_FL_CFG message should not be forwarded to TIFS and should be handled within R5 SPL (when DM services are not available). Add a no-op function to not handle RX_FL_CFG messages. Reviewed-by: Alexander Sverdlin Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- drivers/firmware/ti_sci.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c index e591333ba38..719cfa771b4 100644 --- a/drivers/firmware/ti_sci.c +++ b/drivers/firmware/ti_sci.c @@ -2450,6 +2450,12 @@ fail: return ret; } +static int ti_sci_cmd_rm_udmap_rx_flow_cfg_noop(const struct ti_sci_handle *handle, + const struct ti_sci_msg_rm_udmap_flow_cfg *params) +{ + return 0; +} + /** * ti_sci_cmd_set_fwl_region() - Request for configuring a firewall region * @handle: pointer to TI SCI handle @@ -2895,7 +2901,7 @@ static __maybe_unused int ti_sci_dm_probe(struct udevice *dev) udmap_ops = &ops->rm_udmap_ops; udmap_ops->tx_ch_cfg = ti_sci_cmd_rm_udmap_tx_ch_cfg; udmap_ops->rx_ch_cfg = ti_sci_cmd_rm_udmap_rx_ch_cfg; - udmap_ops->rx_flow_cfg = ti_sci_cmd_rm_udmap_rx_flow_cfg; + udmap_ops->rx_flow_cfg = ti_sci_cmd_rm_udmap_rx_flow_cfg_noop; return ret; } From 40710d3388d9998814faaf13da8bfd5220ce56d5 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 26 Aug 2024 15:55:07 +0530 Subject: [PATCH 03/11] soc: ti: k3-navss-ringacc: Initialize base address of ring cfg registers Initialize base address of ring config registers required to natively setup ring cfg registers in the absence of Device Manager (DM) services at R5 SPL stage. Since register property is defined as "ring" for PKTDMA and "cfg" for UDMA, configure base address of ring configuration register accordingly. Reviewed-by: Alexander Sverdlin Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- drivers/soc/ti/k3-navss-ringacc.c | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/soc/ti/k3-navss-ringacc.c b/drivers/soc/ti/k3-navss-ringacc.c index b2643a30d3d..14114a65830 100644 --- a/drivers/soc/ti/k3-navss-ringacc.c +++ b/drivers/soc/ti/k3-navss-ringacc.c @@ -1028,8 +1028,8 @@ static int k3_nav_ringacc_init(struct udevice *dev, struct k3_nav_ringacc *ringa struct k3_nav_ringacc *k3_ringacc_dmarings_init(struct udevice *dev, struct k3_ringacc_init_data *data) { + void __iomem *base_rt, *base_cfg; struct k3_nav_ringacc *ringacc; - void __iomem *base_rt; int i; ringacc = devm_kzalloc(dev, sizeof(*ringacc), GFP_KERNEL); @@ -1047,6 +1047,20 @@ struct k3_nav_ringacc *k3_ringacc_dmarings_init(struct udevice *dev, if (!base_rt) return ERR_PTR(-EINVAL); + /* + * Since register property is defined as "ring" for PKTDMA and + * "cfg" for UDMA, configure base address of ring configuration + * register accordingly. + */ + base_cfg = dev_remap_addr_name(dev, "ring"); + pr_debug("ring %p\n", base_cfg); + if (!base_cfg) { + base_cfg = dev_remap_addr_name(dev, "cfg"); + pr_debug("cfg %p\n", base_cfg); + if (!base_cfg) + return ERR_PTR(-EINVAL); + } + ringacc->rings = devm_kzalloc(dev, sizeof(*ringacc->rings) * ringacc->num_rings * 2, @@ -1061,6 +1075,7 @@ struct k3_nav_ringacc *k3_ringacc_dmarings_init(struct udevice *dev, for (i = 0; i < ringacc->num_rings; i++) { struct k3_nav_ring *ring = &ringacc->rings[i]; + ring->cfg = base_cfg + KNAV_RINGACC_CFG_REGS_STEP * i; ring->rt = base_rt + K3_DMARING_RING_RT_REGS_STEP * i; ring->parent = ringacc; ring->ring_id = i; From 963c13d13376e5bb2103556bc61160db12bc31e3 Mon Sep 17 00:00:00 2001 From: Vignesh Raghavendra Date: Mon, 26 Aug 2024 15:55:08 +0530 Subject: [PATCH 04/11] soc: ti: k3-navss-ringacc: Fix reset ring API Expectation of k3_ringacc_ring_reset_raw() is to reset the ring to requested size and not to 0. Fix this. Signed-off-by: Vignesh Raghavendra Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar Reviewed-by: Alexander Sverdlin --- drivers/soc/ti/k3-navss-ringacc-u-boot.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/soc/ti/k3-navss-ringacc-u-boot.c b/drivers/soc/ti/k3-navss-ringacc-u-boot.c index f958239c2af..2799f214c77 100644 --- a/drivers/soc/ti/k3-navss-ringacc-u-boot.c +++ b/drivers/soc/ti/k3-navss-ringacc-u-boot.c @@ -25,9 +25,16 @@ struct k3_nav_ring_cfg_regs { #define KNAV_RINGACC_CFG_RING_SIZE_ELSIZE_MASK GENMASK(26, 24) #define KNAV_RINGACC_CFG_RING_SIZE_ELSIZE_SHIFT (24) +#define KNAV_RINGACC_CFG_RING_SIZE_MASK GENMASK(19, 0) + static void k3_ringacc_ring_reset_raw(struct k3_nav_ring *ring) { - writel(0, &ring->cfg->size); + u32 reg; + + reg = readl(&ring->cfg->size); + reg &= ~KNAV_RINGACC_CFG_RING_SIZE_MASK; + reg |= ring->size; + writel(reg, &ring->cfg->size); } static void k3_ringacc_ring_reconfig_qmode_raw(struct k3_nav_ring *ring, enum k3_nav_ring_mode mode) From eedfbb86c259fdc69dbe531da97544fd3e4d7dfe Mon Sep 17 00:00:00 2001 From: Chintan Vankar Date: Mon, 26 Aug 2024 15:55:09 +0530 Subject: [PATCH 05/11] soc: ti: k3-navss-ringacc: Fix reconfiguration of qmode API Function "k3_ringacc_ring_reconfig_qmode_raw()" should reset qmode to requested value and should not update other fields in ring configuration register. Signed-off-by: Chintan Vankar Reviewed-by: Alexander Sverdlin Reviewed-by: Vignesh Raghavendra --- drivers/soc/ti/k3-navss-ringacc-u-boot.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/soc/ti/k3-navss-ringacc-u-boot.c b/drivers/soc/ti/k3-navss-ringacc-u-boot.c index 2799f214c77..8227d8bc3e3 100644 --- a/drivers/soc/ti/k3-navss-ringacc-u-boot.c +++ b/drivers/soc/ti/k3-navss-ringacc-u-boot.c @@ -42,7 +42,7 @@ static void k3_ringacc_ring_reconfig_qmode_raw(struct k3_nav_ring *ring, enum k3 u32 val; val = readl(&ring->cfg->size); - val &= KNAV_RINGACC_CFG_RING_SIZE_QMODE_MASK; + val &= ~KNAV_RINGACC_CFG_RING_SIZE_QMODE_MASK; val |= mode << KNAV_RINGACC_CFG_RING_SIZE_QMODE_SHIFT; writel(val, &ring->cfg->size); } From c78af987208d88a04037796b9da5f33d3aa09b46 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 26 Aug 2024 15:55:10 +0530 Subject: [PATCH 06/11] dma: ti: k3-udma: Add support for native configuration of chan/flow In absence of Device Manager (DM) services such as at R5 SPL stage, driver will have to natively setup TCHAN/RCHAN/RFLOW cfg registers. Existing UDMA driver performed the above mentioned configuration for UDMA. Add similar configuration for PKTDMA here. Reviewed-by: Alexander Sverdlin Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- drivers/dma/ti/k3-udma.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/dma/ti/k3-udma.c b/drivers/dma/ti/k3-udma.c index b7e674f2186..e23d09e6b81 100644 --- a/drivers/dma/ti/k3-udma.c +++ b/drivers/dma/ti/k3-udma.c @@ -2118,6 +2118,9 @@ static int bcdma_tisci_tx_channel_config(struct udma_chan *uc) if (ret) dev_err(ud->dev, "tchan%d cfg failed %d\n", tchan->id, ret); + if (IS_ENABLED(CONFIG_K3_DM_FW)) + udma_alloc_tchan_raw(uc); + return ret; } @@ -2166,6 +2169,9 @@ static int pktdma_tisci_rx_channel_config(struct udma_chan *uc) dev_err(ud->dev, "flow%d config failed: %d\n", uc->rflow->id, ret); + if (IS_ENABLED(CONFIG_K3_DM_FW)) + udma_alloc_rchan_raw(uc); + return ret; } From 35bddf889652081f150f60740618851b5d4817f4 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 26 Aug 2024 15:55:11 +0530 Subject: [PATCH 07/11] arm: mach-k3: am62x: am625_init: Probe AM65 CPSW NUSS In order to support Ethernet boot on AM62x, probe AM65 CPSW NUSS driver in board_init_f(). Reviewed-by: Alexander Sverdlin Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- arch/arm/mach-k3/am62x/am625_init.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/mach-k3/am62x/am625_init.c b/arch/arm/mach-k3/am62x/am625_init.c index 72a752d38e8..595fc391ac5 100644 --- a/arch/arm/mach-k3/am62x/am625_init.c +++ b/arch/arm/mach-k3/am62x/am625_init.c @@ -282,6 +282,15 @@ void board_init_f(ulong dummy) } spl_enable_cache(); + if (IS_ENABLED(CONFIG_SPL_ETH) && IS_ENABLED(CONFIG_TI_AM65_CPSW_NUSS) && + spl_boot_device() == BOOT_DEVICE_ETHERNET) { + struct udevice *cpswdev; + + if (uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(am65_cpsw_nuss), + &cpswdev)) + printf("Failed to probe am65_cpsw_nuss driver\n"); + } + fixup_a53_cpu_freq_by_speed_grade(); } From b4e0d3a62dfd56e24673d39071d44387a3a07c2a Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 26 Aug 2024 15:55:12 +0530 Subject: [PATCH 08/11] configs: am62: Add configs for enabling ETHBOOT in R5SPL Add configs for enabling ETHBOOT in R5SPL. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Andreas Dannenberg Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- configs/am62x_evm_r5_ethboot_defconfig | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 configs/am62x_evm_r5_ethboot_defconfig diff --git a/configs/am62x_evm_r5_ethboot_defconfig b/configs/am62x_evm_r5_ethboot_defconfig new file mode 100644 index 00000000000..0d823743907 --- /dev/null +++ b/configs/am62x_evm_r5_ethboot_defconfig @@ -0,0 +1,25 @@ +#include + +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_SOC_K3_AM625=y +CONFIG_TARGET_AM625_R5_EVM=y +CONFIG_DEFAULT_DEVICEC_TREE="k3-am625-r5-sk" +CONFIG_SPL_GPIO=y +CONFIG_SPL_MMC=n +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 +CONFIG_SPL_BSS_MAX_SIZE=0X3100 +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_ETH=y +CONFIG_SPL_I2C=y +CONFIG_SPL_NET=y +CONFIG_SPL_NET_VCI_STRING="AM62X U-Boot R5 SPL" +CONFIG_CMD_DHCP=y +CONFIG_SPL_SYSCON=y +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y +CONFIG_DM_I2C=y +CONFIG_PHY_TI_DP83867=y +CONFIG_TI_AM65_CPSW_NUSS=y From 3b210e80691d6f0fe06a1ea7fc8c3c769cb0e940 Mon Sep 17 00:00:00 2001 From: Kishon Vijay Abraham I Date: Mon, 26 Aug 2024 15:55:13 +0530 Subject: [PATCH 09/11] configs: am62: Enable configs required for Ethboot Enable config options needed to support Ethernet boot on AM62x SK. Signed-off-by: Kishon Vijay Abraham I Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- configs/am62x_evm_a53_ethboot_defconfig | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) create mode 100644 configs/am62x_evm_a53_ethboot_defconfig diff --git a/configs/am62x_evm_a53_ethboot_defconfig b/configs/am62x_evm_a53_ethboot_defconfig new file mode 100644 index 00000000000..9d3c6b889f0 --- /dev/null +++ b/configs/am62x_evm_a53_ethboot_defconfig @@ -0,0 +1,17 @@ +#include + +CONFIG_ARM=y +CONFIG_ARCH_K3=y +CONFIG_SOC_K3_AM625=y +CONFIG_TARGET_AM625_A53_EVM=y +CONFIG_DEFAULT_DEVICE_TREE="ti/k3-am625-sk" +CONFIG_SPL_STACK_R_ADDR=0x83000000 +CONFIG_SPL_SIZE_LIMIT=0x80000 +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_DMA=y +CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_ETH=y +CONFIG_SPL_NET=y +CONFIG_SPL_NET_VCI_STRING="AM62X U-Boot A53 SPL" +CONFIG_SPL_SYSCON=y From bdf6900fd6cc9d5004667747d9841e31c0c72d62 Mon Sep 17 00:00:00 2001 From: Siddharth Vadapalli Date: Mon, 26 Aug 2024 15:55:14 +0530 Subject: [PATCH 10/11] arm: dts: k3-am625-r5-sk: Enable DM services for main_pktdma Enable DM services for main_pktdma during R5 SPL stage. Reviewed-by: Alexander Sverdlin Signed-off-by: Siddharth Vadapalli Signed-off-by: Chintan Vankar --- arch/arm/dts/k3-am625-r5-sk.dts | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/dts/k3-am625-r5-sk.dts b/arch/arm/dts/k3-am625-r5-sk.dts index 6b9f40e5558..0912b953db0 100644 --- a/arch/arm/dts/k3-am625-r5-sk.dts +++ b/arch/arm/dts/k3-am625-r5-sk.dts @@ -83,3 +83,8 @@ reg = <0x00 0x0fc40000 0x00 0x100>, <0x00 0x60000000 0x00 0x08000000>; }; + +&main_pktdma { + ti,sci = <&dm_tifs>; + bootph-all; +}; From d9de999ed5b1a1ea749f2e82ff6b3d7aa7e69b9d Mon Sep 17 00:00:00 2001 From: Chintan Vankar Date: Mon, 26 Aug 2024 15:55:15 +0530 Subject: [PATCH 11/11] arm64: dts: ti: k3-am62x-sk-common: Add bootph-all property in phy_gmii_sel node Add missing bootph-all property for CPSW MAC's PHY node phy_gmii_sel. Reviewed-by: Sumit Garg Signed-off-by: Chintan Vankar Link: https://lore.kernel.org/r/20240430085048.3143665-1-c-vankar@ti.com Signed-off-by: Vignesh Raghavendra [ upstream commit: ba50141137fae205a731005e70687f4a52289050 ] (cherry picked from commit 2bdd1743a9f6515efe7c3648a25d63b4a9ce4a10) Reviewed-by: Sumit Garg --- dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi b/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi index 3c45782ab2b..96378b19c41 100644 --- a/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi +++ b/dts/upstream/src/arm64/ti/k3-am62x-sk-common.dtsi @@ -128,6 +128,10 @@ }; }; +&phy_gmii_sel { + bootph-all; +}; + &main_pmx0 { /* First pad number is ALW package and second is AMC package */ main_uart0_pins_default: main-uart0-default-pins {