From 7ee1c4d1d125a1c76ff2d5d044f3844f74941cc4 Mon Sep 17 00:00:00 2001 From: Jim Liu Date: Tue, 20 Dec 2022 16:49:31 +0800 Subject: [PATCH 01/18] pinctrl: nuvoton: add NPCM7xx/NPCM8xx reset type detect add reset type detect and persist setting. Signed-off-by: Jim Liu --- arch/arm/include/asm/arch-npcm8xx/rst.h | 2 +- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 20 ++++++++++++++++++++ drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c | 22 +++++++++++++++++++++- 3 files changed, 42 insertions(+), 2 deletions(-) diff --git a/arch/arm/include/asm/arch-npcm8xx/rst.h b/arch/arm/include/asm/arch-npcm8xx/rst.h index 379e841fcae..09e14850639 100644 --- a/arch/arm/include/asm/arch-npcm8xx/rst.h +++ b/arch/arm/include/asm/arch-npcm8xx/rst.h @@ -16,7 +16,7 @@ #define SW1RST BIT(28) #define SW2RST BIT(27) #define SW3RST BIT(26) -#define SW4RST BIT(25) +#define TIPRST BIT(25) #define WD1RST BIT(24) #define WD2RST BIT(23) #define RST_STS_MASK GENMASK(31, 23) diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c index 31678f55379..1ad8bfbd880 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c @@ -47,6 +47,10 @@ #define WD0RST BIT(29) #define WD1RST BIT(24) #define WD2RST BIT(23) +#define SWRST1 BIT(28) +#define SWRST2 BIT(27) +#define SWRST3 BIT(26) +#define SW4RST BIT(25) #define GPIOX_MODULE_RESET 16 #define CA9C_RESET BIT(0) @@ -1374,6 +1378,14 @@ static bool is_gpio_persist(struct udevice *dev, u8 bank) regmap_read(priv->rst_regmap, NPCM7XX_RST_WD1RCR, &tmp); else if (value & WD2RST) regmap_read(priv->rst_regmap, NPCM7XX_RST_WD2RCR, &tmp); + else if (value & SWRST1) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC1, &tmp); + else if (value & SWRST2) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC2, &tmp); + else if (value & SWRST3) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC3, &tmp); + else if (value & SW4RST) + regmap_read(priv->rst_regmap, NPCM7XX_RST_SWRSTC4, &tmp); else return false; @@ -1392,11 +1404,19 @@ static int npcm7xx_gpio_reset_persist(struct udevice *dev, unsigned int banknum, regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num), 0); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num), 0); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC1, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC2, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC3, BIT(num), 0); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC4, BIT(num), 0); } else { regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC1, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC2, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC3, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); + regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_SWRSTC4, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET); } return 0; diff --git a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c index c6ffa89f77a..0ec47e9577e 100644 --- a/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c +++ b/drivers/pinctrl/nuvoton/pinctrl-npcm8xx.c @@ -20,7 +20,7 @@ #define SWRSTC1 0x44 #define SWRSTC2 0x48 #define SWRSTC3 0x4c -#define SWRSTC4 0x50 +#define TIPRSTC 0x50 #define CORSTC 0x5c #define FLOCKR1 0x74 #define INTCR4 0xc0 @@ -772,6 +772,10 @@ static int npcm8xx_gpio_reset_persist(struct udevice *dev, uint bank, regmap_update_bits(priv->rst_regmap, WD1RCR, BIT(offset), 0); regmap_update_bits(priv->rst_regmap, WD2RCR, BIT(offset), 0); regmap_update_bits(priv->rst_regmap, CORSTC, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, SWRSTC1, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, SWRSTC2, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, SWRSTC3, BIT(offset), 0); + regmap_update_bits(priv->rst_regmap, TIPRSTC, BIT(offset), 0); } else { regmap_update_bits(priv->rst_regmap, WD0RCR, BIT(offset), BIT(offset)); @@ -781,6 +785,14 @@ static int npcm8xx_gpio_reset_persist(struct udevice *dev, uint bank, BIT(offset)); regmap_update_bits(priv->rst_regmap, CORSTC, BIT(offset), BIT(offset)); + regmap_update_bits(priv->rst_regmap, SWRSTC1, BIT(offset), + BIT(offset)); + regmap_update_bits(priv->rst_regmap, SWRSTC2, BIT(offset), + BIT(offset)); + regmap_update_bits(priv->rst_regmap, SWRSTC3, BIT(offset), + BIT(offset)); + regmap_update_bits(priv->rst_regmap, TIPRSTC, BIT(offset), + BIT(offset)); } return 0; @@ -804,6 +816,14 @@ static bool is_gpio_persist(struct udevice *dev, uint bank) regmap_read(priv->rst_regmap, WD1RCR, &val); else if (status & WD2RST) regmap_read(priv->rst_regmap, WD2RCR, &val); + else if (status & SW1RST) + regmap_read(priv->rst_regmap, SWRSTC1, &val); + else if (status & SW2RST) + regmap_read(priv->rst_regmap, SWRSTC2, &val); + else if (status & SW3RST) + regmap_read(priv->rst_regmap, SWRSTC3, &val); + else if (status & TIPRST) + regmap_read(priv->rst_regmap, TIPRSTC, &val); else return false; From a8ddc37ec315c8782de3630e0fe3fb8bcc0301c0 Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Tue, 20 Dec 2022 16:21:43 +0100 Subject: [PATCH 02/18] configs: am62x_evm_*: Correct SPI configuration option In f422c4bec the configuration option to support s28hs512t SPI flashes was changed from CONFIG_SPI_FLASH_S28HS512T to CONFIG_SPI_FLASH_S28HX_T to support the wider family. Follow this change in the AM62x EVM configurations. Signed-off-by: Sjoerd Simons Reviewed-by: Dhruva Gole --- configs/am62x_evm_a53_defconfig | 2 +- configs/am62x_evm_r5_defconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index e6ffd166927..94de1ea4586 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -71,7 +71,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index f95bc5f2221..40f933ca749 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -110,7 +110,7 @@ CONFIG_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HS512T=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y CONFIG_SOC_TI=y From 21d39eb5a5be15fe49e23e49a76da7531958295d Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Tue, 20 Dec 2022 16:21:44 +0100 Subject: [PATCH 03/18] configs: am62x_evm_*: Run savedefconfig Clean configuration for am62x_evm using savedefconfig Signed-off-by: Sjoerd Simons Tested-by: Dhruva Gole --- configs/am62x_evm_a53_defconfig | 4 ++-- configs/am62x_evm_r5_defconfig | 32 +++++++++++++++----------------- 2 files changed, 17 insertions(+), 19 deletions(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 94de1ea4586..cd06e362f09 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_K3_ATF_LOAD_ADDR=0x9e780000 CONFIG_TARGET_AM625_A53_EVM=y +CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SPL_MMC=y @@ -14,6 +15,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -32,12 +34,10 @@ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1400 CONFIG_SPL_FS_LOAD_PAYLOAD_NAME="u-boot.img" CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_DM_SPI=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_POWER_DOMAIN=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000 CONFIG_SPL_YMODEM_SUPPORT=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 40f933ca749..7350882a36f 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -7,6 +7,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_TARGET_AM625_R5_EVM=y +CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" @@ -18,10 +19,8 @@ CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_SPL_SPI=y CONFIG_SPL_SPI_FLASH_SUPPORT=y -CONFIG_SPL_SPI_SUPPORT=y -CONFIG_SF_DEFAULT_SPEED=25000000 +CONFIG_SPL_SPI=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000ffff CONFIG_SPL_LOAD_FIT=y @@ -42,10 +41,9 @@ CONFIG_SYS_SPL_MALLOC_SIZE=0x1000000 CONFIG_SPL_EARLY_BSS=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x400 -CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_DM_MAILBOX=y -CONFIG_SPL_DM_RESET=y CONFIG_SPL_DM_SPI_FLASH=y +CONFIG_SPL_DM_RESET=y CONFIG_SPL_POWER_DOMAIN=y CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y @@ -53,6 +51,7 @@ CONFIG_SPL_REMOTEPROC=y # CONFIG_SPL_SPI_FLASH_TINY is not set CONFIG_SPL_SPI_FLASH_SFDP_SUPPORT=y CONFIG_SPL_SPI_LOAD=y +CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_HUSH_PARSER=y CONFIG_CMD_ASKENV=y @@ -88,6 +87,14 @@ CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ADMA=y CONFIG_SPL_MMC_SDHCI_ADMA=y CONFIG_MMC_SDHCI_AM654=y +CONFIG_DM_SPI_FLASH=y +CONFIG_SF_DEFAULT_MODE=0 +CONFIG_SF_DEFAULT_SPEED=25000000 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y +CONFIG_SPI_FLASH_SOFT_RESET=y +CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y +CONFIG_SPI_FLASH_SPANSION=y +CONFIG_SPI_FLASH_S28HX_T=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set CONFIG_SPL_PINCTRL=y @@ -101,23 +108,14 @@ CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y -CONFIG_DM_SPI=y -CONFIG_CADENCE_QSPI=y -CONFIG_DM_SPI_FLASH=y -CONFIG_SF_DEFAULT_MODE=0 -CONFIG_SPI=y -CONFIG_SPI_FLASH_SFDP_SUPPORT=y -CONFIG_SPI_FLASH_SOFT_RESET=y -CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y -CONFIG_SPI_FLASH_SPANSION=y -CONFIG_SPI_FLASH_S28HX_T=y CONFIG_SOC_DEVICE=y CONFIG_SOC_DEVICE_TI_K3=y CONFIG_SOC_TI=y +CONFIG_SPI=y +CONFIG_DM_SPI=y +CONFIG_CADENCE_QSPI=y CONFIG_TIMER=y CONFIG_SPL_TIMER=y CONFIG_OMAP_TIMER=y CONFIG_LIB_RATIONAL=y CONFIG_SPL_LIB_RATIONAL=y -CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 From 39248d326046989f646218388e84d68ce4c50c20 Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Tue, 20 Dec 2022 16:21:45 +0100 Subject: [PATCH 04/18] arm: dts: k3-am625-sk: Enable first ethernet port The K3 am625 sk EVM has two ethernet ports; Enable the first one for usage in u-boot. Signed-off-by: Sjoerd Simons --- arch/arm/dts/k3-am625-sk-u-boot.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/arch/arm/dts/k3-am625-sk-u-boot.dtsi b/arch/arm/dts/k3-am625-sk-u-boot.dtsi index 92788bae3e0..f275e3b46ca 100644 --- a/arch/arm/dts/k3-am625-sk-u-boot.dtsi +++ b/arch/arm/dts/k3-am625-sk-u-boot.dtsi @@ -126,3 +126,25 @@ }; }; }; + +&cpsw3g { + reg = <0x0 0x8000000 0x0 0x200000>, + <0x0 0x43000200 0x0 0x8>; + reg-names = "cpsw_nuss", "mac_efuse"; + /delete-property/ ranges; + u-boot,dm-spl; + + cpsw-phy-sel@04044 { + compatible = "ti,am64-phy-gmii-sel"; + reg = <0x0 0x00104044 0x0 0x8>; + u-boot,dm-spl; + }; +}; + +&cpsw_port1 { + u-boot,dm-spl; +}; + +&cpsw_port2 { + status = "disabled"; +}; From 92a15f69d5f4dea7f2885c8e06436e50f79710cf Mon Sep 17 00:00:00 2001 From: Sjoerd Simons Date: Tue, 20 Dec 2022 16:21:46 +0100 Subject: [PATCH 05/18] configs: am62x_evm_a53: Enable ethernet Enable ethernet support for u-boot on am62x evm Signed-off-by: Sjoerd Simons --- configs/am62x_evm_a53_defconfig | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index cd06e362f09..ab77135e257 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -57,6 +57,8 @@ CONFIG_SPL_OF_TRANSLATE=y CONFIG_CLK=y CONFIG_SPL_CLK=y CONFIG_CLK_TI_SCI=y +CONFIG_DMA_CHANNELS=y +CONFIG_TI_K3_NAVSS_UDMA=y CONFIG_TI_SCI_PROTOCOL=y CONFIG_DM_MAILBOX=y CONFIG_K3_SEC_PROXY=y @@ -72,6 +74,10 @@ CONFIG_SPI_FLASH_SOFT_RESET=y CONFIG_SPI_FLASH_SOFT_RESET_ON_BOOT=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_S28HX_T=y +CONFIG_PHY_TI_DP83867=y +CONFIG_PHY_FIXED=y +CONFIG_TI_AM65_CPSW_NUSS=y +CONFIG_PHY=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_SINGLE=y From 7c34b71a42817173f3bccf8a85e8a234cc456c8f Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Tue, 20 Dec 2022 18:38:18 +0000 Subject: [PATCH 06/18] arm64:mach-k3 am625_init: Correct boot mode detection The boot mode detection assumes that BOOT_DEVICE_MMC2 should always result in MMCSD_MODE_FS, but MMCSD_MODE_RAW is also a valid option for this port. The current logic also avoids looking at the bootmode pin strapping, which should be the primary means of determining whether a device is being booted in MMCSD_MODE_EMMCBOOT mode. Switch around the logic to check the boot mode to determine whether the eMMC boot mode is expected or MMC/SD boot mode. From there we can look at the boot mode config if in MMC/SD boot mode to determine whether to attempt RAW or FS based booting. This change allows U-Boot to also be successfully booted from RAW offsets in addition to from a filesystem. Signed-off-by: Martyn Welch --- arch/arm/mach-k3/am625_init.c | 19 +++++++++---------- 1 file changed, 9 insertions(+), 10 deletions(-) diff --git a/arch/arm/mach-k3/am625_init.c b/arch/arm/mach-k3/am625_init.c index da2229d0bff..a91c15ca4e1 100644 --- a/arch/arm/mach-k3/am625_init.c +++ b/arch/arm/mach-k3/am625_init.c @@ -173,21 +173,20 @@ void board_init_f(ulong dummy) u32 spl_mmc_boot_mode(struct mmc *mmc, const u32 boot_device) { u32 devstat = readl(CTRLMMR_MAIN_DEVSTAT); + u32 bootmode = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_MASK) >> + MAIN_DEVSTAT_PRIMARY_BOOTMODE_SHIFT; u32 bootmode_cfg = (devstat & MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_MASK) >> MAIN_DEVSTAT_PRIMARY_BOOTMODE_CFG_SHIFT; - switch (boot_device) { - case BOOT_DEVICE_MMC1: - if ((bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK) >> - MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_SHIFT) - return MMCSD_MODE_EMMCBOOT; - return MMCSD_MODE_FS; - - case BOOT_DEVICE_MMC2: - return MMCSD_MODE_FS; + switch (bootmode) { + case BOOT_DEVICE_EMMC: + return MMCSD_MODE_EMMCBOOT; + case BOOT_DEVICE_MMC: + if (bootmode_cfg & MAIN_DEVSTAT_PRIMARY_MMC_FS_RAW_MASK) + return MMCSD_MODE_RAW; default: - return MMCSD_MODE_RAW; + return MMCSD_MODE_FS; } } From 83f5195e328bf7dd3b0ad224a3437bd281788d13 Mon Sep 17 00:00:00 2001 From: Martyn Welch Date: Tue, 20 Dec 2022 18:38:19 +0000 Subject: [PATCH 07/18] configs: Enable distroboot on am625 TI boards use a custom (though faily common to TI boards) mechanism for booting Linux. We would like to use the "distroboot" approach. Enable distroboot as a further option to use for booting on am625 should the existing options fail. Signed-off-by: Martyn Welch --- configs/am62x_evm_a53_defconfig | 2 +- include/configs/am62x_evm.h | 26 +++++++++++++++++++++++++- 2 files changed, 26 insertions(+), 2 deletions(-) diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index ab77135e257..273db2edbfb 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -23,7 +23,7 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" +CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern; setenv fdtfile ti/${name_fdt}; run distro_bootcmd" CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80a00000 diff --git a/include/configs/am62x_evm.h b/include/configs/am62x_evm.h index 809d89119c4..7fbefdece40 100644 --- a/include/configs/am62x_evm.h +++ b/include/configs/am62x_evm.h @@ -15,6 +15,29 @@ /* DDR Configuration */ #define CFG_SYS_SDRAM_BASE1 0x880000000 +#ifdef CONFIG_CMD_MMC +#define DISTRO_BOOT_DEV_MMC(func) func(MMC, mmc, 0) func(MMC, mmc, 1) +#else +#define DISTRO_BOOT_DEV_MMC(func) +#endif + +#ifdef CONFIG_CMD_PXE +#define DISTRO_BOOT_DEV_PXE(func) func(PXE, pxe, na) +#else +#define DISTRO_BOOT_DEV_PXE(func) +#endif + +#ifdef CONFIG_CMD_DHCP +#define DISTRO_BOOT_DEV_DHCP(func) func(DHCP, dhcp, na) +#else +#define DISTRO_BOOT_DEV_DHCP(func) +#endif + +#define BOOT_TARGET_DEVICES(func) \ + DISTRO_BOOT_DEV_MMC(func) \ + DISTRO_BOOT_DEV_PXE(func) \ + DISTRO_BOOT_DEV_DHCP(func) + #define PARTS_DEFAULT \ /* Linux partitions */ \ "name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0" @@ -59,7 +82,8 @@ DEFAULT_LINUX_BOOT_ENV \ DEFAULT_MMC_TI_ARGS \ EXTRA_ENV_AM625_BOARD_SETTINGS \ - EXTRA_ENV_AM625_BOARD_SETTINGS_MMC + EXTRA_ENV_AM625_BOARD_SETTINGS_MMC \ + BOOTENV /* Now for the remaining common defines */ #include From d12561211d4cfcd5e141c1c07e2e53e34a103553 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Fri, 23 Dec 2022 19:15:21 -0600 Subject: [PATCH 08/18] configs: restrict am62ax wakup SPL size In its current form, the am62a's wakeup SPL is fairly small, however this will not remain as more boot modes are eventually added. To protect us from overflowing our ~256k of HSM SRAM, add limits and check during the wakeup SPL build. Signed-off-by: Bryan Brattlof --- configs/am62ax_evm_r5_defconfig | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig index 59d5f4f80eb..bfffb8eef77 100644 --- a/configs/am62ax_evm_r5_defconfig +++ b/configs/am62ax_evm_r5_defconfig @@ -13,7 +13,9 @@ CONFIG_SPL_TEXT_BASE=0x43c00000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_SPL_SIZE_LIMIT=0x40000 +CONFIG_SPL_SYS_MALLOC_F_LEN=0x7145 +CONFIG_SPL_SIZE_LIMIT=0x3A7F0 +CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y @@ -22,11 +24,14 @@ CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y # CONFIG_DISPLAY_CPUINFO is not set -CONFIG_SPL_MAX_SIZE=0x58000 +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y +CONFIG_SPL_SIZE_LIMIT_SUBTRACT_MALLOC=y +CONFIG_SPL_MAX_SIZE=0x3B000 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x43c37800 -CONFIG_SPL_BSS_MAX_SIZE=0x5000 +CONFIG_SPL_BSS_START_ADDR=0x43c3b000 +CONFIG_SPL_BSS_MAX_SIZE=0x3000 +CONFIG_SPL_SYS_REPORT_STACK_F_USAGE=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y CONFIG_SPL_STACK_R=y CONFIG_SPL_SEPARATE_BSS=y From 940b7128c9d14225b1ce05c586b2023fcbb50454 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Fri, 23 Dec 2022 19:15:22 -0600 Subject: [PATCH 09/18] configs: am62a: move stack and heap to HSM RAM Texas Instruments has begun enabling security setting on the SoCs they produce to instruct ROM and TIFS to begin protecting the Security Management Subsystem (SMS) from other binaries we load into the chip by default. One way ROM does this is by enabling firewalls to protect the OCSRAM region it's using during bootup. Only after TIFS has started (and had time to disable the OCSRAM firewall region) will we have write access to the region. This means we will need to move the stack & heap from OCSRAM to HSM RAM and reduce the size of BSS and the SPL to allow it to fit properly. Signed-off-by: Bryan Brattlof --- configs/am62ax_evm_r5_defconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig index bfffb8eef77..0e48f0afa20 100644 --- a/configs/am62ax_evm_r5_defconfig +++ b/configs/am62ax_evm_r5_defconfig @@ -19,7 +19,7 @@ CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000ffff +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y From b672e8581070497c1859910ce0def6eaf4a49860 Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Fri, 23 Dec 2022 19:15:23 -0600 Subject: [PATCH 10/18] arm: mach-k3: copy bootindex to OCRAM for main domain SPL Texas Instruments has begun enabling security settings on the SoCs it produces to instruct ROM and TIFS to begin protecting the Security Management Subsystem (SMS) from other binaries we load into the chip by default. One way ROM and TIFS do this is by enabling firewalls to protect the OCSRAM and HSM RAM regions they're using during bootup. The HSM RAM the wakeup SPL is in is firewalled by TIFS to protect itself from the main domain applications. This means the 'bootindex' value in HSM RAM, left by ROM to indicate if we're using the primary or secondary boot-method, must be moved to OCSRAM (that TIFS has open for us) before we make the jump to the main domain so the main domain's bootloaders can keep access to this information. Signed-off-by: Bryan Brattlof --- arch/arm/mach-k3/Kconfig | 4 +++- arch/arm/mach-k3/am62a7_init.c | 16 ++++++++++++++-- arch/arm/mach-k3/include/mach/am62a_hardware.h | 17 ++++++++++++++++- 3 files changed, 33 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-k3/Kconfig b/arch/arm/mach-k3/Kconfig index 87da6b49ee6..a8c3a593d57 100644 --- a/arch/arm/mach-k3/Kconfig +++ b/arch/arm/mach-k3/Kconfig @@ -69,7 +69,9 @@ config SYS_K3_BOOT_PARAM_TABLE_INDEX default 0x41cffbfc if SOC_K3_J721E default 0x41cfdbfc if SOC_K3_J721S2 default 0x701bebfc if SOC_K3_AM642 - default 0x43c3f290 if SOC_K3_AM625 || SOC_K3_AM62A7 + default 0x43c3f290 if SOC_K3_AM625 + default 0x43c3f290 if SOC_K3_AM62A7 && CPU_V7R + default 0x7000f290 if SOC_K3_AM62A7 && ARM64 help Address at which ROM stores the value which determines if SPL is booted up by primary boot media or secondary boot media. diff --git a/arch/arm/mach-k3/am62a7_init.c b/arch/arm/mach-k3/am62a7_init.c index e9569f0d264..02da24a3d6f 100644 --- a/arch/arm/mach-k3/am62a7_init.c +++ b/arch/arm/mach-k3/am62a7_init.c @@ -25,8 +25,11 @@ static struct rom_extended_boot_data bootdata __section(".data"); static void store_boot_info_from_rom(void) { bootindex = *(u32 *)(CONFIG_SYS_K3_BOOT_PARAM_TABLE_INDEX); - memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO, - sizeof(struct rom_extended_boot_data)); + + if (IS_ENABLED(CONFIG_CPU_V7R)) { + memcpy(&bootdata, (uintptr_t *)ROM_ENTENDED_BOOT_DATA_INFO, + sizeof(struct rom_extended_boot_data)); + } } static void ctrl_mmr_unlock(void) @@ -123,6 +126,15 @@ void board_init_f(ulong dummy) k3_sysfw_loader(true, NULL, NULL); #endif +#if defined(CONFIG_CPU_V7R) + /* + * Relocate boot information to OCRAM (after TIFS has opend this + * region for us) so the next bootloader stages can keep access to + * primary vs backup bootmodes. + */ + writel(bootindex, K3_BOOT_PARAM_TABLE_INDEX_OCRAM); +#endif + /* * Force probe of clk_k3 driver here to ensure basic default clock * configuration is always done. diff --git a/arch/arm/mach-k3/include/mach/am62a_hardware.h b/arch/arm/mach-k3/include/mach/am62a_hardware.h index 52b0d9b3cb9..13bf50f147b 100644 --- a/arch/arm/mach-k3/include/mach/am62a_hardware.h +++ b/arch/arm/mach-k3/include/mach/am62a_hardware.h @@ -68,7 +68,22 @@ #define ROM_ENTENDED_BOOT_DATA_INFO 0x43c3f1e0 -/* Use Last 2K as Scratch pad */ +#define K3_BOOT_PARAM_TABLE_INDEX_OCRAM 0x7000F290 + +/* + * During the boot process ROM will kill anything that writes to OCSRAM. + * This means the wakeup SPL cannot use this region during boot. To + * complicate things, TIFS will set a firewall between HSM RAM and the + * main domain. + * + * So, during the wakeup SPL, we will need to store the EEPROM data + * somewhere in HSM RAM, and the main domain's SPL will need to store it + * somewhere in OCSRAM + */ +#ifdef CONFIG_CPU_V7R +#define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x43c30000 +#else #define TI_SRAM_SCRATCH_BOARD_EEPROM_START 0x70000001 +#endif /* CONFIG_CPU_V7R */ #endif /* __ASM_ARCH_AM62A_HARDWARE_H */ From e625bfe5ad95ace782ed998f4c2b85b20d1923ad Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Fri, 23 Dec 2022 19:15:24 -0600 Subject: [PATCH 11/18] configs: am62a: convert bootcmd to distro_bootcmd We're currently using CONFIG_BOOTCOMMAND to run custom boot scripts to jump into linux. While this works, let's begin the transition to more distribution friendly jumps to linux by enabling distro_bootcmd. Convert the custom bootcmd to a distro_bootcmd Signed-off-by: Judith Mendez Signed-off-by: Bryan Brattlof --- configs/am62ax_evm_a53_defconfig | 1 - include/configs/am62ax_evm.h | 29 ++++++++++++++++++++++++++--- 2 files changed, 26 insertions(+), 4 deletions(-) diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 0c2cf945c62..6e97fd4060e 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -20,7 +20,6 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_SPL_MAX_SIZE=0x58000 CONFIG_SPL_PAD_TO=0x0 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h index 1bd900df7a9..ba67c98693b 100644 --- a/include/configs/am62ax_evm.h +++ b/include/configs/am62ax_evm.h @@ -9,7 +9,6 @@ #define __CONFIG_AM62AX_EVM_H #include -#include #include #include @@ -55,12 +54,36 @@ "${bootdir}/${name_fit}\0" \ "partitions=" PARTS_DEFAULT +#define BOOTENV_DEV_TI_MMC(devtypeu, devtypel, instance) \ + DEFAULT_MMC_TI_ARGS \ + EXTRA_ENV_AM62A7_BOARD_SETTINGS_MMC \ + "bootcmd_ti_mmc=" \ + "run findfdt; run envboot; run init_mmc;" \ + "run get_kern_mmc; run get_fdt_mmc;" \ + "run get_overlay_mmc;" \ + "run run_kern;\0" + +#define BOOTENV_DEV_NAME_TI_MMC(devtyeu, devtypel, instance) \ + "ti_mmc " + +#if CONFIG_IS_ENABLED(CMD_MMC) + #define BOOT_TARGET_MMC(func) \ + func(TI_MMC, ti_mmc, na) +#else + #define BOOT_TARGET_MMC(func) +#endif /* CONFIG_IS_ENABLED(CMD_MMC) */ + +#define BOOT_TARGET_DEVICES(func) \ + BOOT_TARGET_MMC(func) + +#include + /* Incorporate settings into the U-Boot environment */ #define CFG_EXTRA_ENV_SETTINGS \ DEFAULT_LINUX_BOOT_ENV \ - DEFAULT_MMC_TI_ARGS \ + DEFAULT_FIT_TI_ARGS \ EXTRA_ENV_AM62A7_BOARD_SETTINGS \ - EXTRA_ENV_AM62A7_BOARD_SETTINGS_MMC \ + BOOTENV /* Now for the remaining common defines */ #include From 221ae89bc8606d79c01a51acc30772e5892acc3d Mon Sep 17 00:00:00 2001 From: Bryan Brattlof Date: Fri, 23 Dec 2022 19:15:25 -0600 Subject: [PATCH 12/18] configs: am62a: use kernel fitImage when using secure bootflow In order to maintain the chain of trust, each stage of the boot process will first authenticate each binary it loads before continuing. To extend this to the kernal and its dtbs we can package the kernal and its dtbs into another fitImage for Uboot to authenticate and extend the chain of trust all the way to the kernel. When 'boot_fit' is set, indicating we're using the secure bootflow, look for and authenticate the kernel's fitImage. Signed-off-by: Judith Mendez Signed-off-by: Bryan Brattlof --- include/configs/am62ax_evm.h | 11 ++++++++--- 1 file changed, 8 insertions(+), 3 deletions(-) diff --git a/include/configs/am62ax_evm.h b/include/configs/am62ax_evm.h index ba67c98693b..cdd639b9309 100644 --- a/include/configs/am62ax_evm.h +++ b/include/configs/am62ax_evm.h @@ -59,9 +59,14 @@ EXTRA_ENV_AM62A7_BOARD_SETTINGS_MMC \ "bootcmd_ti_mmc=" \ "run findfdt; run envboot; run init_mmc;" \ - "run get_kern_mmc; run get_fdt_mmc;" \ - "run get_overlay_mmc;" \ - "run run_kern;\0" + "if test ${boot_fit} -eq 1; then;" \ + "run get_fit_mmc; run get_overlaystring;" \ + "run run_fit;" \ + "else;" \ + "run get_kern_mmc; run get_fdt_mmc;" \ + "run get_overlay_mmc;" \ + "run run_kern;" \ + "fi;\0" #define BOOTENV_DEV_NAME_TI_MMC(devtyeu, devtypel, instance) \ "ti_mmc " From 40c69cc922c7874301bbb543508e5f591f4e30d4 Mon Sep 17 00:00:00 2001 From: Dzmitry Sankouski Date: Tue, 27 Dec 2022 22:47:08 +0300 Subject: [PATCH 13/18] board: starqltechn: enable serial console It was temporary disabled due to problem with boot. Issue was fixed in commit f5ed6c9ccf3e ("uart: sdm845: Fix debug UART pinmux") Signed-off-by: Dzmitry Sankouski --- configs/starqltechn_defconfig | 4 ++-- include/configs/sdm845.h | 5 +++-- 2 files changed, 5 insertions(+), 4 deletions(-) diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index 7955076d613..7a64f2a7a08 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -20,14 +20,14 @@ CONFIG_SYS_PBSIZE=532 CONFIG_CMD_GPIO=y CONFIG_CMD_BMP=y # CONFIG_NET is not set -# CONFIG_DM_STDIO is not set CONFIG_CLK=y CONFIG_MSM_GPIO=y CONFIG_QCOM_PMIC_GPIO=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_QCOM=y -# CONFIG_REQUIRE_SERIAL_CONSOLE is not set +CONFIG_REQUIRE_SERIAL_CONSOLE=y +CONFIG_MSM_GENI_SERIAL=y CONFIG_SPMI_MSM=y CONFIG_VIDEO=y CONFIG_SYS_WHITE_ON_BLACK=y diff --git a/include/configs/sdm845.h b/include/configs/sdm845.h index 9a4fe530a20..2211751b540 100644 --- a/include/configs/sdm845.h +++ b/include/configs/sdm845.h @@ -16,8 +16,9 @@ #define CFG_EXTRA_ENV_SETTINGS \ "bootm_size=0x4000000\0" \ "bootm_low=0x80000000\0" \ - "stdout=vidconsole\0" \ - "stderr=vidconsole\0" \ + "stdin=serial\0" \ + "stdout=serial,vidconsole\0" \ + "stderr=serial,vidconsole\0" \ "preboot=source $prevbl_initrd_start_addr:prebootscript\0" \ "bootcmd=source $prevbl_initrd_start_addr:bootscript\0" From 971ccee2fb74a5dad282e230d60de84e1fb6e6dd Mon Sep 17 00:00:00 2001 From: Dzmitry Sankouski Date: Tue, 27 Dec 2022 22:47:09 +0300 Subject: [PATCH 14/18] SoC: sdm845: find and save KASLR to env variables KASLR address is needed to boot fully functional Android. KASLR is set by primary bootloader, and since u-boot is used as a secondary bootloader(replacing kernel) on sdm845 platform, KASLR may be found by comparing memory chunks at relocaddr over supposed KASLR range. Signed-off-by: Dzmitry Sankouski Reviewed-by: Ramon Fried --- arch/arm/mach-snapdragon/init_sdm845.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/mach-snapdragon/init_sdm845.c b/arch/arm/mach-snapdragon/init_sdm845.c index 5f53c219471..1f885023943 100644 --- a/arch/arm/mach-snapdragon/init_sdm845.c +++ b/arch/arm/mach-snapdragon/init_sdm845.c @@ -78,5 +78,23 @@ __weak int misc_init_r(void) env_set("key_power", "0"); } + /* + * search for kaslr address, set by primary bootloader by searching first + * 0x100 relocated bytes at u-boot's initial load address range + */ + uintptr_t start = gd->ram_base; + uintptr_t end = start + 0x800000; + u8 *addr = (u8 *)start; + phys_addr_t *relocaddr = (phys_addr_t *)gd->relocaddr; + u32 block_size = 0x1000; + + while (memcmp(addr, relocaddr, 0x100) && (uintptr_t)addr < end) + addr += block_size; + + if ((uintptr_t)addr >= end) + printf("KASLR not found in range 0x%lx - 0x%lx", start, end); + else + env_set_addr("KASLR", addr); + return 0; } From f0b1a1e13e17fe1f1d9d15e256cd89ac2c17c289 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 29 Dec 2022 02:39:19 +0100 Subject: [PATCH 15/18] arm: mvebu: Fix default CONFIG_BUILD_TARGET MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit u-boot-with-spl.kwb is built only for SPL enabled 32-bit armada boards. u-boot.kwb is built for 32-bit armada and kirkwood boards but only for non-SPL targets. So replace CONFIG_ARCH_MVEBU by CONFIG_ARMADA_32BIT (it implies CONFIG_ARCH_MVEBU) for u-boot-with-spl.kwb. And add additional CONFIG_ARMADA_32BIT && !CONFIG_SPL for u-boot.kwb. Signed-off-by: Pali Rohár --- Kconfig | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Kconfig b/Kconfig index d29519c18bd..b5111cdb087 100644 --- a/Kconfig +++ b/Kconfig @@ -456,11 +456,11 @@ config BUILD_TARGET string "Build target special images" default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_ARRIA10 default "u-boot-with-spl.sfp" if TARGET_SOCFPGA_GEN5 - default "u-boot-with-spl.kwb" if ARCH_MVEBU && SPL + default "u-boot-with-spl.kwb" if ARMADA_32BIT && SPL default "u-boot-elf.srec" if RCAR_GEN3 default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ ARCH_SUNXI || RISCV || ARCH_ZYNQMP) - default "u-boot.kwb" if ARCH_KIRKWOOD + default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT default "u-boot-with-spl.imx" if ARCH_MX6 && SPL help From e0025d995788b8d5bdd079659a7d6cd60858442f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 29 Dec 2022 02:39:20 +0100 Subject: [PATCH 16/18] powerpc/mpc85xx: Set default CONFIG_BUILD_TARGET MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Final U-Boot binary for mpc85xx boards which use SPL and are not PBL-based based is u-boot-with-spl.bin. PBL is not used only on boards with e500v1 and e500v2 cores. Apparently CONFIG_E500 is set not only for e500 cores, but also for all other mpc85xx cores e500mc, e5500 and e5600. So do not use CONFIG_E500 and instead filter new cores with PBL based bootrom. Signed-off-by: Pali Rohár --- Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/Kconfig b/Kconfig index b5111cdb087..a75cce7e28f 100644 --- a/Kconfig +++ b/Kconfig @@ -461,6 +461,7 @@ config BUILD_TARGET default "u-boot.itb" if !BINMAN && SPL_LOAD_FIT && (ARCH_ROCKCHIP || \ ARCH_SUNXI || RISCV || ARCH_ZYNQMP) default "u-boot.kwb" if (ARCH_KIRKWOOD || ARMADA_32BIT) && !SPL + default "u-boot-with-spl.bin" if MPC85xx && !E500MC && !E5500 && !E6500 && SPL default "u-boot-with-spl.bin" if ARCH_AT91 && SPL_NAND_SUPPORT default "u-boot-with-spl.imx" if ARCH_MX6 && SPL help From f7f14cf027e93893e7757423c6fe99934c039e8f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Pali=20Roh=C3=A1r?= Date: Thu, 29 Dec 2022 02:39:21 +0100 Subject: [PATCH 17/18] powerpc/mpc85xx: Unset CONFIG_SPL_TARGET="u-boot-with-spl.bin" MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit CONFIG_SPL_TARGET should specify additional SPL make target. But u-boot-with-spl.bin is final U-Boot binary, not SPL binary in some custom format. Moreover u-boot-with-spl.bin is already set in CONFIG_BUILD_TARGET, so make will build it by default. Signed-off-by: Pali Rohár --- configs/P1010RDB-PA_36BIT_NAND_defconfig | 1 - configs/P1010RDB-PA_36BIT_SDCARD_defconfig | 1 - configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig | 1 - configs/P1010RDB-PA_NAND_defconfig | 1 - configs/P1010RDB-PA_SDCARD_defconfig | 1 - configs/P1010RDB-PA_SPIFLASH_defconfig | 1 - configs/P1010RDB-PB_36BIT_NAND_defconfig | 1 - configs/P1010RDB-PB_36BIT_SDCARD_defconfig | 1 - configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig | 1 - configs/P1010RDB-PB_NAND_defconfig | 1 - configs/P1010RDB-PB_SDCARD_defconfig | 1 - configs/P1010RDB-PB_SPIFLASH_defconfig | 1 - configs/P1020RDB-PC_36BIT_NAND_defconfig | 1 - configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 1 - configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig | 1 - configs/P1020RDB-PC_NAND_defconfig | 1 - configs/P1020RDB-PC_SDCARD_defconfig | 1 - configs/P1020RDB-PC_SPIFLASH_defconfig | 1 - configs/P1020RDB-PD_NAND_defconfig | 1 - configs/P1020RDB-PD_SDCARD_defconfig | 1 - configs/P1020RDB-PD_SPIFLASH_defconfig | 1 - configs/P2020RDB-PC_36BIT_NAND_defconfig | 1 - configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 1 - configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig | 1 - configs/P2020RDB-PC_NAND_defconfig | 1 - configs/P2020RDB-PC_SDCARD_defconfig | 1 - configs/P2020RDB-PC_SPIFLASH_defconfig | 1 - 27 files changed, 27 deletions(-) diff --git a/configs/P1010RDB-PA_36BIT_NAND_defconfig b/configs/P1010RDB-PA_36BIT_NAND_defconfig index c12948ae7c8..e0ffb164b5a 100644 --- a/configs/P1010RDB-PA_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PA_36BIT_NAND_defconfig @@ -51,7 +51,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig index e3b786d4efd..0df2a559594 100644 --- a/configs/P1010RDB-PA_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PA_36BIT_SDCARD_defconfig @@ -48,7 +48,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig index e6ce59e2971..086bfcb10e5 100644 --- a/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_36BIT_SPIFLASH_defconfig @@ -50,7 +50,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_NAND_defconfig b/configs/P1010RDB-PA_NAND_defconfig index 99b94a061df..aa8aeda7580 100644 --- a/configs/P1010RDB-PA_NAND_defconfig +++ b/configs/P1010RDB-PA_NAND_defconfig @@ -50,7 +50,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PA_SDCARD_defconfig b/configs/P1010RDB-PA_SDCARD_defconfig index 9f2afcdadc9..30ff3ad322b 100644 --- a/configs/P1010RDB-PA_SDCARD_defconfig +++ b/configs/P1010RDB-PA_SDCARD_defconfig @@ -47,7 +47,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PA_SPIFLASH_defconfig b/configs/P1010RDB-PA_SPIFLASH_defconfig index 7c64fdcf6f0..d7d8219e947 100644 --- a/configs/P1010RDB-PA_SPIFLASH_defconfig +++ b/configs/P1010RDB-PA_SPIFLASH_defconfig @@ -49,7 +49,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_36BIT_NAND_defconfig b/configs/P1010RDB-PB_36BIT_NAND_defconfig index 87953b8f190..6e053870834 100644 --- a/configs/P1010RDB-PB_36BIT_NAND_defconfig +++ b/configs/P1010RDB-PB_36BIT_NAND_defconfig @@ -52,7 +52,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig index 4dbf8695e4e..216e14cdacc 100644 --- a/configs/P1010RDB-PB_36BIT_SDCARD_defconfig +++ b/configs/P1010RDB-PB_36BIT_SDCARD_defconfig @@ -49,7 +49,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig index f5bcffbd490..35943d10d77 100644 --- a/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_36BIT_SPIFLASH_defconfig @@ -51,7 +51,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_NAND_defconfig b/configs/P1010RDB-PB_NAND_defconfig index 82f29bed54e..c2c851ca57a 100644 --- a/configs/P1010RDB-PB_NAND_defconfig +++ b/configs/P1010RDB-PB_NAND_defconfig @@ -51,7 +51,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xd0034000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_DRIVERS_MISC=y CONFIG_TPL_ENV_SUPPORT=y diff --git a/configs/P1010RDB-PB_SDCARD_defconfig b/configs/P1010RDB-PB_SDCARD_defconfig index 3dfb509c8ad..b8e0a92a935 100644 --- a/configs/P1010RDB-PB_SDCARD_defconfig +++ b/configs/P1010RDB-PB_SDCARD_defconfig @@ -48,7 +48,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1010RDB-PB_SPIFLASH_defconfig b/configs/P1010RDB-PB_SPIFLASH_defconfig index f3d399f84f7..f403e67b8fe 100644 --- a/configs/P1010RDB-PB_SPIFLASH_defconfig +++ b/configs/P1010RDB-PB_SPIFLASH_defconfig @@ -50,7 +50,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x20000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y CONFIG_SYS_PBSIZE=276 CONFIG_CMD_IMLS=y diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig index de04556b224..02f0f3cde99 100644 --- a/configs/P1020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P1020RDB-PC_36BIT_NAND_defconfig @@ -52,7 +52,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig index 2d201bf55e9..84cc6bd38e5 100644 --- a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig @@ -49,7 +49,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig index a6b7a4abf50..427b67c6722 100644 --- a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig @@ -51,7 +51,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig index cf47bd49c7a..e1e6af7fae0 100644 --- a/configs/P1020RDB-PC_NAND_defconfig +++ b/configs/P1020RDB-PC_NAND_defconfig @@ -51,7 +51,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig index 3a86a9ef525..d9477f1c339 100644 --- a/configs/P1020RDB-PC_SDCARD_defconfig +++ b/configs/P1020RDB-PC_SDCARD_defconfig @@ -48,7 +48,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig index 9fe2b1d88f5..f27c9c3835d 100644 --- a/configs/P1020RDB-PC_SPIFLASH_defconfig +++ b/configs/P1020RDB-PC_SPIFLASH_defconfig @@ -50,7 +50,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig index 2f768c06705..1d364fef2aa 100644 --- a/configs/P1020RDB-PD_NAND_defconfig +++ b/configs/P1020RDB-PD_NAND_defconfig @@ -51,7 +51,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig index 6cb3be08dc2..4dc2457c1c7 100644 --- a/configs/P1020RDB-PD_SDCARD_defconfig +++ b/configs/P1020RDB-PD_SDCARD_defconfig @@ -48,7 +48,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig index 0eb2b3ab74b..bf6d2235b36 100644 --- a/configs/P1020RDB-PD_SPIFLASH_defconfig +++ b/configs/P1020RDB-PD_SPIFLASH_defconfig @@ -50,7 +50,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x1b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig index c53c4c6c7cc..7646e9054b8 100644 --- a/configs/P2020RDB-PC_36BIT_NAND_defconfig +++ b/configs/P2020RDB-PC_36BIT_NAND_defconfig @@ -52,7 +52,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig index 0ac74287fde..81512593da5 100644 --- a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig +++ b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig @@ -49,7 +49,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig index 9da9ef0c691..3f106c60139 100644 --- a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig @@ -51,7 +51,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig index 4758e0e3715..11d59d14fe4 100644 --- a/configs/P2020RDB-PC_NAND_defconfig +++ b/configs/P2020RDB-PC_NAND_defconfig @@ -51,7 +51,6 @@ CONFIG_TPL_RELOC_MALLOC=y CONFIG_TPL_RELOC_MALLOC_ADDR=0xf8fb4000 CONFIG_TPL_RELOC_MALLOC_SIZE=0xc000 CONFIG_SPL_NAND_SUPPORT=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_TPL=y CONFIG_TPL_ENV_SUPPORT=y CONFIG_TPL_I2C=y diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig index 1584a8a7c3a..9416d93c533 100644 --- a/configs/P2020RDB-PC_SDCARD_defconfig +++ b/configs/P2020RDB-PC_SDCARD_defconfig @@ -48,7 +48,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig index 6acb0bcb12e..74d26f1f1a9 100644 --- a/configs/P2020RDB-PC_SPIFLASH_defconfig +++ b/configs/P2020RDB-PC_SPIFLASH_defconfig @@ -50,7 +50,6 @@ CONFIG_SPL_RELOC_MALLOC_SIZE=0x5b000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SPL_MPC8XXX_INIT_DDR=y -CONFIG_SPL_TARGET="u-boot-with-spl.bin" CONFIG_HUSH_PARSER=y # CONFIG_AUTO_COMPLETE is not set CONFIG_SYS_PBSIZE=276 From 367c9e0614e85f1407115054d5cf56c08cc7a9ff Mon Sep 17 00:00:00 2001 From: Andrew Davis Date: Fri, 6 Jan 2023 13:05:14 -0600 Subject: [PATCH 18/18] ARM: omap3: evm: Name this directory omap3evm Before this was named just evm, which doesn't match the naming of the other TI board file directory and makes it look like a common directory for evms. Name this omap3evm. Signed-off-by: Andrew Davis Reviewed-by: Derald Woods --- arch/arm/mach-omap2/omap3/Kconfig | 2 +- board/ti/{evm => omap3evm}/Kconfig | 2 +- board/ti/{evm => omap3evm}/MAINTAINERS | 2 +- board/ti/{evm => omap3evm}/Makefile | 0 board/ti/{evm => omap3evm}/evm.c | 0 board/ti/{evm => omap3evm}/evm.h | 0 6 files changed, 3 insertions(+), 3 deletions(-) rename board/ti/{evm => omap3evm}/Kconfig (86%) rename board/ti/{evm => omap3evm}/MAINTAINERS (85%) rename board/ti/{evm => omap3evm}/Makefile (100%) rename board/ti/{evm => omap3evm}/evm.c (100%) rename board/ti/{evm => omap3evm}/evm.h (100%) diff --git a/arch/arm/mach-omap2/omap3/Kconfig b/arch/arm/mach-omap2/omap3/Kconfig index 3e97ec26295..671e4791c67 100644 --- a/arch/arm/mach-omap2/omap3/Kconfig +++ b/arch/arm/mach-omap2/omap3/Kconfig @@ -163,7 +163,7 @@ config SYS_SOC source "board/logicpd/am3517evm/Kconfig" source "board/ti/beagle/Kconfig" source "board/timll/devkit8000/Kconfig" -source "board/ti/evm/Kconfig" +source "board/ti/omap3evm/Kconfig" source "board/isee/igep00x0/Kconfig" source "board/logicpd/omap3som/Kconfig" source "board/nokia/rx51/Kconfig" diff --git a/board/ti/evm/Kconfig b/board/ti/omap3evm/Kconfig similarity index 86% rename from board/ti/evm/Kconfig rename to board/ti/omap3evm/Kconfig index 4f490ddd9d5..08a8aa20ae8 100644 --- a/board/ti/evm/Kconfig +++ b/board/ti/omap3evm/Kconfig @@ -1,7 +1,7 @@ if TARGET_OMAP3_EVM config SYS_BOARD - default "evm" + default "omap3evm" config SYS_VENDOR default "ti" diff --git a/board/ti/evm/MAINTAINERS b/board/ti/omap3evm/MAINTAINERS similarity index 85% rename from board/ti/evm/MAINTAINERS rename to board/ti/omap3evm/MAINTAINERS index cd315c1635b..fb4268b312f 100644 --- a/board/ti/evm/MAINTAINERS +++ b/board/ti/omap3evm/MAINTAINERS @@ -1,6 +1,6 @@ EVM BOARD M: Derald D. Woods S: Maintained -F: board/ti/evm/ +F: board/ti/omap3evm/ F: include/configs/omap3_evm.h F: configs/omap3_evm_defconfig diff --git a/board/ti/evm/Makefile b/board/ti/omap3evm/Makefile similarity index 100% rename from board/ti/evm/Makefile rename to board/ti/omap3evm/Makefile diff --git a/board/ti/evm/evm.c b/board/ti/omap3evm/evm.c similarity index 100% rename from board/ti/evm/evm.c rename to board/ti/omap3evm/evm.c diff --git a/board/ti/evm/evm.h b/board/ti/omap3evm/evm.h similarity index 100% rename from board/ti/evm/evm.h rename to board/ti/omap3evm/evm.h