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ARMv8/fsl-layerscape: Enable data coherency between cores in cluster

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Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
This commit is contained in:
Hou Zhiqiang 2017-01-06 17:41:11 +08:00 committed by York Sun
parent 3aec452e4d
commit ee2a510221
1 changed files with 4 additions and 0 deletions
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4
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
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@ -1,5 +1,6 @@
config ARCH_LS1012A config ARCH_LS1012A
bool bool
select ARMV8_SET_SMPEN
select FSL_LSCH2 select FSL_LSCH2
select SYS_FSL_DDR_BE select SYS_FSL_DDR_BE
select SYS_FSL_MMDC select SYS_FSL_MMDC
@ -7,6 +8,7 @@ config ARCH_LS1012A
config ARCH_LS1043A config ARCH_LS1043A
bool bool
select ARMV8_SET_SMPEN
select FSL_LSCH2 select FSL_LSCH2
select SYS_FSL_DDR select SYS_FSL_DDR
select SYS_FSL_DDR_BE select SYS_FSL_DDR_BE
@ -23,6 +25,7 @@ config ARCH_LS1043A
config ARCH_LS1046A config ARCH_LS1046A
bool bool
select ARMV8_SET_SMPEN
select FSL_LSCH2 select FSL_LSCH2
select SYS_FSL_DDR select SYS_FSL_DDR
select SYS_FSL_DDR_BE select SYS_FSL_DDR_BE
@ -38,6 +41,7 @@ config ARCH_LS1046A
config ARCH_LS2080A config ARCH_LS2080A
bool bool
select ARMV8_SET_SMPEN
select FSL_LSCH3 select FSL_LSCH3
select SYS_FSL_DDR select SYS_FSL_DDR
select SYS_FSL_DDR_LE select SYS_FSL_DDR_LE