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Squashed 'dts/upstream/' changes from fe2d6c49bb4e..d08867ef8f12
d08867ef8f12 Merge tag 'v6.16-dts-raw' 0a3935a7ac7e Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux cdbf9e831b32 Merge tag 'soc-fixes-6.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc bad311fb385a arm64: dts: rockchip: Drop netdev led-triggers on NanoPi R5S 2e218e73258a Merge tag 'sunxi-clk-fixes-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-fixes 0d793561b36b Merge tag 'v6.16-rc7-dts-raw' 4afd44a0f9e1 Merge tag 'char-misc-6.16-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc d4258ca2506f Merge tag 'sunxi-fixes-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/fixes 6f58a4a3d85b Merge tag 'soc-fixes-6.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 7d36fa2aead7 Merge tag 'v6.16-rc6-dts-raw' 5b4fe5bc4d6c Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 658c2ac70a6b Merge tag 'qcom-arm64-fixes-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes 30434c1bbe5b Merge tag 'v6.16-rockchip-dtsfixes1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes fe1c74e923db Merge tag 'imx-fixes-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes fc87372bbb95 Merge tag 'net-6.16-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 95306cebd27f arm64: dts: allwinner: a523: Rename emac0 to gmac0 87991de983b4 dt-bindings: net: sun8i-emac: Rename A523 EMAC0 to GMAC0 660bbdcb1908 arm64: dts: freescale: imx8mm-verdin: Keep LDO5 always on 2a8f1cf921d8 Merge tag 'v6.16-rc5-dts-raw' 7764f9945554 Merge tag 'i2c-for-6.16-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux f308bc1b45ec Merge tag 'soc-fixes-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 3801555e90ae Merge tag 'input-for-v6.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input f6493b7ab2e6 Merge tag 'iio-fixes-for-6.16a' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-linus 06e8c2fc200d Merge tag 'net-6.16-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net c5acde066c90 clk: sunxi-ng: v3s: Fix CSI SCLK clock name 3bfb31865adf Merge tag 'apple-soc-fixes-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into arm/fixes ee3a6c0c6e28 dt-bindings: net: sophgo,sg2044-dwmac: Drop status from the example 3de3f2c47ebc dt-bindings: i2c: realtek,rtl9301: Fix missing 'reg' constraint 21a8d452d496 arm64: dts: imx95: Correct the DMA interrupter number of pcie0_ep 9767855abcf1 arm64: dts: rockchip: Add missing fan-supply to rk3566-quartz64-a 92b2acaf0da3 arm64: dts: rockchip: use cs-gpios for spi1 on ringneck 647bec67d41e Merge tag 'v6.16-rc4-dts-raw' 3de530f62c29 arm64: dts: add big-endian property back into watchdog node 70aadb6d7760 arm64: dts: imx95-15x15-evk: fix the overshoot issue of NETC d3b30b770c70 arm64: dts: imx95-19x19-evk: fix the overshoot issue of NETC 87ec6dc7cb55 Merge tag 'tty-6.16-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty d1c317d2ce13 dt-bindings: iio: gyro: invensense,mpu3050: change irq maxItems fe8a968606e7 dt-bindings: iio: adc: adi,ad7606: fix dt_schema validation warning 70aa5d0e1460 Merge tag 'devicetree-fixes-for-6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 30f939ec9d1e dt-bindings: serial: 8250: Make clocks and clock-frequency exclusive 7c401dc8faf7 Merge tag 'v6.16-rc3-dts-raw' 84298fd5232d Merge tag 'i2c-for-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux 5e306c8e57da dt-bindings: clock: mediatek: Add #reset-cells property for MT8188 9f63f409ab73 arm64: dts: rockchip: list all CPU supplies on ArmSoM Sige5 4e22da9b6577 arm64: dts: imx8mp-venice-gw74xx: fix TPM SPI frequency d3fb320a33e9 arm64: dts: imx8mp-venice-gw73xx: fix TPM SPI frequency e31af1649925 arm64: dts: imx8mp-venice-gw72xx: fix TPM SPI frequency c2aa28307e3a arm64: dts: imx8mp-venice-gw71xx: fix TPM SPI frequency 90a33540cd99 Merge tag 'libnvdimm-fixes-6.16-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm b8ab2abeeac6 dt-bindings: HID: i2c-hid: elan: Introduce Elan eKTH8D18 85773da82c5c Merge tag 'powerpc-6.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux cb5c58a1e4b6 Merge tag 'v6.16-rc2-dts-raw' ac5a2455698d arm64: dts: apple: Move touchbar mipi {address,size}-cells from dtsi to dts bc677b407179 arm64: dts: apple: Drop {address,size}-cells from SPI NOR 76c8cfce5e1f arm64: dts: apple: t8103: Fix PCIe BCM4377 nodename f0db656aa694 powerpc: dts: mpc8315erdb: Add GPIO controller node 96311d89661c powerpc/microwatt: Fix model property in device tree 2b4fde2f5082 dt-bindings: i2c: nvidia,tegra20-i2c: Specify the required properties 095eda05803e dt-bindings: serial: Convert altr,uart-1.0 to DT schema db0e58d2587f dt-bindings: serial: Convert altr,juart-1.0 to DT schema d2c031826ad8 dt-bindings: pmem: Convert binding to YAML 693df0922817 Merge tag 'v6.16-rc1-dts-raw' 42bf1c74586e arm64: dts: qcom: x1e80100: describe uefi rtc offset 07c8ad44a26d arm64: dts: qcom: sc8280xp-x13s: describe uefi rtc offset ee54a18d8a5b dt-bindings: soc: fsl,ls1028a-reset: Drop extra "/" in $id 0c4780dea8a9 arm64: dts: rockchip: Add cd-gpios for sdcard detect on Cool Pi 4B 96e8f4d737e7 arm64: dts: rockchip: Add cd-gpios for sdcard detect on Cool Pi CM5 fa6ea8235d1b arm64: dts: rockchip: Adjust the HDMI DDC IO driver strength for rk3588 f1f137de95a6 arm64: dts: rockchip: fix rk3576 pcie1 linux,pci-domain a4d276ce3997 pinctrl: MAINTAINERS: Drop bouncing Jianlong Huang f2276a9a3306 Merge tag 'loongarch-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson 9b7f7912690b Merge tag 'riscv-for-linus-6.16-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux 34a79d8b450a Merge tag 'spi-v6.16-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 60656d9d69c7 Merge tag 'pwm/for-6.16-rc1-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux 185483e5516d Merge tag 'usb-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb 82b0ede70e81 Merge tag 'tty-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty cf5586288846 Merge tag 'char-misc-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc 70afb5f7dba1 Merge tag 'mips_6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux fdbd471f36e9 LoongArch: dts: Add PWM support to Loongson-2K2000 3ced8eecbb60 LoongArch: dts: Add PWM support to Loongson-2K1000 fbe4122cb758 LoongArch: dts: Add PWM support to Loongson-2K0500 ea388cd12b48 dt-bindings: drm/bridge: ti-sn65dsi83: drop $ref to fix lvds-vod* warnings 7103b4c36a4a Merge tag 'riscv-mw2-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next 9a6b386a2d3e Merge tag 'riscv-mw1-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next 4e717f475d40 Merge tag 'rtc-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/abelloni/linux 08614ae8e2cb Merge tag 'dmaengine-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine b8aa7fef75df Merge tag 'phy-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy 1b1aad416ff8 Merge tag 'pci-v6.16-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci aba43883f85b Merge branch 'pci/dt-bindings' 1d90b503befe Merge branch 'pci/controller/qcom' 0db0a94747d9 Merge tag 'leds-next-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/leds 9bf6649192bc Merge tag 'mfd-next-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd 0107bcabb83c Merge tag 'ata-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/libata/linux af3695e9189a Merge tag 'hwmon-for-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging 2b4267b37eda Merge tag 'hyperv-next-signed-20250602' of git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux fed506f23c59 Merge tag 'input-for-v6.16-rc0' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input 26c047f1d621 Merge tag 'mtd/for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux 509d8a0be181 Merge tag 'rproc-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux 213c5dbadd23 Merge tag 'mailbox-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox 77b1744dd134 Merge tag 'nand/for-6.16' into mtd/next 69598f8cf6f4 dt-bindings: pwm: adi,axi-pwmgen: Fix clocks 418d565e162f dt-bindings: rtc: rzn1: add optional second clock 7e286e009f74 Merge tag 'linux-watchdog-6.16-rc1' of git://www.linux-watchdog.org/linux-watchdog e54e07e995ad Merge tag 'i3c/for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/i3c/linux b77068b989d1 Merge tag 'for-linus' of https://github.com/openrisc/linux 538862aba33e dt-bindings: watchdog: renesas,wdt: Document RZ/V2N (R9A09G056) support a8ad8f16aa05 dt-bindings: watchdog: samsung-wdt: Add exynos990-wdt compatible 51eb468dec31 Merge tag 'mm-nonmm-stable-2025-05-31-15-28' of git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm 07ddd9da3372 Merge tag 'soc-newsoc-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc d9e9df4c73ea Merge tag 'soc-dt-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc e32b012ba92c Merge tag 'soc-arm-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 8229dffd6155 Merge tag 'soc-drivers-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc 92ddbc7b281f Merge tag 'iommu-updates-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux 60fccc768ca3 Merge tag 'i2c-for-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux de3468345344 Merge tag 'pinctrl-v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl 64d64658bb1d Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux 2feab0192b3d Merge tag 'renesas-dts-for-v6.16-tag5' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt d2e6c3b1a961 Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi 799cac52d435 Merge tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux 7bb3a108ef22 dt-bindings: mailbox: qcom,apcs: Add separate node for clock-controller 939cb0c4baa1 Merge branches 'clk-amlogic', 'clk-allwinner', 'clk-rockchip' and 'clk-qcom' into clk-next 1142409d3ba1 Merge branches 'clk-socfpga', 'clk-sophgo', 'clk-thead' and 'clk-samsung' into clk-next baaeae2a216c Merge branches 'clk-bindings', 'clk-renesas', 'clk-spacemit' and 'clk-cleanup' into clk-next ce2790c97a29 Merge tag 'net-next-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next b7b077d37b30 Merge tag 'drm-next-2025-05-28' of https://gitlab.freedesktop.org/drm/kernel 9671e900d11e Merge tag 'media/v6.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab/linux-media ceab2a443756 dt-bindings: timer: Add fsl,vf610-pit.yaml 797ede01deb9 dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC 9e6cc5046d38 ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card c0d1d4762e35 dt-bindings: net: dsa: mediatek,mt7530: Add airoha,an7583-switch 85d3dd3767d7 Merge tag 'thermal-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm 608dc836c43c Merge tag 'mmc-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc e709800437f0 Merge tag 'pmdomain-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/linux-pm 2fed8c22fca0 Merge tag 'for-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-power-supply 841871381e3f Merge tag 'spi-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi 82e042806351 Merge tag 'regulator-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/regulator 6cd98d149a4e Merge tag 'gpio-updates-for-v6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux c56d7645f65d Merge tag 'sound-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound 531f5a82239b Merge tag 'pwm/for-6.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux c5c642e59f80 dt-bindings: arm/cpus: Allow 2 power-domains entries 1f34e1ba0664 dt-bindings: usb: dwc3-xilinx: allow dma-coherent 7fe9ca816df0 media: dt-bindings: sony,imx219: Allow props from video-interface-devices 23e1a9da2b61 dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block dc18bda804b0 dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt 39e0723837f5 dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties 52320e279b5f Merge tag 'timers-clocksource-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 4ac72745a3ba Merge tag 'irq-msi-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip eabba266a125 Merge tag 'irq-drivers-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip cfeb2af0f1dc spi: dt-bindings: spi-sg2044-nor: Add SOPHGO SG2042 3fe54a460693 dt-bindings: mailbox: qcom: Add the SM7150 APCS compatible d48dd7367ff4 dt-bindings: mailbox: add Sophgo CV18XX series SoC 7205fdc68aac Merge tag 'v6.16-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6 78be8e64e1d5 Merge tag 'linux-can-next-for-6.16-20250522' of git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next c268694ae6c1 dt-bindings: net: airoha: Add EN7581 memory-region property 4f5aa39b37b3 arm64: dts: renesas: rzg3e-smarc-som: Reduce I2C2 clock frequency b33d0aa6f5f2 dt-bindings: rtc: add schema for NXP S32G2/S32G3 SoCs a11101f2861b dt-bindings: at91rm9260-rtt: add microchip,sama7d65-rtt 0868d96a7d71 dt-bindings: rtc: at91rm9200: add microchip,sama7d65-rtc 32d48c35b490 dt-bindings: rtc: qcom-pm8xxx: add uefi-variable offset 538b161c06d8 dt-bindings: i3c: silvaco,i3c-master: add i.MX94 and i.MX95 I3C 8d0721592b6a dt-bindings: watchdog: Add rk3562 compatible 7e2f745f8729 dt-bindings: watchdog: fsl,scu-wdt: Document imx8qm 46093162d96a dt-bindings: watchdog: Add NXP Software Watchdog Timer b2ba88747136 Merge tag 'asoc-v6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next 277fcfcc8dce dt-bindings: microsoft,vmbus: Add interrupt and DMA coherence properties 93eb157cdee2 ASoC: codecs: add support for ES8375 62137585c9f1 Merge tag 'i2c-host-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/andi.shyti/linux into i2c/for-mergewindow 07176cad5d48 Merge branches 'fixes', 'apple/dart', 'arm/smmu/updates', 'arm/smmu/bindings', 'fsl/pamu', 'mediatek', 'renesas/ipmmu', 's390', 'intel/vt-d', 'amd/amd-vi' and 'core' into next e17bfdf2bd3d ASoC: dt-bindings: Add Everest ES8375 audio CODEC b8f581eae5d9 dt-bindings: i2c: i2c-wmt: Convert to YAML 89a9fc8a198e dt-bindings: mfd: syscon: Add mediatek,mt8365-infracfg-nao cf5bbfd397e6 dt-bindings: mfd: Correct indentation and style in DTS example 563f0fcfdb0f dt-bindings: mfd: Drop unrelated nodes from DTS example 1edb48c66ec4 dt-bindings: mfd: syscon: Add qcom,apq8064-sps-sic 9b2ea6c9e8cb dt-bindings: mfd: syscon: Add qcom,apq8064-mmss-sfpb 29ee27ad1c0a dt-bindings: mfd: syscon: Add mt7988-topmisc c75d8d1f7422 dt-bindings: mfd: mediatek,mt8195-scpsys: Add support for MT6893 37027ad45e6d dt-bindings: mfd: samsung,s2mps11: add s2mpg10 0a34ed586984 dt-bindings: mfd: syscon: Add microchip,sama7d65-secumod 903f759ee35d dt-bindings: mfd: syscon: atmel,sama5d2-secumod: Convert to yaml be643f887bf8 dt-bindings: mfd: atmel: Add microchip,sama7d65-gpbr d35666a54bce dt-bindings: mmc: sdhci-of-dwcmhsc: Allow use of a power-domain 9c4b88c5a89e Merge tag 'wireless-next-2025-05-22' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next 1b4f682e3ad4 Merge tag 'for-net-next-2025-05-22' of git://git.kernel.org/pub/scm/linux/kernel/git/bluetooth/bluetooth-next b21424815167 Merge tag 'asoc-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next dd6fc25d89c7 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 88b634bfddd2 Merge tag 'icc-6.16-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/djakov/icc into char-misc-next 635c310eb96e Merge tag 'coresight-next-v6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next c9cd65d9ea51 Merge branches 'ib-firmware-mfd-6.16', 'ib-mfd-clocksource-pwm-6.16', 'ib-mfd-gpio-nvmem-6.16', 'ib-mfd-regulator-6.16' and 'ib-mfd-regulator-6.16-1' into ibs-for-mfd-merged 2c559dd38fb0 Merge tag 'iio-for-6.16a-take2' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/jic23/iio into char-misc-next 89c022fde09d Add Tegra264 support in AHUB drivers ad5d21e87116 dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml e34c1605234f Merge tag 'davinci-updates-for-v6.16-rc1' of https://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into soc/arm ca95dc05b5bb Merge tag 'juno-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/dt 9bab5690961c dt-bindings: ASoC: Document Tegra264 APE support 3fac990c1607 dt-bindings: ASoC: admaif: Add missing properties 2ff27434f054 dt-bindings: mfd: brcm,bcm59056: Add compatible for BCM59054 d2bb71f7f921 dt-bindings: mfd: brcm,bcm59056: Convert to YAML 508b29e71313 ASoC: dt-bindings: audio-graph-card2: reference audio-graph routing property 026c9a82d4d6 dt-bindings: leds: Add Texas Instruments TPS6131x flash LED driver 5aab6ddffa44 dt-bindings: net: Document support for Aeonsemi PHYs c66ed7b8b5f8 Merge tag 'qcom-arm64-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt 2c15df445738 Merge tag 'qcom-arm32-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt 7d52cefecf33 Merge tag 'mtk-dts64-for-v6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt c3be03f1576b Merge tag 'v6.16-rockchip-dts32-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt 151e84ca25b1 Merge tag 'v6.16-rockchip-dts64-3' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt fd61f1d659e9 Merge tag 'v6.16-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt 69ecc61139f5 Merge tag 'mvebu-dt64-6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt 755e06a92789 Merge tag 'renesas-dts-for-v6.16-tag4' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt 03424c08167f Merge tag 'renesas-dts-for-v6.16-tag3' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt 224238999a2c Merge tag 'riscv-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt ef9c1679cc0a Merge tag 'microchip-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt 45f7c4fc1a32 Merge tag 'at91-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt 2f4d88f59336 Merge tag 'sunxi-dt-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt 5ce4d3de1bab Merge tag 'stm32-dt-for-v6.16-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt d89aa840ef5d Merge tag 'spacemit-dt-for-6.16-1' of https://github.com/spacemit-com/linux into soc/dt 43d0dd81da74 Merge tag 'qcom-arm32-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt 325cd9e9946a Merge tag 'dt-vt8500-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt 09c407adcd2c Merge tag 'qcom-arm64-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt 9fc38b83cdf5 Merge tag 'nuvoton-arm-6.16-devicetree' of https://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt c83799c8dd90 Merge tag 'qcom-drivers-for-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers e0314147cea5 Merge tag 'riscv-cache-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers b1f49e53cf77 Merge tag 'samsung-drivers-6.16-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers 3b55c18b3508 arm64: dts: nuvoton: Add pinctrl deb09c527dc0 dt-bindings: spi: samsung: add exynosautov920-spi compatible 66dd7fd01067 mailmap: update and consolidate Casey Connolly's name and email a0fb0d3f5f30 Merge tag 'riscv-sophgo-soc-for-v6.16' of https://github.com/sophgo/linux into soc/drivers 4160f8827e4d Merge tag 'qcom-drivers-for-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers bb77a5a73912 Merge tag 'soc-drivers-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/drivers 8707811d045c Merge tag 'amlogic-driver-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/drivers 1e7fa6c4dbaa Merge tag 'dt64-cleanup-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt e2e43e44fc51 Merge tag 'amlogic-arm64-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt 73195a6e0c5c Merge tag 'amlogic-arm-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt 38aa5a686d0e Merge tag 'samsung-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt 5d33e21e66f0 Merge tag 'reset-for-v6.16' of git://git.pengutronix.de/pza/linux into soc/drivers 3e9d465085a9 ARM: dts: samsung: sp5v210-aries: Align wifi node name with bindings 0b927692a7bd Merge tag 'ti-k3-dt-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt 0d52eb1cf5e4 arm64: dts: blaize-blzp1600: Enable GPIO support da83afa6eb07 Merge tag 'thead-dt-for-v6.16' of https://github.com/pdp7/linux into soc/dt 4acee1d7632f dt-bindings: clock: socfpga: convert to yaml e950e3eb3a33 dt-bindings: gpio: vf610: add ngpios and gpio-reserved-ranges 6f5a37dc8f30 ASoC: dt-bindings: audio-graph-card2: add missing mic-det-gpios c04f34769343 dt-bindings: net: bluetooth: nxp: Add support for host-wakeup 541687515c1a dt-bindings: iio: adc: Add ROHM BD79100G bb454172d88f dt-bindings: iio: adc: add NCT7201 ADCs 2d2b2b5c0772 dt-bindings: trivial-devices: Document SEN0322 8bec7a21e263 dt-bindings: iio: adc: mcp3911: add reset-gpios ca406ea016be dt-bindings: iio: dac: Add adi,ad3530r.yaml 5fe995b1dd53 dt-bindings: iio: adc: Add compatible for Dimensity 1200 MT6893 1edc97a95aa5 dt-bindings: iio: dac: ad7293: add vrefin support 082ad88205a7 dt-bindings: Add device tree support for Winsen MHZ19B CO2 sensor 85963b0bd856 dt-bindings: Add Winsen to the vendor prefixes c046c1cfd311 dt-bindings: spmi: Add Apple SPMI controller 92648c8bb3a5 dt-bindings: can: renesas,rcar-canfd: Document RZ/G3E support a315f55a2a76 dt-bindings: can: renesas,rcar-canfd: Simplify the conditional schema cf60fa765e1b dt-bindings: spmi: Add Apple SPMI NVMEM 2e56f235875c Merge tag 'mux-drv-6.16' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/krzk/linux into char-misc-next 41d62a413c79 dt-bindings: serial: 8250_omap: Drop redundant properties 6266de5456c9 dt-bindings: serial: Convert socionext,milbeaut-usio-uart to DT schema b1248495c539 dt-bindings: serial: Convert microchip,pic32mzda-uart to DT schema 7a584be8cc34 dt-bindings: serial: Convert arm,sbsa-uart to DT schema 7faba0d1c0e1 dt-bindings: serial: Convert snps,arc-uart to DT schema 5d9cace6931e dt-bindings: serial: Convert marvell,armada-3700-uart to DT schema b11585afcde7 dt-bindings: serial: Convert lantiq,asc to DT schema 2ee62910d9da dt-bindings: serial: Convert cirrus,ep7209-uart to DT schema 076f1b9065fd dt-bindings: serial: Convert arm,mps2-uart to DT schema 0f5b4990e744 dt-bindings: serial: Convert nxp,lpc3220-hsuart to DT schema 4604628e13ff dt-bindings: serial: Convert cnxt,cx92755-usart to DT schema 1be5ca8fbeae dt-bindings: serial: atmel,at91-usart: add microchip,sama7d65-usart 75cc729209d8 dt-bindings: usb: ti,usb8041: Add binding for TI USB8044 hub controller c8b951038c12 dt-bindings: usb: samsung,exynos-dwc3: add dt-schema ExynosAutov920 214f164d27c6 dt-bindings: usb: Add Parade PS8833 Type-C retimer variant 8ec32a7db2e9 scsi: ufs: qcom: dt-bindings: Document the SM8750 UFS Controller 69025409db1d dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller 486cad5cf1af dt-bindings: trivial-devices: Add VZ89TE to trivial b0b6d2e9f637 arm64: dts: rockchip: move rk3562 pinctrl node outside the soc node d6d0b4dfd181 arm64: dts: rockchip: fix rk3562 pcie unit addresses 95d9d7ed4bf1 arm64: dts: rockchip: move rk3528 pinctrl node outside the soc node 1bb1fbbea578 arm64: dts: rockchip: remove a double-empty line from rk3576 core dtsi f0317857788b arm64: dts: rockchip: move rk3576 pinctrl node outside the soc node 83e4382f7a80 arm64: dts: rockchip: fix rk3576 pcie unit addresses c4d3574fd109 arm64: dts: rockchip: Drop assigned-clock* from cpu nodes on rk3588 57e8cb7db7e9 arm64: dts: rockchip: Add missing SFC power-domains to rk3576 b6cea1360aa8 spi: dt-bindings: Add rk3528-spi compatible 34e62490c1c3 Revert "arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0" 23224a425b5f arm64: dts: mediatek: mt8188: Address binding warnings for MDP3 nodes 161f225efa42 arm64: dts: mt6359: Rename RTC node to match binding expectations 887334da0795 arm64: dts: mt8365-evk: Add goodix touchscreen support 6acb2267910a arm64: dts: mediatek: mt8188: Add missing #reset-cells property 4792760f558d arm64: dts: airoha: en7581: Add PCIe nodes to EN7581 SoC evaluation board b6d6f3110d36 arm64: dts: airoha: en7581: Add gpio-ranges property for gpio controller 572c9e06138f arm64: dts: mediatek: mt7988a-bpi-r4: configure spi-nodes 1b9defdec732 arm64: dts: mediatek: mt7988a-bpi-r4: Add fan and coolingmaps 5269d9f97b76 arm64: dts: mediatek: mt7988: add phy calibration efuse subnodes de8fba00158e arm64: dts: mediatek: mt7988: move uart0 and spi1 pins to soc dtsi 2046f03225a8 arm64: dts: mediatek: mt7988: add spi controllers 190bdc8a1f3d arm64: dts: mediatek: mt7988a-bpi-r4: enable xsphy 7a7fefa74dda arm64: dts: mediatek: mt7988: Add xsphy for ssusb0/pcie2 748391bdc918 arm64: dts: mediatek: mt7988a-bpi-r4: allow hw variants of bpi-r4 9bd2134f30ff dt-bindings: arm: mediatek: add bpi-r4 2g5 phy variant 6fb595f7e057 Add sound card support for QCS9100 and QCS9075 0cac869da752 arm64: dts: renesas: white-hawk-ard-audio: Fix TPU0 groups 114fba940bdd mips: dts: Add EcoNet DTS with EN751221 and SmartFiber XP8421-B board 30d15ab14519 dt-bindings: vendor-prefixes: Add SmartFiber 824fd090ff69 dt-bindings: mips: Add EcoNet platform binding d5b777cdf13c mips: dts: pic32: pic32mzda: Rename the sdhci nodename to match with common mmc-controller binding 38f9e24fec25 arm64: dts: qcom: sm4450: Add RPMh power domains support 9b5728807d08 arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: add retimers, dp altmode support 7e66fc1ced1e arm64: dts: qcom: ipq5424: Enable PCIe PHYs and controllers 6c037567bdce arm64: dts: qcom: ipq5424: Add PCIe PHYs and controller nodes 57668bababda arm64: dts: qcom: sc7280: Mark FastRPC context banks as dma-coherent 3e567e1e43b4 arm64: dts: qcom: sdx75-idp: Enable QPIC BAM & QPIC NAND support aa2605ef1c0c arm64: dts: qcom: sdx75: Add QPIC NAND support becd21cdde7d arm64: dts: qcom: sdx75: Add QPIC BAM support 339faffccdd0 arm64: dts: qcom: qcm2290: Add crypto engine be5a2cb0e4d4 arm64: dts: qcom: x1e80100-vivobook-s15: Add bluetooth 1b9b8c4d0807 arm64: dts: qcom: x1e80100: Add PCIe lane equalization preset properties d1065386a278 arm64: dts: qcom: qcs615: Fix up UFS clocks 24d341363edf arm64: dts: qcom: sa8775p: Clean up the PSCI PDs 25e8d99a99ac arm64: dts: qcom: msm8996-oneplus: Add SLPI VDD_PX 708f2ebe5562 arm64: dts: qcom: sm6350-pdx213: Wire up USB regulators ae9cc53d8e50 arm64: dts: qcom: msm8998-yoshino: Add QUSB2PHY VDD supply a14bc1f54f72 arm64: dts: qcom: msm8998-mtp: Add QUSB2PHY VDD supply 8a32261a7a9d arm64: dts: qcom: msm8998-fxtec: Add QUSB2PHY VDD supply 421e97a3fd6c arm64: dts: qcom: qcs615: Remove disallowed property from AOSS_QMP node c891929b43f6 arm64: dts: qcom: msm8998: Remove mdss_hdmi_phy phandle argument e1906f10fb90 arm64: dts: qcom: sdm845: Add specific APPS RSC compatible 57034f8ab737 arm64: dts: qcom: sc7180: Add specific APPS RSC compatible 2b09cf544e89 arm64: dts: qcom: ipq5332-rdp441: Enable PCIe phys and controllers 9e039129755d arm64: dts: qcom: ipq5332: Add PCIe related nodes f4173e14cb38 arm64: dts: qcom: ipq9574: Add MHI to pcie nodes f3bc67041b0a arm64: dts: qcom: sar2130p: add display nodes 5c82bf82ae12 arm64: dts: qcom: sdm845-starqltechn: add modem support 20f31a3e411b arm64: dts: qcom: sdm845-starqltechn: add graphics support eafd56e51f9c arm64: dts: qcom: sdm845-starqltechn: add initial sound support 60ed1a6b1df9 arm64: dts: qcom: qrb2210-rb1: add Bluetooth support e600d195af05 dt-bindings: i2c: i2c-rk3x: Add compatible string for RK3528 ba298e1880ec dt-bindings: i2c: renesas,riic: Document RZ/V2N (R9A09G056) support 8360480c58d7 dt-bindings: i2c: dw: Add Sophgo SG2044 SoC I2C controller 519a8fc26117 dt-bindings: i2c: dw: merge duplicate compatible entry. a5b8efc7c924 dt-bindings: i2c: i2c-mt65xx: Add MediaTek Dimensity 1200 MT6893 c7e668fbc28e dt-bindings: net: wireless: ath12k: describe firmware-name property c315c2d590f0 dt-bindings: timer: renesas,tpu: remove binding documentation 2e0c91fb13ae Merge branch 'icc-sa8775p' into icc-next fb0b120a1a93 dt-bindings: mmc: spacemit,sdhci: add support for K1 SoC 46ff3a1b29bc ASoC: dt-bindings: qcom,sm8250: Add QCS9100 and QCS9075 sound card d1d279316629 dt-binding: mmc: microchip,sdhci-pic32: convert text based binding to json schema 330730b5c105 dt-bindings: crypto: Convert Marvell CESA to DT schema e2659dcdb3ea dt-bindings: crypto: Convert img,hash-accelerator to DT schema 4dc2e127ef91 dt-bindings: crypto: Convert hisilicon,hip0{6,7}-sec to DT schema 44772d6d4e9b dt-bindings: crypto: Convert brcm,spum-crypto to DT schema fbb6c9a494af dt-bindings: crypto: Convert axis,artpec6-crypto to DT schema c017f54c9fff dt-bindings: crypto: Convert amd,ccp-seattle-v1a to DT schema a5f94755bfb6 dt-bindings: crypto: Drop obsolete mediatek,eip97-crypto ff768caf62eb dt-bindings: crypto: fsl,sec-v4.0: Add fsl,sec-v6.0 6ecbc066dc7c Merge tag 'drm-msm-next-2025-05-16' of https://gitlab.freedesktop.org/drm/msm into drm-next 9dfb31b362db riscv: dts: sophgo: switch precise compatible for existed clock device for CV18XX 85e7467e1300 riscv: dts: sophgo: Add initial device tree of Sophgo SRD3-10 83177f084b2f dt-bindings: riscv: sophgo: Add SG2044 compatible string 3737ab2125be dt-bindings: interrupt-controller: Add Sophgo SG2044 PLIC 247d63c217bc dt-bindings: interrupt-controller: Add Sophgo SG2044 CLINT mswi f0df16d747de riscv: dts: sopgho: use SOC_PERIPHERAL_IRQ to calculate interrupt number 809b2feac3f8 riscv: dts: sophgo: rename header file cv18xx.dtsi to cv180x.dtsi 3f8df5f3e748 riscv: dts: sophgo: Move riscv cpu definition to a separate file 2909054d6f9d riscv: dts: sophgo: Move all soc specific device into soc dtsi file f4cdf8f5f17b riscv: sophgo: dts: Add spi controller for SG2042 c2b7b3a675c7 riscv: dts: sophgo: sg2042: add pinctrl support d05f1cff48c5 ARM: dts: qcom: apq8064-ifc6410: drop HDMI HPD GPIO 7a6c138888cf arm64: dts: qcom: qcm2290: fix (some) of QUP interconnects adc6b59b4259 arm64: dts: qcom: sc8280xp-crd: Enable SLPI ec0bf0004515 arm64: dts: qcom: sc8280xp-lenovo-thinkpad-x13s: enable sensors DSP 0f644dd61ebb arm64: dts: qcom: sc8280xp: Add SLPI 92734dba91d4 arm64: dts: qcom: sc8280xp: Fix node order 2e29d8db414b arm64: dts: qcom: x1e80100: Enable cpufreq 59bd0aec0418 arm64: dts: qcom: x1e80100: Add cpucp mailbox and sram nodes 6528ca226950 arm64: dts: qcom: x1e80100-hp-x14: drop bogus USB retimer b15ca38a9a5a arm64: dts: qcom: x1e78100-t14s: Enable audio headset support a187fa6211ad arm64: dts: qcom: x1e78100-t14s: enable SDX62 modem 5eca7d1cfd49 dt-bindings: PCI: microchip,pcie-host: Fix DMA coherency property 50f1a27c303c dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) support 8d256f3ddec5 dt-bindings: thermal: qcom-tsens: Add ipq5018 compatible 7be116f73307 dt-bindings: thermal: Add support for Airoha EN7581 thermal sensor cc1a22604a95 dt-bindings: timer: Convert marvell,armada-370-timer to DT schema ea4284f3e172 dt-bindings: timer: Convert ti,keystone-timer to DT schema 4f1bf0aa2ecb dt-bindings: timer: Convert st,spear-timer to DT schema 494bc2733ec5 dt-bindings: timer: Convert socionext,milbeaut-timer to DT schema a2e0a62b5750 dt-bindings: timer: Convert snps,arc-timer to DT schema 46d4eaf6b0dc dt-bindings: timer: Convert snps,archs-rtc to DT schema 935c813b69af dt-bindings: timer: Convert snps,archs-gfrc to DT schema 5f8cc6ccdcfa dt-bindings: timer: Convert lsi,zevio-timer to DT schema ef36916d6a28 dt-bindings: timer: Convert jcore,pit to DT schema 878db709baf4 dt-bindings: timer: Convert img,pistachio-gptimer to DT schema c032acacb214 dt-bindings: timer: Convert ezchip,nps400-timer to DT schema 1b65ea760f37 dt-bindings: timer: Convert cirrus,clps711x-timer to DT schema f460f99b561c dt-bindings: timer: Convert altr,timer-1.0 to DT schema e5d2349b1506 dt-bindings: timer: Add ESWIN EIC7700 CLINT 440820d62a31 dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU Timer bf84d1e94975 dt-bindings: timer: Convert arm,mps2-timer to DT schema bcc8b8e14160 dt-bindings: timer: Add Sophgo SG2044 ACLINT timer 93db5ef1eaf2 dt-bindings: timer: Convert cnxt,cx92755-timer to DT schema 9460d854813b dt-bindings: timer: Convert csky,gx6605s-timer to DT schema 28a94c60f1d9 dt-bindings: timer: Convert csky,mptimer to DT schema c9ae39b1b998 dt-bindings: timer: Convert marvell,orion-timer to DT schema c0c401e88d14 dt-bindings: timer: Convert fsl,gtm to YAML 96d7ce4f7338 dt-bindings: timer: Add NXP System Timer Module 67b135f96793 Merge branch 'for-linus' into for-next 737898027ddf ARM: dts: microchip: sama7g54_curiosity: Add fixed-partitions for spi-nor flash c86ffc0d331c ARM: dts: microchip: sama7d65: Add RTT timer to curiosity board cb9109d2f17f ARM: dts: microchip: sama7d65: Add RTT and GPBR Support for sama7d65 SoC cb1ae1d11442 ARM: dts: microchip: sama7d65: Add SRAM and DRAM components support a5bda086b593 ARM: dts: microchip: sama7d65_curiosity: add EEPROM 621ce651bf39 ARM: dts: microchip: sama7d65: Add MCP16502 to sama7d65 curiosity 30bf5da5dd65 ARM: dts: microchip: sama7d65: Enable GMAC interface 00eda56f3bad ARM: dts: microchip: sama7d65: Add FLEXCOMs to sama7d65 SoC cd6e1758eecc ARM: dts: microchip: sama7d65: Add gmac interfaces for sama7d65 SoC 5e46b349a198 Merge tag 'v6.15-rc6' into next 12821e764fcc Merge tag 'mediatek-drm-next-20250515' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next f21637ac3d69 riscv: dts: starfive: jh7110-common: bootph-pre-ram hinting needed by boot loader 382ce3ced12b riscv: dts: starfive: jh7110-common: add eeprom node to i2c5 e5e233a1b36f riscv: dts: starfive: jh7110-common: qspi flash setting read-delay 2 cycles max 100MHz 796fcc4bd000 riscv: dts: starfive: jh7110-common: add CPU BUS PERH QSPI clocks to syscrg 3a25610392e1 riscv: dts: starfive: jh7110-common: use macros for MMC0 pins 8d3efdc1a649 riscv: dts: starfive: fml13v01: enable USB 3.0 port 23fae8676f65 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 0cf0323d1114 arm64: dts: rockchip: Improve LED config for NanoPi R5S e3bece005d7b arm64: dts: rockchip: add px30-pp1516 base dtsi and board variants 6a9591a44535 dt-bindings: arm: rockchip: add PX30-PP1516 boards from Theobroma Systems 3e6efd7e76f8 arm64: dts: rockchip: add px30-cobra base dtsi and board variants b42058e5589c dt-bindings: arm: rockchip: add PX30-Cobra boards from Theobroma Systems 76d0d8e00c9a arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneck cb54a264ecdb arm64: dts: rockchip: add basic mdio node to px30 0a0ebebfdd45 arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma with Haikou 97640da1f41d arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 Puma 0fe42d171081 arm64: dts: rockchip: fix internal USB hub instability on RK3399 Puma 53aacaed0ad1 dt-bindings: usb: cypress,hx3: Add support for all variants 17b25bb5d028 dt-bindings: ata: Convert arasan,cf-spear1340 to DT schema a942b710d148 dt-bindings: ata: Convert marvell,orion-sata to DT schema 2b89ce177fad dt-bindings: ata: Convert cavium,ebt3000-compact-flash to DT schema 7452325fd0c4 dt-bindings: ata: Convert apm,xgene-ahci to DT schema 5c3af2fd178e dt-bindings: ata: Convert st,ahci to DT schema 0ed8fb4eda2a ARM: dts: rockchip: add rk3036 usb2phy nodes and enable them on kylin 76b476eca710 arm64: dts: rockchip: move rk3528 i2c+uart aliases to board files 19b80e137230 dt-bindings: Document Tegra264 HDA Support ea2c684c09e7 dt-bindings: Update Tegra194 and Tegra234 HDA bindings c1909afcb360 ASoC: codecs: add support for ES8389 8426194407bf spi: dt-bindings: tegra: Document IOMMU property for Tegra234 QSPI 62ad37f8f2ed dt-bindings: net: snps,dwmac: Align mdio node in example with bindings ef92e3eda5a9 media: dt-bindings: renesas,vsp1: add top-level constraints 95ec73c1eddb media: dt-bindings: renesas,fcp: add top-level constraints b0b60170175f arm64: dts: qcom: x1e80100-hp-elitebook-ultra-g1q: DT for HP EliteBook Ultra G1q c7583d9b7c0c dt-bindings: arm: qcom: Document HP EliteBook Ultra G1q 76902454839f arm64: dts: qcom: x1e80100-hp-omnibook-x14: add sound label a955543d1653 arm64: dts: qcom: sm8650: add the missing l2 cache node cc5e19202270 ARM: dts: qcom: apq8064: link LVDS clocks da97b5b4917b arm64: dts: qcom: x1e001de-devkit: Enable support for both Type-A USB ports d45699c17e6e arm64: dts: qcom: Add industrial mezzanine support for qcs6490-rb3gen2 9b7d10ecf824 arm64: dts: qcom: x1e80100-hp-omnibook-x14: Enable SMB2360 0 and 1 0f8fa5904528 ARM: dts: qcom-msm8960: add missing clocks to the timer node 5f6bbd1d3884 arm64: dts: qcom: ipq5018: enable the download mode support 0bf354f3bdd0 dt-bindings: mfd: qcom,tcsr: Add compatible for ipq5018 6f60724b4f2e arm64: dts: qcom: msm8998-lenovo-miix-630: add Venus node 78729fd6dfe3 arm64: dts: qcom: ipq5018: Enable PCIe d2aedac00e9c arm64: dts: qcom: ipq5018: Add PCIe related nodes 559cb4221c84 arm64: dts: qcom: sm8350: Fix typo in pil_camera_mem node 94419a80d052 arm64: dts: qcom: x1e80100-romulus: Enable DP over Type-C f44415787e7f dt-bindings: cache: add QiLai compatible to ax45mp 08e9a9a39b30 ARM: dts: davinci: da850-evm: Increase fifo threshold ad280853f61b dt-bindings: gpio: tegra186: Add gpio-ranges 7b998eb79596 dt-bindings: mmc: vt8500-sdmmc: Convert to YAML d5a8ccb27d8c dt-bindings: mmc: sdhci-msm: Add the SM7150 compatible fd1a8c37a25c dt-bindings: mmc: fsl,esdhc: add compatible string fsl,ls1021a-esdhc 77ecc38be615 dt-bindings: mmc: mtk-sd: Add support for Dimensity 1200 MT6893 2c24ea1a68a1 dt-bindings: mmc: sdhci-of-dwcmhsc: Add Sophgo SG2044 support 2b3a0861f554 dt-bindings: mmc: arasan,sdhci: Add Renesas RZ/N1D 03a4c81a9ab7 dt-bindings: mmc: renesas,sdhi: Document RZ/V2N support 52e04e847a22 dt-bindings: mmc: marvell,xenon-sdhci: Drop requiring 2 clocks 163995fb1db9 dt-bindings: mmc: marvell,xenon-sdhci: Add reference to sdhci-common.yaml 50c1b5b51bd9 dt-bindings: mmc: marvell,xenon-sdhci: Allow "dma-coherent" and "iommus" 6b9ef3e93796 dt-bindings: mmc: Remove redundant sdhci.txt ea090fe3f0ba arm64: dts: renesas: r9a09g057: Add DMAC nodes 2dc3ede3ee99 dt-bindings: dma: rz-dmac: Document RZ/V2H(P) family of SoCs f17786beeb4b dt-bindings: dma: rz-dmac: Restrict properties for RZ/A1H 4062957c0797 arm64: dts: allwinner: a100: add Liontron H-A133L board support 6cd646345b08 dt-bindings: Document Tegra264 ADMA support c751179c1fed ASoC: dt-bindings: mediatek: Simplify mediatek,clk-provider d133a86545cd regulator: dt-bindings: mt6357: Drop fixed compatible requirement 465ea6ad77e4 riscv: dts: renesas: Add specific RZ/Five cache compatible 40fb609df22a dt-bindings: phy: rockchip,inno-usb2phy: add rk3562 3a0a0b51136f dt-bindings: phy: rockchip,inno-usb2phy: add rk3036 compatible 8ee5033b766d dt-bindings: phy: renesas,usb2-phy: Document RZ/V2H(P) SoC 9b528f755a22 dt-bindings: phy: renesas,usb2-phy: Add clock constraint for RZ/G2L family d24fabd489af dt-bindings: phy: samsung,usb3-drd-phy: add exynos2200 support 9fdcbbd17f0c dt-bindings: phy: add exynos2200 eusb2 phy support 3529480b0e97 dt-bindings: phy: rockchip: Convert RK3399 PCIe PHY to schema 40cec851b166 dt-bindings: phy: imx8mq-usb: add imx95 tuning support 7fff9434c126 dt-bindings: phy: imx8mq-usb: fix fsl,phy-tx-vboost-level-microvolt property ee3f5c78f48f ASoC: dt-bindings: Add Everest ES8389 audio CODEC 00b2fda0a367 dt-bindings: phy: mediatek,tphy: Add support for MT6893 65a55e49f6ac dt-bindings: phy: mediatek,dsi-phy: Add support for MT6893 276d6f9a15b2 ARM: dts: stm32: add initial support for stm32mp157-ultra-fly-sbc board 57ea261308f9 dt-bindings: arm: stm32: Document Ultratronik's Fly board DT binding 44704b414013 dt-bindings: vendor-prefixes: Add Ultratronik 1595ef915c5e arm64: dts: st: use lptimer3 as tick broadcast source on stm32mp257f-ev1 f0c546bfa99d arm64: dts: st: add low-power timer nodes on stm32mp251 1ffad119ccb4 arm64: dts: st: Add SPI NOR flash support on stm32mp257f-ev1 board 12747b4ee44b arm64: dts: st: Add ospi port1 pinctrl entries in stm32mp25-pinctrl.dtsi 02caa1aece88 arm64: dts: st: Add OMM node on stm32mp251 19c508dc3d58 ARM: dts: stm32: support STM32h747i-disco board 9d5ec2c9c5d5 ARM: dts: stm32: add an extra pin map for USART1 on stm32h743 59621a6472cd ARM: dts: stm32: add pin map for UART8 controller on stm32h743 8fe35c381c7c ARM: dts: stm32: add uart8 node for stm32h743 MCU aae9a0192918 dt-bindings: clock: stm32h7: rename USART{7,8}_CK to UART{7,8}_CK 06f64674b332 dt-bindings: arm: stm32: add compatible for stm32h747i-disco board 9a72c83f2e67 ARM: dts: stm32h7-pinctrl: add _a suffix to u[s]art_pins phandles f907d6456095 ARM: dts: st: stm32: Align wifi node name with bindings 11b819c7a67a ARM: dts: stm32: add low power timer on STM32F746 9c62520ce1f6 ARM: dts: stm32: add vrefint support to adc on stm32mp13 1f4bfaf76020 ARM: dts: stm32: add vrefint calibration on stm32mp13 24225621dc54 dt-bindings: phy: rockchip: Convert RK3399 Type-C PHY to schema a74d58d14616 dt-bindings: phy: cadence-torrent: enable PHY_TYPE_USXGMII 0cdc2d006c41 dt-bindings: phy: mtk-xs-phy: support type switch by pericfg 54599aec7dc4 dt-bindings: phy: mtk-xs-phy: Add mt7988 compatible bc3951af24ec dt-bindings: ata: Convert ti,dm816-ahci to DT schema c52df73fb82d riscv: dts: spacemit: add gpio LED for system heartbeat 9ea19a5fd9a0 riscv: dts: spacemit: add gpio support for K1 SoC 99f3d360eac3 riscv: dts: spacemit: Acquire clocks for UART 4a6e0a0058b8 riscv: dts: spacemit: Acquire clocks for pinctrl 76ca3d9c3343 riscv: dts: spacemit: Add clock tree for SpacemiT K1 c439ada53241 dt-bindings: trivial-devices: Add Maxim max30208 094f9976968a dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference 7346cb46c9cc dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema 1a3c8332700b dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema 16a954b6f7cd dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema f140b56fbd3c dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema a36fcbda86fe dt-bindings: interrupt-controller: Convert st,spear3xx-shirq to DT schema fca0cfe246ea dt-bindings: interrupt-controller: Convert snps,dw-apb-ictl to DT schema a129aba3d807 dt-bindings: interrupt-controller: Convert snps,archs-intc to DT schema 3c46f013a4cb dt-bindings: interrupt-controller: Convert snps,archs-idu-intc to DT schema 6d2c252561ae dt-bindings: interrupt-controller: Convert snps,arc700-intc to DT schema 4bd22a347e0c dt-bindings: interrupt-controller: Convert qca,ar7100-misc-intc to DT schema 758a06785fa1 dt-bindings: interrupt-controller: Convert qca,ar7100-cpu-intc to DT schema e8586aed8d6c dt-bindings: interrupt-controller: Convert marvell,odmi-controller to DT schema cd31b6552214 dt-bindings: interrupt-controller: Convert marvell,cp110-icu to DT schema 486280047d47 dt-bindings: interrupt-controller: Convert marvell,ap806-sei to DT schema 257773207f9b dt-bindings: interrupt-controller: Convert marvell,ap806-gicp to DT schema ccf7d0237412 dt-bindings: interrupt-controller: Convert marvell,armada-8k-pic to DT schema 9c0f9b138b59 dt-bindings: interrupt-controller: Convert lsi,zevio-intc to DT schema 6e6f1ad3f4ef dt-bindings: interrupt-controller: Convert jcore,aic to DT schema 68c1ed5d2aae dt-bindings: interrupt-controller: Convert img,pdc-intc to DT schema ed32c7530696 dt-bindings: interrupt-controller: Convert google,goldfish-pic to DT schema 72cb10cd21c0 dt-bindings: interrupt-controller: Convert ezchip,nps400-ic to DT schema 52170bfc0584 dt-bindings: interrupt-controller: Convert csky,mpintc to DT schema 66d63b28d3a5 dt-bindings: interrupt-controller: Convert csky,apb-intc to DT schema 566f66349efe dt-bindings: interrupt-controller: Convert cirrus,ep7209-intc to DT schema e1db76de5df2 dt-bindings: interrupt-controller: Convert brcm,bcm6345-l1-intc to DT schema 9f589c30f9b4 dt-bindings: interrupt-controller: Convert arm,nvic to DT schema 73718cb7e2b8 dt-bindings: interrupt-controller: Convert amazon,al-fic to DT schema b023286f3b16 dt-bindings: interrupt-controller: Convert al,alpine-msix to DT schema 0379a7325124 dt-bindings: interrupt-controller: Convert abilis,tb10x-ictl to DT schema 9dfa70d6da10 dt-bindings: interrupt-controller: Convert microchip,pic32mzda-evic to DT schema e2c7df57fcc2 dt-bindings: interrupt-controller: Convert chrp,open-pic to DT schema a5aa7aa29361 dt-bindings: interrupt-controller: Convert cdns,xtensa-{mx,pic} to DT schema 8c61a1524b88 dt-bindings: interrupt-controller: Convert ti,cp-intc to DT schema fd1686389af0 dt-bindings: interrupt-controller: Convert aspeed,ast2xxx-scu-ic to DT schema 5b9b0407663f dt-bindings: interrupt-controller: Convert aspeed,ast2400-i2c-ic to DT schema f9bbcc9b6c01 dt-bindings: interrupt-controller: Convert faraday,ftintc010 to DT schema 7294b1050582 dt-bindings: interrupt-controller: Convert arm,versatile-fpga-irq to DT schema 649b5c8621b8 dt-bindings: interrupt-controller: Convert marvell,orion-bridge-intc to DT schema 734c54291c99 dt-bindings: interrupt-controller: Convert brcm,bcm2835-armctrl-ic to DT schema 664ccaddb8c7 dt-bindings: interrupt-controller: Convert cnxt,cx92755-ic to DT schema 0ea75feee1fc dt-bindings: Move altr,msi-controller to interrupt-controller directory 6495e4ed6240 dt-bindings: display: msm: correct example in SM8350 MDSS schema 5b9ad5a2dfdd ARM: dts: rockchip: Sonoff-iHost: correct IO domain voltages 9769e597df87 ARM: dts: rockchip: Sonoff-iHost: adjust SDIO for stability cfc9b15d5a11 arm64: dts: qcom: qcs615: add QCrypto nodes 9c0b672d1a26 ARM: dts: qcom: apq8064: move replicator out of soc node b8fdb42c3ef8 ARM: dts: qcom: apq8064: use new compatible for SPS SIC device ff32b336f170 ARM: dts: qcom: apq8064: use new compatible for SFPB device 6bc1bbe5e284 ARM: dts: qcom: apq8064 merge hw splinlock into corresponding syscon device 97c58abad644 ARM: dts: qcom: apq8064: add missing clocks to the timer node 588277158131 ARM: dts: qcom: apq8064-lg-nexus4-mako: Enable WiFi c38f33d12773 dt-bindings: remoteproc: qcom,sm8150-pas: Add missing SC8180X compatible 0e18b8f3302e dt-bindings: remoteproc: qcom,sm8350-pas: Add SC8280XP 8b2b4a3d2f48 arm64: dts: qcom: qcm6490-fairphone-fp5: Add DisplayPort sound support d4442f6cb5b5 arm64: dts: qcom: sa8775p: Add default pin configurations for QUP SEs d80b5d5eb446 arm64: dts: qcom: sm8550: add iris DT node 440474042b22 arm64: dts: qcom: sm8750: Add LLCC node 52b421406179 dt-bindings: cache: Convert marvell,tauros2-cache to DT schema c9a46662587b dt-bindings: cache: Convert marvell,{feroceon,kirkwood}-cache to DT schema c5ded6da00b3 Merge tag 'ib-mfd-gpio-nvmem-v6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd into gpio/for-next 4c5098982fc0 dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs8300 e5f1fdf5993a dt-bindings: pinctrl: qcom: correct gpio-ranges in examples for qcs615 d4bb52b1a986 dt-bindings: mfd: stm32-lptimer: Add support for stm32mp25 625ca4337c13 dt-bindings: arm: sunxi: Add Liontron H-A133L board name f04a227e17cd dt-bindings: vendor-prefixes: Add Liontron name bfe02c5509da ARM: dts: bananapi: add support for PHY LEDs c38080e2bde0 arm64: dts: exynos: gs101: add pmu-intr-gen syscon node aaaa3d2d975d dt-bindings: soc: samsung: exynos-pmu: gs101: add google,pmu-intr-gen phandle 60e3d8f854d2 dt-bindings: soc: google: Add gs101-pmu-intr-gen binding documentation de42c4f36861 Merge 6.15-rc6 into usb-next 07f7e9376270 dt-bindings: vertexcom-mse102x: Fix IRQ type in example 58b1a45e9a93 dt-bindings: net: renesas-gbeth: Add support for RZ/V2N (R9A09G056) SoC 52ca9c9ddc70 dt-bindings: cache: qcom,llcc: Document SM8750 LLCC block 025a2913e06b arm64: dts: fvp: Add ETE and TRBE nodes for Rev C model 5ad508ce1d56 arm64: dts: arm: Drop the clock-frequency property from timer nodes 25d74c506801 arm64: dts: fvp: Reserve 64MB for the FF-A firmware in memory map 9e9e8b5cf5a6 arm64: dts: fvp: Add CPU idle states for Rev C model f473d29f366e arm64: dts: fvp: Add system timer for broadcast during CPU idle 007cc6992f97 dt-bindings: hwmon: Add bindings for mpq8785 driver 76523dbde424 dt-bindings: Add SQ52206 to ina2xx devicetree bindings 6c8240f637d2 dt-bindings: display/msm: hdmi: Fix constraints on additional 'port' properties 85f8e9ee5faf dt-bindings: display/msm/hdmi: drop obsolete GPIOs from schema fdfcf09cd00d dt-bindings: allwinner: add H616 DE33 clock binding b972073fb318 dt-bindings: cache: add specific RZ/Five compatible to ax45mp 0298beca0879 Merge tag 'imx-dt64-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt f2bb39101a3b Merge tag 'imx-dt-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt 6c162beac92a Merge tag 'imx-bindings-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt 3ee6d99dd050 Merge tag 'omap-for-v6.16/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt 3f5fa91e9e2d ARM: dts: vt8500: list all four timer interrupts 1f83cca57612 ARM: dts: vt8500: add DT nodes for the system config ID register 6c470fc07949 ARM: dts: vt8500: Add VIA APC Rock/Paper board febd1ce7bd7c dt-bindings: arm: vt8500: Add VIA APC Rock/Paper boards 95f9c7c6dc87 Merge branch 'arm32-for-6.15' into arm32-for-6.16 c8676402f0c1 arm64: dts: qcom: sdm845-xiaomi-beryllium-ebbg: introduce touchscreen support ab71f552530b arm64: dts: qcom: sdm845-xiaomi-beryllium-tianma: introduce touchscreen support d3b7b1cd4294 arm64: dts: qcom: sdm845-xiaomi-beryllium-common: add touchscreen related nodes be86327be1f6 arm64: dts: qcom: qcs8300: add the pcie smmu node d1df8506d7f8 dt-bindings: arm: qcom,ids: add SoC ID for SM8750 aa1565085185 arm64: dts: qcom: x1e80100-*: Drop useless DP3 compatible override 13c97c62e922 ARM: dts: qcom: msm8226-motorola-falcon: specify vddio_disp output voltage 133d8def9bb5 ARM: dts: qcom: msm8226-motorola-falcon: limit TPS65132 to 5.4V 891fc76ba245 ARM: dts: qcom: msm8226-motorola-falcon: add I2C clock frequencies e69bb23d6f80 ARM: dts: qcom: msm8226-motorola-falcon: add clocks, power-domain to simpleFB 9fe2e9dfcb24 arm64: dts: rockchip: drop wrong spdif clock from edp1 on rk3588 5141e453466a arm64: dts: rockchip: Add RK3562 evb2 devicetree 20bdf0cc35a8 arm64: dts: rockchip: add core dtsi for RK3562 SoC e228bf1a80cf dt-bindings: input: convert dlg,da7280.txt to dt-schema 3958d8fa0b1f arm64: dts: qcom: msm8953: Add interconnects fe42f0e4c34a arm64: dts: qcom: msm8953: Add uart_5 574d98f8dc8f arm64: dts: qcom: sm8350: Use q6asm defines for reg 1ece6dc8a89e arm64: dts: qcom: sm7325-nothing-spacewar: Use q6asm defines for reg 0c54cbe1b4a1 arm64: dts: qcom: sdm850*: Use q6asm defines for reg 90aef0299579 arm64: dts: qcom: sdm845*: Use q6asm defines for reg b7b96192306a arm64: dts: qcom: sc7280: Use q6asm defines for reg f61e104f90f9 arm64: dts: qcom: sc7180-acer-aspire1: Use q6asm defines for reg 7630b69ba5ed arm64: dts: qcom: qrb5165-rb5: Use q6asm defines for reg e10687993363 arm64: dts: qcom: msm8996*: Use q6asm defines for reg 34723a48b744 arm64: dts: qcom: msm8953: Use q6asm defines for reg f836b37531ba arm64: dts: qcom: msm8916-modem-qdsp6: Use q6asm defines for reg d20576ba16ab arm64: dts: qcom: apq8096-db820c: Use q6asm defines for reg 4fe4605f0189 arm64: dts: qcom: qcm6490-fairphone-fp5: Hook up DisplayPort over USB-C 19532936991f arm64: dts: qcom: qcm6490-fairphone-fp5: Add OCP96011 audio switch 4816893c07b5 arm64: dts: qcom: qcm6490-fairphone-fp5: Add PTN36502 redriver e21032020eb3 dt-bindings: clock: add SM6350 QCOM video clock bindings 963a57d1a640 arm64: dts: qcom: sm6350: Align reg properties with latest style a6498df45f67 arm64: dts: qcom: sc7280: Stop setting dmic01 pinctrl for va-macro f575876f8adf arm64: dts: qcom: x1e80100: Add OPPs up to Turbo L3 for GPU 28999942677d arm64: dts: qcom: x1e80100: Add ACD levels for GPU 134ab78d697d spi: dt-bindings: nuvoton,wpcm450-fiu: Drop unrelated nodes from DTS example 6c96065aa8cb spi: dt-bindings: fsl,dspi: Fix example indentation b2c36c9410e6 dt-bindings: arm: rockchip: Add rk3562 evb2 board 1a6745865a66 dt-bindings: soc: rockchip: Add rk3562 syscon compatibles 11bb268f9698 dt-bindings: rockchip: pmu: Add rk3562 compatible c6c0fbd0b465 arm64: dts: rockchip: Enable Ethernet controller on Radxa E20C 882f3957a39f arm64: dts: rockchip: Add GMAC nodes for RK3528 878d50ae8ece Merge tag 'tegra-for-6.16-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt 9935f8964201 Merge tag 'tegra-for-6.16-arm64-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt 27648c567dd3 dt-bindings: PCI: Convert v3,v360epc-pci to DT schema 720f8541f5da dt-bindings: clock: sun50i-h616-ccu: Add LVDS reset 6f75843afb57 dt-bindings: gpu: mali-bifrost: Add compatible for RZ/V2N SoC eb155080b68f dt-bindings: soc: qcom: qcom,rpm: add missing clock/-names properties b9554cc578d9 dt-bindings: soc: qcom,rpm: add missing clock-controller node 599b2c9eda58 Merge tag 'tegra-for-6.16-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt ae1e35821ad4 Merge tag 'memory-controller-drv-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers 9cb0a9935a2e Merge tag 'memory-controller-drv-renesas-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers e3b2e5a3cafd Merge tag 'scmi-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers 593a164161fe Merge tag 'mtk-soc-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers 6ac9a220784a Merge tag 'samsung-drivers-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers 1e29760150ff Merge tag 'v6.16-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt 3af4a1919ecf Merge tag 'v6.16-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt 7da1d84ce8a9 Merge tag 'asahi-soc-dt-6.16' of https://github.com/AsahiLinux/linux into soc/dt 859f06fdd36e Merge tag 'arm-soc/for-6.16/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt 9b1d4cdc396e Merge tag 'arm-soc/for-6.16/devicetree' of https://github.com/Broadcom/stblinux into soc/dt ea0f80a223b4 Merge tag 'renesas-dts-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt 2754fead3c67 Merge tag 'renesas-dts-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt ee1cbe4b8690 Merge tag 'renesas-dt-bindings-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt 9172333f1c36 Merge tag 'socfpga_dts_updates_for_v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt 65945ed4ecf7 ARM: dts: vt8500: use correct ohci/ehci node names db3d273ea6dd ARM: dts: ti: omap: use correct ohci/ehci node names 29098c0b2750 ARM: dts: st: use correct ohci/ehci node names f2573fbf2983 ARM: dts: nxp: lpc: use correct ohci/ehci node names 6818afe8c49c ARM: dts: marvell: use correct ohci/ehci node names 73262063f45d arm64: dts: rockchip: add Rock 5B+ 7909790b5192 dt-bindings: arm: rockchip: Add Radxa ROCK 5B+ 4238190b0f49 arm64: dts: rockchip: move rock 5b to include file ef9fc0fca3cc arm64: dts: rockchip: Add rk3399-evb-ind board 24335e68a617 dt-bindings: arm: rockchip: Add rk3399 industry evaluation board a5d824bc4857 arm64: dts: rockchip: Enable HDMI audio on Sige5 5915b8ba5ff7 arm64: dts: rockchip: Add analog audio on RK3576 Sige5 cfa4fa721fc4 arm64: dts: rockchip: Add RK3576 HDMI audio cd275a639ae9 arm64: dts: rockchip: Add RK3576 SAI nodes 66849b21618c arm64: dts: rockchip: Enable SD-card interface on Radxa E20C 4674d377180c arm64: dts: rockchip: Add SDMMC/SDIO controllers for RK3528 24c4ac403174 Merge branch 'v6.16-shared/clkids' into v6.16-armsoc/dts64 1f0210a2d1c9 ARM: dts: amlogic: meson8-fernsehfee3: Describe regulators f2d00ba732ef ARM: dts: amlogic: Add TCU Fernsehfee 3.0 503326d77770 dt-bindings: arm: amlogic: Add TCU Fernsehfee 3.0 board 049bdf8c194c dt-bindings: vendor-prefixes: Add TC Unterhaltungselektronik AG b987dfc06d4e dt-bindings: reset: Add compatible for Amlogic A4/A5 Reset Controller ad8117c16a75 ARM: dts: mxs: use padconfig macros 3c692a3cd472 arm64: dts: freescale: Add PHYTEC phyBOARD-Nash-i.MX93 support 44179fccbf35 bindings: arm: fsl: Add PHYTEC phyBOARD-Nash-i.MX93 board 58b8e29378d4 arm64: dts: freescale: imx8mp-toradex-smarc: use generic gpio node name 955a4e348a47 arm64: dts: freescale: imx8mp-toradex-smarc: add gpio expander 1a275a3d9d35 arm64: dts: freescale: imx8mp-toradex-smarc: add embedded controller 1783722ca70f arm64: dts: freescale: imx8mp-toradex-smarc: add fan PWM configuration f2e560c30759 arm64: dts: imx93-tqma9352-mba91xxca: disable Open Drain for MDIO 49e05d4dcb41 dt: bindings: arm: add bindings for TQMa95xxSA c4ede310e854 arm64: dt: imx95: Add TQMa95xxSA 3f51af4e9314 ARM: dts: imx7d: update opp-table voltages faa7b0f09960 dt-bindings: mfd: Add max77759 binding adb36b1583dc dt-bindings: nvmem: Add max77759 binding 626e4d4c2dd1 dt-bindings: gpio: Add max77759 binding 59579e8080e7 ARM: dts: nxp: Align wifi node name with bindings a57498324c33 arm64: dts: imx: Align wifi node name with bindings dda8571e68ba arm64: dts: freescale: add initial device tree for TQMa8XxS 420ccf352c88 dt-bindings: arm: add TQMa8XxS boards 2c22f0454dbc arm64: dts: imx8mp-tqma8mpql-mba8mp-ras314: Add Raspberry Pi Camera V2 overlay 8e30973098b1 arm64: dts: freescale: Add minimal dts support for imx943 evk b7f8b9829627 arm64: dts: freescale: Add basic dtsi for imx943 b171f67469ba dt-bindings: arm: fsl: add i.MX943 EVK board 51a46f724ce6 arm64: dts: ti: k3-j722s-evm: Add overlay for TEVI OV5640 0b98d867cbe7 arm64: dts: ti: k3-j722s-evm: Add overlay for quad IMX219 f02ee6932e03 arm64: dts: ti: j722s-evm: Add MUX to control CSI2RX 5015bfcb82cc arm64: dts: ti: j722s-evm: Add DT nodes for power regulators ec097bc51325 arm64: dts: ti: k3-am62a-phycore-som: Reserve main_timer2 for C7x DSP b8c5a617d6bc arm64: dts: ti: k3-am62a-phycore-som: Reserve main_rti4 for C7x DSP 3031c3fe18db arm64: dts: ti: k3-am62a-phycore-som: Enable Co-processors 739cbc1d54d9 arm64: dts: ti: k3-am62-phycore-som: Enable Co-processors c02b9c9cefdf arm64: dts: ti: k3-am62x-phyboard-lyra-gpio-fan: Update cooling maps a615712406dd arm64: dts: ti: k3-am62a: Enable CPU freq throttling on thermal alert e39e8901b8f9 arm64: dts: ti: k3-j721e-common-proc-board: Enable OSPI1 on J721E 74294f5566ae arm64: dts: imx8-colibri: Add PCIe support 62b02d402a77 arm64: dts: freescale: imx93-phyboard-segin: Order node alphabetically a6acee4ac52a arm64: dts: freescale: imx93-phyboard-segin: Add EQOS Ethernet 1d0d44116304 arm64: dts: freescale: imx93-phyboard-segin: Add I2S audio f0fea5510d92 arm64: dts: freescale: imx93-phyboard-segin: Add USB support a2cf356b1399 arm64: dts: freescale: imx93-phyboard-segin: Add CAN support 7a1af769f159 arm64: dts: freescale: imx93-phyboard-segin: Add RTC support f7809266a2ee arm64: dts: freescale: imx93-phyboard-segin: Set CMD/DATA SION bit to fix ERR052021 7206d2882315 arm64: dts: freescale: imx93-phyboard-segin: Fix SD-card pinctrl b2469f6146c6 arm64: dts: freescale: imx93-phyboard-segin: Disable SD-card write-protect 5b40838286a0 arm64: dts: freescale: imx93-phyboard-segin: Drop eMMC no-1-8-v flag 073a3258de8c arm64: dts: freescale: imx93-phycore-som: Add eMMC no-1-8-v by default 745f39b81f20 arm64: dts: freescale: imx93-phycore-som: Enhance eMMC pinctrl 6b1bf8706c84 arm64: dts: freescale: imx93-phycore-som: Disable LED pull-up 767f031ca462 arm64: dts: freescale: imx93-phycore-som: Add EEPROM support d562521d7664 arm64: dts: freescale: imx93-phycore-som: Add PMIC support 744b873154a9 media: dt-bindings: Add amlogic,c3-isp.yaml 1f1824e8d41c media: dt-bindings: Add amlogic,c3-mipi-adapter.yaml 2a83b3a89adf media: dt-bindings: Add amlogic,c3-mipi-csi2.yaml bfb60c429ab7 Add RZ/G3E xSPI support 6bc5ca9e9e31 arm64: dts: add imx8mp-libra-rdk-fpsc LVDS panel overlay bb5fe43bf772 arm64: dts: add imx8mp-libra-rdk-fpsc board 6d47c5101c87 dt-bindings: arm: add imx8mp-libra-rdk-fpsc 34d5fc0c469e arm64: tegra: Wire up CEC to devkits b4122e423095 arm64: tegra: Add CEC controller on Tegra210 81403688d54d arm64: tegra: Add fallback CEC compatibles 860a0306e7cb media: dt-bindings: Document Tegra186 and Tegra194 cec 814cf0ca9673 ARM: tegra: apalis-eval: Remove pcie-switch node 7336f5eff07b arm64: tegra: Add uartd serial alias for Jetson TX1 module 773a698cffd0 arm64: tegra: Bump #address-cells and #size-cells on Tegra186 6eb9ab33c1ca arm64: tegra: p2180: Explicitly enable GPU 97a72f63b02b arm64: tegra: p3310: Explicitly enable GPU dc394ae50b15 arm64: tegra: Add DMA properties for Tegra186 and Tegra194 UARTs 0c8116fdf82b arm64: tegra: Drop remaining serial clock-names and reset-names cf8710c05237 arm64: tegra: Enable PWM fan on the Jetson TX2 Devkit 10909b6e7512 arm64: tegra: Enable PWM fan on the Jetson TX1 Devkit 6c62747d11ae ARM: tegra: Add device-tree for ASUS Transformer Pad LTE TF300TL 45ff634f62bd dt-bindings: arm: tegra: Add Asus Transformer Pad TF300TL 17f175deb9ee dt-bindings: arm: tegra: Group Tegra30 based ASUS Transformers 45c2549c2180 dt-bindings: interrupt-controller: Convert nvidia,tegra20-ictlr to DT schema f732c059581d arm64: tegra: Add I2C aliases for Tegra234 2275ec7fcdcb arm64: tegra: Configure QSPI clocks and add DMA 5bbc2a8c5070 dt-bindings: dma: nvidia,tegra20-apbdma: convert text based binding to json schema 2af32339da6c ARM: tegra: Rename the apbdma nodename to match with common dma-controller binding 5604f94f1d7b dt-bindings: clock: rk3036: add SCLK_USB480M clock-id f929318ed0ef ARM: dts: renesas: r9a06g032-rzn1d400-eb: Enable USB host port 358563053427 ARM: dts: renesas: r9a06g032-rzn1d400-db: Add pinmux for the CPLD 075b685b47f4 arm64: dts: renesas: white-hawk-single: Improve Ethernet TSN description 9e2e4c5571be ARM: dts: renesas: r9a06g032-rzn1d400-db: Enable USB device port b0a3caca0471 ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe 9-pin D-sub serial port e4e1d7312e3a arm64: dts: renesas: beacon-renesom: Align wifi node name with bindings f0ce8327c980 arm64: dts: renesas: rzg2l-smarc: Enable GPT on carrier board e2a02100e30b arm64: dts: renesas: r9a07g054: Add GPT support b745dbf0e8d0 arm64: dts: renesas: r9a07g044: Add GPT support 02e6b1b121fc arm64: dts: renesas: sparrow-hawk: Add MSIOF Sound support 9d4b51f0467a ARM: dts: renesas: r9a06g032-rzn1d400-eb: Add GMAC1 port 0522e8351f89 Merge tag 'renesas-r9a09g047-dt-binding-defs-tag3' into renesas-clk-for-v6.16 01db475996bf dt-bindings: clock: renesas,r9a09g047-cpg: Add XSPI and GBETH PTP core clocks 9aab5b0dd0ce dt-bindings: riscv: Add xsfvfwmaccqqq ISA extension description 871364b29b15 dt-bindings: riscv: Add xsfvfnrclipxfqf ISA extension description f6dd93536c85 dt-bindings: riscv: Add xsfvqmaccdod and xsfvqmaccqoq ISA extension description 01794edd9948 dt-bindings: clock: Add GRF clock definition for RK3528 dd0175a5cb33 arm64: dts: rockchip: Move rk3568 PCIe3 MSI to use GIC ITS 49deec21e26c arm64: dts: rockchip: Update eMMC for NanoPi R5 series e9d28cbe7969 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net a33a192ad701 dt-bindings: display: panel: Add Novatek NT37801 76b3a3804dd7 dt-bindings: display: panel: convert truly,nt35597.txt to dt-schema 14bbe9563987 ARM: dts: am335x: Set wakeup-source for UART0 46060816b6be dt-bindings: mux: add optional regulator binding to gpio mux 0a5ec97f672c riscv: dts: thead: Add device tree VO clock controller 5a3d46ddd366 dt-bindings: clock: thead: Add TH1520 VO clock controller 0bac955e720a dt-bindings: arm: qcom: Add SM7150 Google Pixel 4a e5487155fa85 ARM: dts: qcom: ipq4019: Drop redundant CPU "clock-latency" 3b45cd0540a8 dt-bindings: PCI: pci-ep: Add support for iommu-map and msi-map 85e37e6a8a00 arm64: dts: allwinner: a100: set maximum MMC frequency 71610c8f6573 dt-bindings: memory-controllers: Add STM32 Octo Memory Manager controller 4a6f85f46c97 arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-rock3c 27cb7181fa25 arm64: dts: qcom: msm8939: Drop generic UART pinctrl templates 0299a80853e3 arm64: dts: qcom: msm8916: Drop generic UART pinctrl templates f7626223fbef arm64: dts: qcom: msm8916-motorola: Use UART1 console pinctrl bc047fb23c7e arm64: dts: qcom: msm8919/39: Use UART2 console pinctrl where appropriate 82a1d0626f30 arm64: dts: qcom: msm8916/39: Introduce new UART console pinctrl 9671fb87cd7a arm64: dts: qcom: msm8916/39: Move UART pinctrl to board files 7ae4d81f0acd arm64: dts: qcom: x1e80100: Fix PCIe 3rd controller DBI size 21a18efb9369 arm64: dts: qcom: x1e/x1p: Add EL2 overlay for WoA devices b08db9175aea arm64: dts: qcom: x1e80100: Add PCIe IOMMU aa60c3acb06a arm64: dts: qcom: sc8280xp: Add EL2 overlay for WoA devices 83b237618bf2 arm64: dts: qcom: sc8280xp: Add PCIe IOMMU 665f9564abc0 arm64: dts: qcom: sc7180: Add EL2 overlay for WoA devices 87b448b47006 dt-bindings: interrupt-controller: Convert openrisc,ompic to DT schema a2901e9860d9 Merge tag 'wireless-next-2025-05-06' of https://git.kernel.org/pub/scm/linux/kernel/git/wireless/wireless-next 90076255cd0e This patch set did some clean up and add runtime pm 2a73fae0eef7 dt-bindings: soc: sophgo: add RTC support for Sophgo CV1800 series db6d6e0cc454 dt-bindings: clock: sophgo: add clock controller for SG2044 4f7b03443bcf dt-bindings: soc: sophgo: Add SG2044 top syscon device 411ad66f6c87 dt-bindings: clock: sophgo: Use precise compatible for CV1800 series SoC e6cfd7fc83e3 dt-bindings: clock: Drop st,stm32h7-rcc.txt c05f831cb19b dt-bindings: clock: convert bcm2835-aux-clock to yaml 3eb3880ced4d dt-bindings: clock: Drop maxim,max77686.txt d11740d0cb1c arm64: dts: qcom: x1e001de-devkit: Fix pin config for USB0 retimer vregs a3c4d35cf2d0 arm64: dts: qcom: x1e001de-devkit: Describe USB retimers resets pin configs e8a588366b40 arm64: dts: qcom: x1e80100-qcp: Fix vreg_l2j_1p2 voltage b2fd69366c77 arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: Fix vreg_l2j_1p2 voltage 73d93d5bd92c arm64: dts: qcom: x1e80100-hp-omnibook-x14: Fix vreg_l2j_1p2 voltage b1458d47b907 arm64: dts: qcom: x1e80100-asus-vivobook-s15: Fix vreg_l2j_1p2 voltage 3d4bc8f706a7 arm64: dts: qcom: x1e001de-devkit: Fix vreg_l2j_1p2 voltage 02a3d15ce9d1 arm64: dts: qcom: x1-crd: Fix vreg_l2j_1p2 voltage f50e1070cfe1 arm64: dts: qcom: sc7280: add UFS operating points 36a66deea079 dt-bindings: arm: qcom: Add Asus Zenbook A14 388cf04293fc arm64: dts: qcom: qcs8300: Add cpufreq scaling node 2770dfb61311 arm64: dts: qcom: sda660-ifc6560: Fix dt-validate warning ff4c18346f89 arm64: dts: qcom: sdm660-lavender: Add missing USB phy supply 41ddc955d99c arm64: dts: qcom: sdm630: Add modem metadata mem 5e1d302c47f2 arm64: dts: ipq6018: drop standalone 'smem' node 935bb6b903f7 dt-bindings: input: touchscreen: edt-ft5x06: use unevaluatedProperties 19170f83f4d6 dt-bindings: interrupt-controller: Convert opencores,or1k-pic to DT schema a813b7184209 dt-bindings: media: convert imx.txt to yaml format f036436d4e3a arm64: dts: ti: k3-j721s2: Add GPU node 05217f9f363a arm64: dts: ti: k3-am62: New GPU binding details e3b4871cc54c arm64: dts: ti: k3-am62-main: Add PRUSS-M node f21fd9e2b809 arm64: dts: ti: k3-am64: Reserve timers used by MCU FW 7554d6edc067 arm64: dts: ti: k3-am62a7-sk: Reserve main_rti4 for C7x DSP 9c7c2c426a28 arm64: dts: ti: k3-am62a7-sk: Reserve main_timer2 for C7x DSP 4dc654f3ea4f arm64: dts: ti: k3-am62x-sk-common: Enable IPC with remote processors ccd74102c419 arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors 2cf6f198463c arm64: dts: ti: k3-am62a7-sk: Enable IPC with remote processors d115e1eada3e arm64: dts: ti: k3-am62a-main: Add C7xv device node 87d1a5e90b69 arm64: dts: ti: k3-am62a-wakeup: Add R5F device node 349f1d769bb6 arm64: dts: ti: k3-am62a-mcu: Add R5F remote proc node e74c39a60ea5 arm64: dts: ti: k3-am62-wakeup: Add wakeup R5F node 6c2036041051 arm64: dts: ti: k3-am62: Add ATCM and BTCM cbass ranges 776ccc66e63e arm64: dts: ti: k3-am625-beagleplay: Add required voltage supplies for TEVI-OV5640 ad3ac0dd79a7 arm64: dts: ti: k3-am625-beagleplay: Add required voltage supplies for OV5640 165924ec0e5a arm64: dts: ti: k3-am62x: Add required voltage supplies for TEVI-OV5640 57f7626a30df arm64: dts: ti: k3-am62x: Add required voltage supplies for OV5640 ea8502a760f3 arm64: dts: ti: k3-am62x: Add required voltage supplies for IMX219 5a11adf3759f arm64: dts: ti: k3-am62p5-sk: Add regulator nodes for AM62P 557dca1160b4 media: dt-bindings: sony,imx290: Update usage example 2f12e85b926d media: dt-bindings: sony,imx415: update maintainer e-mail address 465494fa972e arm64: dts: mt6359: Add missing 'compatible' property to regulators node dadfed8c1931 arm/arm64: dts: mediatek: Add missing "#sound-dai-cells" to linux,bt-sco 5ae022ae9660 arm64: dts: mediatek: mt8390-genio-common: Set ssusb2 default dual role mode to host 6eba789bfdbd arm64: dts: mediatek: mt8395-genio-1200-evk: Disable unused backlight 4feac5571d3c arm64: dts: mediatek: mt6357: Drop regulator-fixed compatibles 856c2b05f9e9 arm64: dts: rockchip: Enable regulators for Radxa E20C b7970c3a509b arm64: dts: rockchip: Add pwm nodes for RK3528 9537ebf0af18 media: dt-bindings: Add ST VD55G1 camera sensor 2270d79148b6 media: dt-bindings: Add ST VD56G3 camera sensor 1acf6a10e0c2 media: dt-bindings: Add OmniVision OV02C10 711f90dc2821 Merge drm/drm-next into drm-misc-next 1ea0f9e44221 BackMerge tag 'v6.15-rc5' into drm-next 0c67bd9ea5e2 AsoC: Phase out hybrid PCI devres 4249e9eeb523 arm64: dts: rockchip: Add onboard EEPROM for Radxa E20C f1835c1d3102 arm64: dts: rockchip: Add I2C controllers for RK3528 9124dcd6b6ca dt-bindings: clock: rk3576: add IOC gated clocks 195ab4f8a4fd arm64: tegra: tegra210-p2894: Align GPIO hog node name with preferred style 9b87fa574f97 arm64: dts: bcm: Add reference to RPi 2 (2nd rev) 7fc72ab2aa49 ARM: dts: bcm: Add support for Raspberry Pi 2 (2nd rev) 8d7e910606f3 dt-bindings: arm: bcm2835: Add Raspberry Pi 2 (2nd rev) 79860f59b8ce dt-bindings: reset: sophgo: Add SG2044 bindings. 0f5d34937143 dt-bindings: reset: Document RZ/V2H(P) USB2PHY reset 25cfcb091747 arm64: dts: rockchip: add RK3576 RNG node 7500df32a633 arm64: dts: amlogic: Add A5 Reset Controller 06a6f9e68bb5 arm64: dts: amlogic: Add A4 Reset Controller 5526b16a2902 arm64: dts: amlogic: add support for xiaomi-aquaman/Mi TV Stick 41bcfded41fb dt-bindings: arm: amlogic: add S805Y and Mi TV Stick 89e5c3f0d82f arm64: dts: amlogic: gxl: set i2c bias to pull-up 42dec1aa5d48 dt-bindings: rng: rockchip,rk3588-rng: add rk3576-rng compatible b47e9a75a1f5 arm64: dts: renesas: r9a09g047e57-smarc: Enable CAN Transceiver 4f4bdff8036a arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD 4948f0e037d7 arm64: dts: renesas: r9a09g047: Add CANFD node ca3cc0b21e41 arm64: dts: rockchip: Switch to undeprecated qcom,calibration-variant on RK3399 b6eaa60c5b68 arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-quartz64-b a811ecd47f98 arm64: dts: rockchip: Add phy-supply to gmac0 on NanoPi R5S 92db0f57859b ARM: dts: rockchip: enable Mali gpu on rk3066 marsboard af638cbdc9f4 ARM: dts: rockchip: enable hdmi on rk3066 marsboard e5ed6360a0bb Revert "ARM: dts: rockchip: drop grf reference from rk3036 hdmi" e8e08fa436aa ARM: dts: rockchip: Add ref clk for hdmi 8f6e1742dc0d dt-bindings: display: panel: Add BOE TD4320 fe3f772e4234 Merge git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux v6.15-rc5 295a83cac5a6 dt-bindings: hwinfo: Add VIA/WonderMedia SoC identification dfebd1da805d dt-bindings: opp: Add v2-qcom-adreno vendor bindings 008f0861616f dt-bindings: display: rockchip,inno-hdmi: Document GRF for RK3036 HDMI b6f43ec6014d dt-bindings: display: rockchip,inno-hdmi: Fix Document of RK3036 compatible e066fecec49c dt-bindings: display: ltk500hd1829: add port property aac56bec913a dt-bindings: display: ltk050h3146w: add port property 2679eb9c1099 arm64: dts: allwinner: t527: add EMAC0 to Avaota-A1 board a84e9b1ef511 arm64: dts: allwinner: a527: add EMAC0 to Radxa A5E board d67d653027ac arm64: dts: allwinner: a523: Add EMAC0 ethernet MAC 2c2285f92bd4 dt-bindings: sram: sunxi-sram: Add A523 compatible 906efd1c226c dt-bindings: pwm: add support for MC33XS2410 c45f7825b9a3 arm64: dts: ti: k3-am65-main: Add missing taps to sdhci0 abfe507190c9 arm64: dts: ti: k3-am62p-j722s-common-main: Set eMMC clock parent to default 05be23aa2598 arm64: dts: ti: k3-am62a-main: Set eMMC clock parent to default d7281ad6c7f0 arm64: dts: ti: k3-am62-main: Set eMMC clock parent to default 5d554875ee67 arm64: dts: ti: am62p-verdin: Add ivy 5910df5fae25 arm64: dts: ti: am62p-verdin: Add yavia c56788f3dc13 arm64: dts: ti: am62p-verdin: Add mallow 26225792edf9 arm64: dts: ti: am62p-verdin: Add dahlia d2963aa25b8d arm64: dts: ti: Add Toradex Verdin AM62P 9f3a0c2c8544 dt-bindings: arm: ti: Add Toradex Verdin AM62P 0e1a2f9ae270 arm64: dts: ti: k3-j784s4-j742s2-evm-common: Enable ACSPCIE0 output for PCIe1 38b84d8c08ed arm64: dts: ti: k3-j784s4-j742s2-main-common: Add ACSPCIE0 node db5f03dc9cc5 arm64: dts: ti: k3-j784s4-j742s2-main-common: Switch to 64-bit address space for PCIe0 and PCIe1 15243bd3bb0f arm64: dts: ti: k3-j722s-main: Switch to 64-bit address space for PCIe0 1ccd5d5c0b25 arm64: dts: ti: k3-j721s2-main: Switch to 64-bit address space for PCIe1 b45b19421146 arm64: dts: ti: k3-j721e-main: Switch to 64-bit address space for PCIe0 and PCIe1 c58f019a0643 arm64: dts: ti: k3-j721e: Add ranges for PCIe0 DAT1 and PCIe1 DAT1 ac9f688b927f arm64: dts: ti: k3-j7200-main: Switch to 64-bit address space for PCIe1 8c1c5e3952fe arm64: dts: ti: k3-am64-main: Switch to 64-bit address space for PCIe0 9bd6216a75f9 arm64: dts: ti: k3-am6*: Remove disable-wp for eMMC 9391e35a9961 arm64: dts: ti: k3-am62*: Add non-removable flag for eMMC efc9013586bd arm64: dts: ti: k3-am6*: Add boot phase flag to support MMC boot 20228e421df8 dt-bindings: media: renesas,isp: Add ISP core function block 0d57e67f6fd1 dt-bindings: media: qcom,sm8550-iris: document QCS8300 IRIS accelerator 929624534b09 dt-bindings: media: qcom,sm8550-iris: document SM8650 IRIS accelerator dfd2223ffa4c dt-bindings: arm: psci: change labels to lower-case in example 733d55025477 dt-bindings: net: via-rhine: Convert to YAML 2e15a84f751b dt-bindings: display: msm: document DSI controller and phy on SA8775P f7cce69098b3 dt-bindings: msm: dsi-controller-main: document the SA8775P DSI CTRL 0dfaeb000391 dt-bindings: display: msm-dsi-phy-7nm: document the SA8775P DSI PHY afd72e545768 dt-bindings: display: msm: sm8350-mdss: Describe the CPU-CFG icc path 4a36951513b4 dt-bindings: display/msm: Add Qualcomm SAR2130P 4efeb8748c14 dt-bindings: net: sun8i-emac: Add A523 EMAC0 compatible e5b81042e489 dt-bindings: display/msm: qcom,sc7280-dpu: describe SAR2130P 92699890681b dt-bindings: display/msm: dsi-phy-7nm: describe SAR2130P 01da1f48bd4a dt-bindings: display/msm: dsi-controller-main: describe SAR2130P e50e3900c247 dt-bindings: display/msm: dp-controller: describe SAR2130P 50b4d3ab2f90 dt-bindings: display: msm: mdp4: add LCDC clock and PLL source dc3117f0d58a dt-bindings: msm: qcom,mdss: Document interconnect paths 675f0bfb1706 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 84a58e460c62 dt-bindings: power: supply: Document Maxim MAX8971 charger 6bbc7ffdc64a spi: dt-bindings: spi-qpic-snand: Add IPQ5018 compatible 626cc8b07ead ARM: dts: omap4: panda: cleanup bluetooth bcf5e5f95ba9 ARM: dts: omap4: panda: fix resources needed for Wifi 52e01741cd60 dt-bindings: usb: realtek,rts5411: Adapt usb-hub.yaml dc73d9f2d3be dt-bindings: usb: Add binding for PS5511 hub controller 9dac5fe200f7 dt-bindings: usb: Introduce usb-hub.yaml 9f2adf2c7968 arm64: dts: rockchip: fix usb-c port functionality on rk3588-nanopc-t6 6c497c6eba1d arm64: dts: exynos: add initial support for Samsung Galaxy J6 e046936b0e72 arm64: dts: exynos: add initial support for Samsung Galaxy A2 Core 6948e73799e5 arm64: dts: exynos: add initial support for Samsung Galaxy J7 Prime 9c3c04c2d87b arm64: dts: exynos: add initial devicetree support for exynos7870 551070b23bf8 dt-bindings: arm: samsung: add compatibles for exynos7870 devices e12137fe5717 arm64: dts: rockchip: Enable bluetooth of AP6611s on OrangePI5 Max/Ultra feb54a4cfc60 dt-bindings: memory: Document RZ/G3E support 151b9911dfff arm64: dts: apple: Add PMIC NVMEM 1034cfa91f13 ASoC: codec: twl4030: Convert to GPIO descriptors a781ea3fe6f5 dt-bindings: crypto: fsl,sec-v4.0-mon: Add "power-off-time-sec" 7d7e67ac6cb8 dt-bindings: reset: syscon-reboot: add google,gs101-reboot 8feed3b94fdd spi: axi-spi-engine: offload instruction optimization 2c42fa887eba arm64: dts: exynosautov920: add cpucl1/2 clock DT nodes 99c94468b170 dt-bindings: clock: exynosautov920: add cpucl1/2 clock definitions e0d9b0f244f9 dt-bindings: hwmon: Add Sophgo SG2044 external hardware monitor support 1991cce4d18b dt-bindings: power: supply: Document Pegatron Chagall fuel gauge a3572ed09649 dt-bindings: vendor-prefixes: add prefix for Pegatron Corporation 0bf560ff10e1 arm64: dts: rockchip: add SATA nodes to RK3576 6e434b1b73aa dt-bindings: clock: convert vf610-clock.txt to yaml format 1f0623137e5a dt-bindings: arm: arm,coresight-static-replicator: add optional clocks 107b934a7fb5 dt-bindings: mtd: qcom,nandc: Document the SDX75 NAND controller bf701761289b dt-bindings: power: reset: add toradex,smarc-ec 3f3c4e59f9ba dt-bindings: interconnect: sm8650: document the MASTER_APSS_NOC d9188b52a9dc dt-bindings: interconnect: Correct indentation and style in DTS example b31830e88153 arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3588-rock-5b 7a4bb5be4074 arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-pinetab2 104277ae91b0 arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3399-rockpro64 4078c21208d8 arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3328-rock64 852abcba0fe4 arm64: dts: rockchip: Add vcc supply to spi flash on rk3399-roc-pc c88c9d3b42f7 arm64: dts: rockchip: enable pcie on Sige5 bbbd016dd1ad arm64: dts: rockchip: Add HDMI support for roc-rk3576-pc f5b1563af154 arm64: dts: rockchip: Enable HDMI0 audio output for Indiedroid Nova 4a9ca88961e2 arm64: dts: rockchip: Add rk3588 evb2 board 0ee39726af75 dt-bindings: arm: rockchip: Add rk3588 evb2 board 677235aee353 arm64: dts: rockchip: Add pcie1 slot for rk3576 evb1 board 921916e138df arm64: dts: rockchip: Enable eDP display for Cool Pi GenBook 719b9d6deca7 arm64: dts: rockchip: Add eDP1 dt node for rk3588 5999cea2c433 arm64: dts: rockchip: enable HDMI out audio on Khadas Edge2 7079948ecc6f arm64: dts: rockchip: Add HDMI & VOP2 to Khadas Edge2 763e2383f0a8 arm64: dts: rockchip: Add bluetooth support to Khadas Edge2 46e308df7a7f arm64: dts: rockchip: add overlay for tiger-haikou video-demo adapter 86fd593d347f dt-bindings: mtd: convert vf610-nfc to yaml format 42bcbd1ec509 dt-bindings: ata: rockchip-dwc-ahci: add RK3576 compatible 9d3907b0dc81 Merge 6.15-rc4 into usb-next 69c335bc812d Merge 6.15-rc4 into tty-next 96bd6de45bb5 dt-bindings: mtd: Add Loongson-1 NAND Controller 7466915999d4 arm64: dts: allwinner: a64: Add WiFi/BT header on SOPINE Baseboard 1dc8db0178a9 arm64: dts: allwinner: a64: Add WiFi/BT header on PINE A64 1cd3a1d2b00d arm64: dts: allwinner: correct the model name for Radxa Cubie A5E 600ef18c9822 ARM: dts: allwinner: Align wifi node name with bindings 1914fe32e80a arm64: dts: allwinner: Align wifi node name with bindings c022a034b1d6 arm64: dts: allwinner: h616: enable Mali GPU for all boards e9933d2fb4d7 arm64: dts: allwinner: h616: Add Mali GPU node 803a02505b52 arm64: dts: allwinner: h700: Add hp-det-gpios for Anbernic RG35XX bf34e9d35324 arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties 3f45bf7f52f0 arm/arm64: dts: allwinner: Use preferred node names for cooling maps 3a879d878553 arm64: dts: allwinner: h616: add YuzukiHD Chameleon support 0b9e163070f5 dt-bindings: arm: sunxi: Add YuzukiHD Chameleon board name 91ad117321c0 arm64: dts: allwinner: a523: add Radxa A5E support 69f8fbcdd27d dt-bindings: power: supply: bq24190: Add BQ24193 compatible c7f9db5b72c6 dt-bindings: reset: atmel,at91sam9260-reset: add microchip,sama7d65-rstc 4107b274a54e dt-bindings: power: supply: Correct indentation and style in DTS example 0def74e690b2 arm64: dts: exynosautov920: add cpucl0 clock DT nodes 21de0b373e61 dt-bindings: clock: exynosautov920: add cpucl0 clock definitions bb8a9492ece1 MIPS: Loongson64: Add missing '#interrupt-cells' for loongson64c_ls7a 4da20eae1087 mips: dts: realtek: Add MDIO controller 693da0a03149 arm64: dts: allwinner: a523: add X96Q-Pro+ support ebcb8469ef43 arm64: dts: allwinner: a523: add Avaota-A1 router support ddd2264cb891 ARM: dts: rockchip: Drop redundant CPU "clock-latency" 98a69848d374 arm64: dts: rockchip: add dsi controller nodes on rk3588 3e476fb13a10 arm64: dts: rockchip: add mipi dcphy nodes to rk3588 32be2a8c8e02 dt-bindings: PCI: qcom: Add MHI registers for IPQ9574 9cafacd8c4c9 ASoC: add Renesas MSIOF sound driver 5acc974247a4 dt-bindings: renesas,sh-msiof: Add MSIOF I2S Sound support 81e1bd55f661 arm64: dts: ti: k3-am625-sk: Enable PWM 16c71470bff1 arm64: dts: ti: k3-am62a7-sk: Enable PWM 716448152383 arm64: dts: ti: k3-am62p5-sk: Enable PWM c94675306a28 arm64: dts: ti: Add basic support for phyBOARD-Izar-AM68x c388cf2e36b8 dt-bindings: arm: ti: Add bindings for PHYTEC AM68x based hardware 43874d152bfe arm64: dts: ti: k3-j784s4-j742s2-main-common: Fix length of serdes_ln_ctrl 241109b8c8f6 arm64: dts: ti: am65x: Add missing power-supply for Rocktech-rk101 panel 22b82bf80770 arm64: dts: ti: k3-am65-main: Add system controller compatible 9680a390671a dt-bindings: mfd: ti,j721e-system-controller: Add compatible string for AM654 8e985cb49182 arm64: dts: ti: k3-j721e-common-proc-board-infotainment: Update to comply with device tree schema 25240cd26ef5 riscv: dts: thead: Introduce reset controller node 40f6c8eba924 media: dt-bindings: Document Tegra186 and Tegra194 cec 8d47ce901c2c dt-bindings: serial: amlogic,meson-uart: Add compatible string for S6/S7/S7D 16cb9f9e498a dt-bindings: serial: mediatek,uart: Add compatible for MT6893 6e6039994c8b dt-bindings: usb: usb-switch: Allow data-lanes property in port a8fc1dcece74 dt-bindings: usb: generic-ehci: Add VIA/WonderMedia compatible 932da7a8df7b dt-bindings: usb: usb-device: relax compatible pattern to a contains 772b2e8cb9dd dt-bindings: usb: renesas,usbhs: Add RZ/V2H(P) SoC support b0282744d363 Merge tag 'ath-next-20250418' of git://git.kernel.org/pub/scm/linux/kernel/git/ath/ath into wireless-next f1ded0dfbccb media: dt-bindings: Convert Analog Devices ad5820 to DT schema ae47e78ed52c media: dt-bindings: Add OmniVision OV02E10 79596bb37f98 media: dt-bindings: ti,ds90ub960: Allow setting serializer address e48c94010dd5 media: dt-bindings: media: i2c: align filenames format with standard d4b3524bf7a6 arm64: dts: imx8mq-evk: add pcie[0,1]-ep nodes af70c3ed355a arm64: dts: imx8mq: add pcie0-ep node b3f9adea45f5 arm64: dts: imx8mm-evk: add pcie0-ep node and apply pcie0-ep overlay file 67af22b950f2 arm64: dts: imx95: add pcie1 ep overlay file and create pcie-ep dtb files be98b5a4b268 arm64: dts: imx8: use common imx-pcie0-ep.dtso to enable PCI ep function 72cb1708ae6b arm64: dts: imx8dxl-evk: Add pcie0-ep node and use unified pcie0 label d1bf4f7b077e arm64: dts: imx8dxl-ss-hsio: correct irq number for imx8dxl 58861f28ee1d arm64: dts: imx8: create unified pcie0 and pcie0_ep label for all chips e90c11e7667e arm64: dts: imx8-apalis: Add PCIe and SATA support c0b02f0c33c7 Revert "arm64: dts: imx93-tqma9352-mba93xxla: enable Open Drain for MDIO" 5906f9c2d71a Revert "arm64: dts: imx93-tqma9352-mba93xxca: enable Open Drain for MDIO" 42b2289cec15 arm64: dts: imx8mp-beacon: Enable RTC interrupt and wakeup-source d5bc51143411 arm64: dts: imx8mn-beacon: Enable RTC interrupt and wakeup-source d9b339df2d8d arm64: dts: imx8mm-beacon: Enable RTC interrupt and wakeup-source 4e9004d5ecaa arm64: dts: imx8mn-beacon: Configure Ethernet PHY reset and GPIO IRQ 88dcf5d7f9c7 arm64: dts: imx8mm-beacon: Configure Ethernet PHY reset and GPIO IRQ 4258324f7cad arm64: dts: imx8mn-beacon: Set SAI5 MCLK direction to output for HDMI audio 957674dfa0b4 arm64: dts: imx8mm-beacon: Set SAI5 MCLK direction to output for HDMI audio 3825ee8ab2fe arm64: dts: imx8mp-beacon: Fix RTC capacitive load 6c24afc09355 arm64: dts: imx8mn-beacon: Fix RTC capacitive load 002e93c2520b arm64: dts: imx8mm-beacon: Fix RTC capacitive load fdcb73bb223c arm64: add initial device tree for TQMa93xx/MBa91xxCA e6d059456914 dt-bindings: arm: add MBa91xxCA Mainboard for TQMa93xxCA/LA SOM 6e3150878b7f arm64: dts: freescale: add Toradex SMARC iMX8MP 6a14e799ccce dt-bindings: arm: fsl: add Toradex SMARC iMX8MP SoM and carrier 0b198af79fa2 arm64: dts: s32gxxxa-rdb: Add PCA85073A RTC module over I2C0 e01c88e81a57 arm64: dts: imx95-15x15-evk: enable USB2.0 node 2956a2fad59b arm64: dts: imx95-19x19-evk: enable USB2.0 node b57e40b4b93e arm64: dts: imx95: add USB2.0 nodes 8912cf0407cd ARM: dts: imx6q-apalis: remove pcie-switch node 42c8e16469f9 arm64: dts: imx8mp: Add device tree for Nitrogen8M Plus ENC Carrier Board 36e551b010e9 dt-bindings: arm: fsl: Add Boundary Device Nitrogen8M Plus ENC Carrier Board 6472a607374f dt-bindings: net: brcm,unimac-mdio: Add asp-v3.0 ec5333381e64 dt-bindings: net: brcm,asp-v2.0: Add asp-v3.0 e7636d5ce4c2 dt-bindings: net: brcm,unimac-mdio: Remove asp-v2.0 ac81b792e66f dt-bindings: net: brcm,asp-v2.0: Remove asp-v2.0 b523691f91fc dt-bindings: power: qcom,rpmpd: Add SM4450 compatible e77a87a724fa dt-bindings: pwm: vt8500-pwm: Convert to YAML 0fb0156996ae dt-bindings: pwm: mediatek,pwm-disp: Add compatible for MT6893 0badf787ac7e dt-bindings: mfd: bd96802: Add ROHM BD96806 cb95b5d3c057 dt-bindings: mfd: bd96801: Add ROHM BD96805 1fbf3128a581 dt-bindings: mfd: Add ROHM BD96802 PMIC 5966dca99c06 dt-bindings: regulator: Add ROHM BD96802 PMIC ae31878acd85 dt-bindings: power: Add Allwinner H6/H616 PRCM PPU f4a58e101181 dt-bindings: gpu: Add 'resets' property for GPU initialization 3dce8ed7efbf arm64: dts: renesas: r8a779h0: Add ISP core function block 7ab5541f5631 arm64: dts: renesas: r8a779g0: Add ISP core function block 7c5f77250e86 arm64: dts: renesas: r8a779a0: Add ISP core function block 72a455b37dc7 arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support 8cfc94f50e33 dt-bindings: soc: renesas: Document Retronix R-Car V4H Sparrow Hawk board support e92bf5beb087 dt-bindings: vendor-prefixes: Add Retronix Technology Inc. 575112a9940a arm64: dts: mediatek: Add MT8186 Ponyta Chromebooks 9be55ad24aee dt-bindings: arm: mediatek: Add MT8186 Ponyta Chromebook 47f7ec1e89b3 arm64: dts: mediatek: mt8186-corsola: make SDIO card removable d5854c28c729 dt-bindings: interrupt-controller: via,vt8500-intc: Convert to YAML 240e1020a18e dt-bindings: arm/cpus: allow up to 3 interconnects entries c230496b1449 dt-bindings: display: Add Sitronix ST7571 LCD Controller 0b90b9d75595 dt-bindings: hwmon: ti,tmp102: document optional V+ supply property 26de36c3334a dt-bindings: hwmon: pmbus: add lt3074 d2fcc47c99f6 dt-bindings: hwmon: amc6821: add fan and PWM output 83785e4a4d68 dt-bindings: wireless: qcom,wcnss: Use wireless-controller.yaml a62d4dcab2d7 dt-bindings: wireless: silabs,wfx: Use wireless-controller.yaml 5afb07ef0f59 dt-bindings: wireless: bcm4329-fmac: Use wireless-controller.yaml schema 9477f2559b7e dt-bindings: net: Add generic wireless controller 66bcd13cf8a7 dt-bindings: net: Add network-class schema for mac-address properties 8afa56eb8b9b dt-bindings: dma: fsl-edma: increase maxItems of interrupts and interrupt-names cfbc26c13ea3 dt-bindings: dma: qcom,bam: Document dma-coherent property 7474a36b64bb dt-bindings: soc: qcom,rpmh-rsc: Limit power-domains requirement 207d29dd5aa7 dt-bindings: power: rockchip: Add support for RK3562 SoC 1f4f5e6d471c Add RK3576 SAI Audio Controller Support f3bb7170abd4 arm64: dts: mediatek: mt8395-nio-12l: Enable Audio DSP and sound card 11ee3efc86c9 arm64: dts: mediatek: mt8390-genio-common: Add Display on DSI0 69d9b1270387 arm64: dts: mediatek: mt8395-genio-1200-evk: Add display on DSI0 13816981f2f2 arm64: dts: freescale: imx8mm-verdin: Add EEPROM compatible fallback 7ca80da3dbc5 arm64: dts: freescale: imx8mp-verdin: Add EEPROM compatible fallback 8927d1c11a35 arm64: dts: mt8183: Add port node to mt8183.dtsi 8d696ebbe281 ARM: dts: ls1021a-tqmals1021a: change sound card model name fc79cde19de2 ARM: dts: ls1021a-tqmals1021a: Add overlay for CDTech DC44 RGB display 1a279450be52 ARM: dts: ls1021a-tqmals1021a: Add overlay for CDTech FC21 RGB display 891d4f7327ed ARM: dts: ls1021a-tqmals1021a: Add LVDS overlay for Tianma TM070JVGH33 d313da9895c1 ARM: dts: ls1021a-tqmals1021a: Add HDMI overlay d2014560f7a9 ARM: dts: ls1021a-tqmals1021a: Add vcc-supply for spi-nor d0573667ab9f ARM: dts: ls1021a-tqmals1021a: Fix license 15f3dec744dc ARM: dts: imx: Drop redundant CPU "clock-latency" 37bf4d2bccdf arm64: dts: imx: Drop redundant CPU "clock-latency" 7eaf105a0367 dt-bindings: pinctrl: convert fsl,imx7ulp-pinctrl.txt to yaml format accab92f7c4f media: dt-bindings: renesas,rzg2l-cru: Document Renesas RZ/G3E SoC 948ceb8e33d1 media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/G3E CSI-2 block 6914e693d51d media: dt-bindings: renesas,rzg2l-csi2: Document Renesas RZ/V2H(P) SoC eb4dda012b0d media: dt-bindings: media: renesas,fcp: Document RZ/V2H(P) SoC a7f4d9c91d74 media: dt-bindings: media: renesas,vsp1: Document RZ/V2H(P) 01687fc2770e arm64: dts: imx8qm-mek: consolidate reserved-memory 1a3288716f35 dt-bindings: pinctrl: spacemit: add clock and reset property 9ebe2fd36cd6 dt-bindings: power: mediatek: Support Dimensity 1200 MT6893 MTCMOS eede67deb547 dt-bindings: PCI: qcom: Add IPQ5018 SoC 1bd879b82bec dt-bindings: PCI: Remove obsolete .txt docs a59cf6bd0a89 dt-bindings: PCI: Convert marvell,armada8k-pcie to schema 62bb3eef59ee dt-bindings: PCI: Convert Marvell EBU to schema be24a3971fd2 dt-bindings: PCI: sifive,fu740-pcie: Fix include placement in DTS example a3908fe56239 dt-bindings: PCI: Correct indentation and style in DTS example 159e9454d956 dt-bindings: PCI: dwc: rockchip: Add rk3562 support ef0f37ca5ff5 dt-bindings: PCI: dw: rockchip: Add rk3576 support ebc2179ccf8f dt-bindings: net: Document support for Renesas RZ/V2H(P) GBETH 472799cc1133 dt-bindings: net: dwmac: Increase 'maxItems' for 'interrupts' and 'interrupt-names' 1997420be337 dt-bindings: net: dp83822: add constraints for mac-termination-ohms e706611ad55b dt-bindings: net: ethernet-phy: add property mac-termination-ohms 10faeaae6517 dt-bindings: iio: imu: icm42600: add interrupt naming support d2b5833dde70 dt-bindings: ROHM BD79104 ADC 050b648678c0 dt-bindings: iio: adc: adi,ad7606: add SPI offload properties 61c34bb63511 dt-bindings: iio: adc: ad7380: add AD7389-4 520f1aa3afd9 dt-bindings: Add ROHM BD7970x variants 9db7709f449c dt-bindings: ROHM BD79124 ADC/GPO 484465e0026d dt-bindings: iio: filter: Add lpf/hpf freq margins c0d5d6f0abd0 dt-bindings: iio: adc: amlogic,meson-saradc: Add GXLX SoC compatible 10988aac05c5 dt-bindings: iio: light: bh1750: Add reset-gpios property c9f357746caa dt-bindings: iio: Use unevaluatedProperties for SPI devices aad2a4aba149 dt-bindings: iio: Correct indentation and style in DTS example 7c7b549aa38c dt-bindings: display: imx: convert fsl,tcon.txt to yaml format 22d2cf8b3f78 dt-bindings: fsl: convert m4if.txt and tigerp.txt to yaml format e07e2c2f96fe dt-bindings: display: imx: convert ldb.txt to yaml format a9b92e46c884 dt-bindings: powerpc: Convert fsl/pmc.txt to YAML ca4517cfee45 dt-bindings: virtio: pci-iommu: Add ref to pci-device.yaml 86b145f94994 dt-bindings: backlight: add TI LP8864/LP8866 LED-backlight drivers c2ba19c59cef dt-bindings: display: imx: convert fsl-imx-drm.txt to yaml format fb650bd91b53 dt-bindings: interrupt-controller: Add missed fsl tzic controller 1f5c4df2e936 dt-bindings: remove RZ/N1S bindings 335c675342f4 dt-bindings: Remove obsolete numa.txt 855e8fcacd8e dt-bindings: Remove obsolete cpu-topology.txt 195c40fcc4b6 dt-bindings: counter: Convert ftm-quaddec.txt to yaml format 417caeebdd6c dt-bindings: cpufreq: Drop redundant Mediatek binding f6548c04b52e dt-bindings: arm/cpus: Add power-domains constraints 2ddae0f8d5fe dt-bindings: arm/cpus: Add missing properties 28a210612928 dt-bindings: Reference opp-v1 schema in CPU schemas fe6dc7443d31 dt-bindings: arm/cpus: Re-wrap 'description' entries c64045034fdf dt-bindings: arm/cpus: Add schemas for "enable-method" dependencies df668f6655f1 ASoC: dt-bindings: add schema for rockchip SAI controllers 1d48e25ced56 arm64: dts: add support for S7D based Amlogic BM202 0c1264e70500 arm64: dts: add support for S7 based Amlogic BP201 593f1d88b3b7 arm64: dts: add support for S6 based Amlogic BL209 410b38d60404 dt-bindings: arm: amlogic: add S7D support 2ca205bee2ea dt-bindings: arm: amlogic: add S7 support 20f8de3f09b1 dt-bindings: arm: amlogic: add S6 support 3c7e8180dc78 ASoC: dt-bindings: fsl,mqs: Document audio graph port a80240369b3a arm64: dts: mediatek: mt8390-genio-common: Add firmware-name for scp0 1755d247e0e6 arm64: dts: mediatek: mt8188: Describe SCP as a cluster with two cores 17a60804ef13 dt-bindings: soc: amlogic: S4 supports clk-measure 8c786a9d5d99 dt-bindings: soc: amlogic: C3 supports clk-measure 11eee42e07c5 arm64: dts: amlogic: S4: Add clk-measure controller node 532a71d8ed7f arm64: dts: amlogic: C3: Add clk-measure controller node 44fcfeee7cf3 arm64: dts: rockchip: Add rk3576 pcie nodes 671d11c0c112 arm64: dts: rockchip: Enable HDMI audio outputs for Cool Pi CM5 EVB 5d9a0d8efcc1 arm64: dts: rockchip: Enable HDMI1 on Cool Pi CM5 EVB edcac1a68928 arm64: dts: rockchip: Rename hdmi-con to hdmi0-con for Cool Pi CM5 EVB 6164d1b5f147 arm64: dts: rockchip: Enable eDP0 display on RK3588S EVB1 board 7a5418e7cb3b arm64: dts: rockchip: Add eDP0 node for RK3588 49ec37e83ae2 Merge tag 'renesas-r9a09g057-dt-binding-defs-tag3' into renesas-clk-for-v6.16 45233ddb59b5 dt-bindings: clock: renesas,r9a09g057-cpg: Add USB2 PHY and GBETH PTP core clocks bad521c00e8d arm64: dts: renesas: rzg3e-smarc-som: Enable Mali-G52 ec4f1ea3a42a arm64: dts: renesas: r9a09g047: Add Mali-G52 GPU node 28fa85b6d9f9 arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic support f8d7d5853e29 arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol a03e6f70cfb9 dt-bindings: soc: renesas: Add Renesas RZ/T2H (R9A09G077) SoC ed79e930a772 arm64: dts: exynos: Add DT node for all UART ports e27cacd3b8c5 arm64: dts: amlogic: Drop redundant CPU "clock-latency" 3b88cda61806 arm64: dts: amlogic: gxlx-s905l-p271: add saradc compatible 4fe442ce931a arm64: dts: amlogic: a1: enable UART RX and TX pull up by default 96a635366da2 arm64: dts: amlogic: axg: enable UART RX and TX pull up by default 2c676fabc600 arm64: dts: amlogic: g12: enable UART RX and TX pull up by default b9f6d24ba1a8 arm64: dts: amlogic: gxl: enable UART RX and TX pull up by default 744536cebfea arm64: dts: amlogic: gxbb: enable UART RX and TX pull up by default 62731c5b2949 arm64: dts: amlogic: a4: add pinctrl node 08023b0f21ab ARM: dts: amlogic: meson8b: enable UART RX and TX pull up by default 84e4059661d3 ARM: dts: amlogic: meson8: enable UART RX and TX pull up by default 7fffb9023d36 arm64: dts: imx8mp-evk: Enable DSP node for remoteproc usage 02671eee212b arm64: dts: imx8mp: Add DSP clocks d87bc6cce59c arm64: dts: imx8mp: Configure dsp node for rproc usage 7aaa6e97a546 arm64: dts: imx8mp: Add mu2 root clock 9a7ac78ffb7a arm64: dts: imx8mp: Use resets property 36a025b9b2cb ARM: dts: imx51-digi-connectcore-som: Fix MMA7455 compatible 9dc44c77abcf ARM: dts: nxp: Align NAND controller node name with bindings 30c126d6dbab ARM: dts: imx: Fix the iim compatible string 4a9140955168 ARM: dts: imx31/imx6: Use flash as the NOR node name 86a6c4e28468 arm64: dts: imx: add imx95 dts for sof 60488f92956c arm64: dts: imx8mq: Add linux,pci-domain into pcie-ep node 6c877f641153 arm64: dts: imx8mm-phyboard-polis-peb-av-10: Set lvds-vod-swing 51f47e7c0b4c arm64: dts: qcom: qdu1000: Add snps,dis_u3_susphy_quirk ef6bc0bf348e arm64: dts: qcom: qcs615: Add snps,dis_u3_susphy_quirk cf3e5871d878 arm64: dts: qcom: sm8450: Add snps,dis_u3_susphy_quirk 074247f3be2b arm64: dts: qcom: sm8350: Add snps,dis_u3_susphy_quirk 7406a3e0937d arm64: dts: qcom: sm8150: Add snps,dis_u3_susphy_quirk 614a08df6a4a arm64: dts: ti: k3-j784s4-j742s2-evm: Add overlay to enable USB0 Type-A 094cbe1a912d arm64: dts: ti: k3-am67a-beagley-ai: Add bootph for main_gpio1 a63b4daf4b79 dt-bindings: display: rockchip: analogix-dp: Add support for RK3588 e4c693434b30 dt-bindings: display: rockchip: analogix-dp: Add support to get panel from the DP AUX bus d1e65709163b arm64: dts: qcom: x1e80100-hp-omnibook-x14: Remove invalid bt-en-sleep node 2cb79ee30004 Merge branch 'arm32-for-6.15' into arm64-for-6.16 43b365ed3fc7 dt-bindings: pci: apple,pcie: Add t6020 compatible string 7a1b30bb0eea dt-bindings: PCI: qcom,pcie-sc8180x: Add 'global' interrupt ade654bc2d03 dt-bindings: PCI: qcom: Allow IPQ6018 to use 8 MSI and one 'global' interrupt 5d87250e09fd dt-bindings: PCI: qcom: Allow IPQ8074 to use 8 MSI and one 'global' interrupt 4fa9a33a89aa dt-bindings: PCI: qcom: Allow MSM8998 to use 8 MSI and one 'global' interrupt 87908d20f9b5 dt-bindings: PCI: qcom: Add 'global' interrupt for SDM845 SoC 77377b0980f6 dt-bindings: PCI: qcom,pcie-sc7280: Add 'global' interrupt 95050a994ec3 dt-bindings: PCI: qcom,pcie-sa8775p: Add 'global' interrupt 4d5a69cb16bf dt-bindings: PCI: qcom,pcie-sm8350: Add 'global' interrupt 46e0cc9c1aa9 dt-bindings: PCI: qcom,pcie-sm8250: Add 'global' interrupt ba7c1c776905 dt-bindings: PCI: qcom,pcie-sm8150: Add 'global' interrupt 70aa3043231a dt-bindings: misc: Describe TI FPC202 dual port controller da01ee99aa22 arm64: dts: ti: Add k3-am62-pocketbeagle2 de444d92c16f dt-bindings: arm: ti: Add PocketBeagle2 4a5c06ef7268 arm64: dts: ti: k3-am625-verdin: Add EEPROM compatible fallback 85889ab7cccb arm64: dts: ti: k3-am62p-j722s: Add rng node 99c4e495818d arm64: dts: ti: k3-am64: Add PCIe ctrl node to main_conf region 05c44f561285 arm64: dts: ti: k3-j721s2: Add PCIe ctrl node to scm_conf region 9d8a3b7ffe5b arm64: dts: ti: k3-j7200: Add PCIe ctrl node to scm_conf region d93d024659d6 arm64: dts: ti: k3-j721e: Add PCIe ctrl node to scm_conf region a98c73a3f45f dt-bindings: soc: ti: ti,j721e-system-controller: Add PCIe ctrl property 5c346d01e6e2 arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in OV5640 overlay 8ea0ac26429e arm64: dts: ti: k3-am62x: Rename I2C switch to I2C mux in IMX219 overlay cb6797019f26 arm64: dts: ti: k3-am62x: Remove clock-names property from IMX219 overlay 15eccb1baa91 arm64: dts: ti: k3-j721e-sk: Add requiried voltage supplies for IMX219 3aa414595924 arm64: dts: ti: k3-j721e-sk: Remove clock-names property from IMX219 overlay 889f193469ef arm64: dts: ti: k3-am68-sk: Fix regulator hierarchy 9a5103dd484c arm64: dts: ti: k3-j721e-sk: Add DT nodes for power regulators 541f9536e43a arm64: dts: ti: k3-j722s-evm: Drop redundant status within serdes0/serdes1 a82340293539 arm64: dts: ti: k3-j722s-main: Don't disable serdes0 and serdes1 69db838227f8 arm64: dts: ti: k3-j722s-main: Disable "serdes_wiz0" and "serdes_wiz1" 50ace9c7fca6 arm64: dts: ti: k3-j722s-evm: Enable "serdes_wiz0" and "serdes_wiz1" c68fb8dfcecc arm64: dts: ti: k3-j784s4-evm-usxgmii-exp1-exp2: drop pinctrl-names f7e7b4782d11 spi: dt-bindings: Fix description mentioning a removed property 40b5957489e6 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net a76293f399ef dt-bindings: display: panel: Add Visionox G2647FB105 31bf80b7e095 dt-bindings: display: panel: Add Himax HX8279/HX8279-D DDIC panels 3d0544beaaa9 dt-bindings: vendor-prefixes: Add Shenzhen Aoly Technology Co., Ltd. aadceed2b38f dt-bindings: display: simple: Add Tianma P0700WXF1MBAA panel a7ec818fd1b6 dt-bindings: dma: Add Arm DMA-350 b3e59c644dfa ASoC: mt8195: Add support for MT8395 Radxa NIO 12L 1e0a96627fed dt-bindings: iommu: mediatek: Add binding for MT6893 MM IOMMU 58366e7824fc dt-bindings: gpio: spacemit: add support for K1 SoC af0ce3f46116 ASoC: dt-bindings: mt8195: add missing audio routing and link-name 3f5cd90ccdf5 ASoC: dt-bindings: mt8195: add compatible mt8195_mt6359 ea716e20528e dt-bindings: pwm: Add RZ/G2L GPT binding 103d3ddc2b21 dt-bindings: pinctrl: convert fsl,vf610-pinctrl.txt to yaml format cd7fc0138a87 dt-bindings: pinctrl: mediatek: Add support for mt8196 e036f09b4726 dt-bindings: pinctrl: mediatek: Add support for MT6893 9ad102711159 dt-bindings: pinctrl: mediatek: Correct indentation and style in DTS example a3f46993c1d8 dt-bindings: pinctrl: mediatek: Drop unrelated nodes from DTS example 5aaff15d6d3c dt-bindings: display: mediatek: Add binding for MT8195 HDMI-TX v2 09efe288b44d dt-bindings: display: mediatek: Add binding for HDMIv2 DDC ef5598e4b3d3 dt-bindings: clock: spacemit: Add spacemit,k1-pll 65c5c58321a4 dt-bindings: soc: spacemit: Add spacemit,k1-syscon 5d45a2a0a682 arm64: dts: qcom: sdm670: add camss and cci 98e1d9e9dd0e arm64: dts: mediatek: mt8196: Add pinmux macro header file 0124ced0cefe arm64: dts: mediatek: Add MT6893 pinmux macro header file b4f4a5903e9f arm64: dts: mediatek: mt7622: Align GPIO hog name with bindings 27ba1cca68e2 arm64: dts: exynos: update all samsung,mode constants c212190a0719 arm64: dts: qcom: sm8750-qrd: Enable modem 0c0d0f9db397 arm64: dts: qcom: sm8750-mtp: Enable modem 2dbfda4a1fca arm64: dts: qcom: sm8750: Add Modem / MPSS dbdccf6854da arm64: dts: qcom: qcs6490-rb3gen2: Update the LPASS audio node 3ea9ff6b6b1f arm64: dts: qcom: qcm6490-idp: Update the LPASS audio node 515c678e4680 arm64: dts: qcom: sa8775p: Remove cdsp compute-cb@10 a797c39416e5 arm64: dts: qcom: sa8775p: Remove extra entries from the iommus property c7412fe27214 arm64: dts: qcom: sm8650: use correct size for VBIF regions a9ead2dddaf4 arm64: dts: qcom: sm8550: use correct size for VBIF regions 2684f559cb43 arm64: dts: qcom: sm8450: use correct size for VBIF regions 4d3789d6ba95 arm64: dts: qcom: sm8350: use correct size for VBIF regions 848bec2a462d arm64: dts: qcom: sm8250: use correct size for VBIF regions 8e40db4bb6bb arm64: dts: qcom: sm8150: use correct size for VBIF regions 5a868a02e7cf arm64: dts: qcom: sm6350: use correct size for VBIF regions dffd3d4bcc12 arm64: dts: qcom: sm6125: use correct size for VBIF regions cb1203e882d8 arm64: dts: qcom: sm6115: use correct size for VBIF regions ba2eaf6365b2 arm64: dts: qcom: sdm845: use correct size for VBIF regions 30d1db2367db arm64: dts: qcom: sdm670: use correct size for VBIF regions b9b2eed490b9 arm64: dts: qcom: sc8280xp: use correct size for VBIF regions deb12da90a9f arm64: dts: qcom: sc8180x: use correct size for VBIF regions eedd6875af28 arm64: dts: qcom: sc7280: use correct size for VBIF regions dc88454477ff arm64: dts: qcom: sc7180: use correct size for VBIF regions 9835c454bf62 arm64: dts: qcom: sa8775p: use correct size for VBIF regions b4368defbe1e arm64: dts: qcom: qcm2290: use correct size for VBIF regions ebb5589fdeaa arm64: dts: qcom: msm8998: use correct size for VBIF regions 3ce4be3b9d8e arm64: dts: qcom: sa8775p: mark MDP interconnects as ALWAYS on 43adeccee9db arm64: dts: qcom: sc7280: Use the header with DSI phy clock IDs c2b74a5ab3ec arm64: dts: qcom: sdm660-xiaomi-lavender: Add missing SD card detect GPIO 81d7bb6bfb24 ASoC: Add codec driver for Cirrus Logic CS48L32 DSP 4da4895ae7c6 arm64: dts: apple: Add SPMI controller nodes 7dd41ba7ca89 ASoC: dt-bindings: Add Cirrus Logic CS48L32 audio DSP ba0f5e8a4bbb dt-bindings: usb: Introduce qcom,snps-dwc3 f7e8d13af32d dt-bindings: usb: samsung,exynos-dwc3: add exynos2200 compatible 376d95f4fcfd dt-bindings: net: wireless: Add Realtek RTL8188ETV USB WiFi 1393ec501aad dt-bindings: gpu: img: Add BXS-4-64 devicetree bindings 04e4825e5e66 dt-bindings: gpu: img: Future-proofing enhancements f61cd93fb04d dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P 48d0f5c99b80 arm64: dts: mediatek: mt8195: Add power domain for dp_intf0 fd5871672cfb dt-bindings: pinctl: amlogic,pinctrl-a4: Add compatible string for A5 80d9fbe4ae24 arm64: dts: mediatek: mt8188: Add all Multimedia Data Path 3 nodes 519c51530765 dt-bindings: media: mediatek: mdp3: Add compatibles for MT8188 MDP3 86930b41fb55 dt-bindings: display: mediatek: Add compatibles for MT8188 MDP3 23020928772e dt-bindings: memory: mtk-smi: Add support for MT6893 32ce7f7677ee ARM: dts: qcom: sdx55/sdx65: Fix CPU power-domain-names 489603d7ae76 arm64: dts: qcom: msm8992-lg-h815: Fix CPU node "enable-method" property dependencies 1acb8a3afec9 arm64: dts: qcom: msm8939: Fix CPU node "enable-method" property dependencies 58430ce78a75 arm64: dts: qcom: qdu1000: Fix qcom,freq-domain 51c305a0eec9 arm64: dts: qcom: Remove unnecessary MM_[UD]L audio routes 0ddb3701d5a2 arm64: dts: qcom: x1e80100-lenovo-yoga-slim7x: enable MICs LDO d2d340219d57 arm64: dts: qcom: remove max-speed = 1G for RGMII for ethernet 2e97866fef19 riscv: dts: thead: Introduce power domain nodes with aon firmware 3203bed54904 dt-bindings: net: ti: k3-am654-cpsw-nuss: evaluate fixed-link property 57d708a99684 dt-bindings: net: ethernet-controller: add 5000M speed to fixed-link 4c7f11603555 dt-bindings: interrupt-controller: Add Sophgo SG2044 MSI controller be5c965c1e13 arm64: dts: marvell: Drop unused "pinctrl-names" 970715b11ece Add support for Loongson-1 AC97 9c7b95fb32ec dt-bindings: soc: mediatek: dvfsrc: Add support for MT6893 09a106a121fc arm64: dts: mediatek: mt8186: starmie: Fix external display b4b6de803068 arm64: dts: mediatek: mt8195: Reparent vdec1/2 and venc1 power domains d029a36da846 arm64: dts: mediatek: mt8390-genio-common: Fix pcie pinctrl dtbs_check error 72a769730bb5 arm64: dts: mediatek: mt8395-genio-1200-evk: Add scp firmware-name ea454778c25d arm64: dts: mediatek: mt8395-nio-12l: Add scp firmware-name 3be6964ca5d7 arm64: dts: mediatek: mt8188: Fix IOMMU device for rdma0 b75a3a2e52bc dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocol 4755ea6ea789 ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe SD card port e18bd34b9406 ARM: dts: renesas: r9a06g032: Describe SDHCI controllers d8697a0b8be3 arm64: dts: renesas: Add initial device tree for RZ/V2N EVK e31a92d550aa arm64: dts: renesas: Add initial SoC DTSI for RZ/V2N 6c01ced6fc08 Merge tag 'renesas-r9a09g056-dt-binding-defs-tag1' into renesas-dts-for-v6.16 be5c7945dfbc dt-bindings: pinctrl: renesas: Document RZ/V2N SoC 757f7c111e60 dt-bindings: clock: renesas: Document RZ/V2N SoC CPG 14a6a632f90b dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC 7f01c2ee0bf2 dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK a5a215f049ad ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe keys 1252dbd741d4 ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe I2C bus eef897044665 ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe I2C bus 5f148a8d8dfc ARM: dts: renesas: r9a06g032: Describe I2C controllers f8ef11f15d0d ARM: dts: renesas: Add r9a06g032-rzn1d400-eb board device-tree 15c36ca1f1aa dt-bindings: pwm: Add Loongson PWM controller f13ab79ad775 ASoC: dt-bindings: Add bindings for Richtek rt9123p 551439fc8917 ASoC: dt-bindings: Add bindings for Richtek rt9123 67b9a4a613e5 ASoC: dt-bindings: Add Realtek ALC203 Codec cd0cbd25ba04 ASoC: dt-bindings: Add Loongson-1 AC97 Controller d19f03845632 arm64: dts: apple: t8015: Add CPU caches 96e590bf75e3 arm64: dts: apple: t8012: Add CPU caches f403b51db93d arm64: dts: apple: t8011: Add CPU caches 1ffd100554f7 arm64: dts: apple: t8010: Add CPU caches ab70b5862bf9 arm64: dts: apple: s8001: Add CPU caches 1e80d37ce322 arm64: dts: apple: s800-0-3: Add CPU caches 7fc695068e5e arm64: dts: apple: t7001: Add CPU caches d91d60a37dac arm64: dts: apple: t7000: Add CPU caches 446475ce91b6 arm64: dts: apple: s5l8960x: Add CPU caches 51ac91f86b5a arm64: dts: broadcom: bcm2712: Use "l2-cache" for L2 cache node names 3b1c9669fcb3 dt-bindings: serial: Add compatible for Renesas RZ/T2H SoC in sci 27b96d2832df dt-bindings: serial: 8250: support an optional second clock 9487008acf8e dt-bindings: serial: snps-dw-apb-uart: Simplify DMA-less RZ/N1 rule c58e818dffba dt-bindings: usb: usbmisc-imx: add support for i.MX95 platform 925760feb157 dt-bindings: usb: chipidea: Add i.MX95 compatible string 'fsl,imx95-usb' 3f95cd9eb7ee dt-bindings: usb: smsc,usb3503: Correct indentation and style in DTS example 0c1b24f9cf87 dt-bindings: usb: dwc3: Allow connector in USB controller node c4d9df4388d4 dt-bindings: usb: qcom,dwc3: Add SM8750 compatible ab3e4701d6ae dt-bindings: phy: qcom: uniphy-pcie: Add ipq5018 compatible 962144dc8146 dt-bindings: media: add support for video hardware on QCS615 platform 2dfdfac83463 dt-bindings: media: qcom,sm8550-iris: document SA8775p IRIS accelerator e4ad9ca4085b dt-bindings: media: Add qcom,x1e80100-camss 80ddf0af6187 dt-bindings: media: camss: Restrict bus-type property c34ae9de8ac5 ASoC: dt-bindings: Update example for enabling USB offload on SM8250 1d86a3fe426b ASoC: dt-bindings: qcom,q6dsp-lpass-ports: Add USB_RX port 2a377d8f94b5 ALSA: Add USB audio device jack type cf0cbf431777 ARM: dts: at91: at91sam9263: fix NAND chip selects fbe5a79f2873 ARM: dts: at91: usb_a9g20: move wrong RTC node 066ddcdd974a ARM: dts: at91: calao_usb: simplify chosen node 81de6966411b ARM: dts: at91: usb_a9260: use 'stdout-path' 8161869d1b43 ARM: dts: at91: calao_usb: simplify memory node 3dd34def8029 ARM: dts: at91: usb_a9263: fix GPIO for Dataflash chip select a3f21e5b3a39 ARM: dts: at91: usb_a9g20: add SPI EEPROM 35085606ce0f dt-bindings: phy: brcmstb-usb-phy: Add support for bcm74110 be4f0bbd2ad9 ARM: dts: nokia n900: remove useless io-channel-cells property 0b7ceacf9b52 dt-bindings: display: simple: Add NLT NL13676BC25-03F panel a5339a602279 dt-bindings: vendor-prefixes: Add EcoNet b382b0963bb2 dt-bindings: phy: samsung,usb3-drd-phy: add exynos7870-usbdrd-phy compatible db1d9d73cbf8 dt-bindings: phy: rockchip: Add missing "phy-supply" property ea31b71e8dc7 arm64: dts: rockchip: Move SHMEM memory to reserved memory on rk3588 752a63fbba9f arm64: dts: rockchip: Add UART DMA support for RK3528 2342a94e45da arm64: dts: rockchip: Add DMA controller for RK3528 955f7dfa8330 arm64: dts: rockchip: Add missing uart3 interrupt for RK3528 ae0c23f1d3bf arm64: dts: rockchip: Rename vcc3v3_pcie0 to vcc3v3_pcie1 for rk3576-evb1-v10 ff36044b88d2 dt-bindings: display: rockchip,vop: Drop assigned-clocks 177de0ee8887 dt-bindings: firmware: google,gs101-acpm-ipc: add PMIC child node 627460f28703 regulator: dt-bindings: adi,adp5055-regulator: Add adp5055 support 6fba86b23019 arm64: dts: qcom: sm8650: Use the header with DSI phy clock IDs 7cf8e450c836 arm64: dts: qcom: sm8550: Use the header with DSI phy clock IDs 611ef92fbe1e arm64: dts: qcom: sm8450: Use the header with DSI phy clock IDs dbf9c8e23c16 arm64: dts: qcom: sm8350: Use the header with DSI phy clock IDs 60d462b300bd arm64: dts: qcom: sm8250: Use the header with DSI phy clock IDs 0161b8b428a5 arm64: dts: qcom: sm8150: Use the header with DSI phy clock IDs 00fcce9a5938 arm64: dts: qcom: sm6350: Use the header with DSI phy clock IDs d00674635be1 arm64: dts: qcom: sm6125: Use the header with DSI phy clock IDs 734afb56dbec arm64: dts: qcom: sm6115: Use the header with DSI phy clock IDs 4c902aa0c3c8 arm64: dts: qcom: sdm845: Use the header with DSI phy clock IDs 2b72c350b768 arm64: dts: qcom: sdm670: Use the header with DSI phy clock IDs 0178dfa7f6b7 arm64: dts: qcom: sdm630: Use the header with DSI phy clock IDs c7974eda5aee arm64: dts: qcom: sc8180x: Use the header with DSI phy clock IDs bbd34acbea44 arm64: dts: qcom: sc7180: Use the header with DSI phy clock IDs 72fe36f8dbd7 arm64: dts: qcom: qcm2290: Use the header with DSI phy clock IDs 39411c953302 arm64: dts: qcom: msm8998: Use the header with DSI phy clock IDs 350d85710230 arm64: dts: qcom: msm8996: Use the header with DSI phy clock IDs bcabc03510bb arm64: dts: qcom: msm8976: Use the header with DSI phy clock IDs ebfed549cc2d arm64: dts: qcom: msm8953: Use the header with DSI phy clock IDs f204d52efc5f arm64: dts: qcom: msm8939: Use the header with DSI phy clock IDs 33ad178a48de arm64: dts: qcom: msm8917: Use the header with DSI phy clock IDs 5bfc873d7def arm64: dts: qcom: msm8916: Use the header with DSI phy clock IDs f8fe1b41ce57 ARM: dts: qcom: msm8974: Use the header with DSI phy clock IDs f96c56c7a652 ARM: dts: qcom: msm8226: Use the header with DSI phy clock IDs f4143e343821 arm64: dts: fsd: Add Ethernet support for PERIC Block of FSD SoC 91c650cbe054 arm64: dts: fsd: Add Ethernet support for FSYS0 Block of FSD SoC c3b35fa8b9a4 ASoC: wcd938x: enable t14s audio headset 37fdec27303b ARM: dts: nuvoton: Add MMC Nodes b28b0dcdee93 ARM: dts: nuvoton: Add OHCI node 129b618c0219 ARM: dts: nuvoton: Add UDC nodes 151b1957ef4f ARM: dts: nuvoton: Add EDAC node 5c9e6533646b ARM: dts: nuvoton: Align GPIO hog name with bindings 67dfb235fd15 Merge branch 'arm64-for-6.15' into arm64-for-6.16 7ec23a778f3d ARM: dts: Drop DTS for BCM59056 PMU b443a6223701 ARM: dts: bcm2166x: Add bcm2166x-pinctrl DTSI 9b7546c46ae5 ARM: dts: bcm2166x-common: Add pinctrl node d70d01b71b71 arm64: dts: broadcom: bcm2712-rpi-5-b: Enable PCIe DT nodes 66cd796ed18b arm64: dts: broadcom: bcm2712: Add PCIe DT nodes eb4502801000 dt-bindings: cache: sifive,ccache0: Add ESWIN EIC7700 SoC compatibility 4a1378329189 dt-bindings: remoteproc: stm32-rproc: Add firmware-name property 2b4be4ef6b2e dt-bindings: arm: sunxi: Add new board names for A523 generation b4a4490611e1 dt-bindings: vendor-prefixes: Add YuzukiHD name 247a3572abcf arm64: dts: allwinner: Add Allwinner A523 .dtsi file 82ae2cf2441d arm64: dts: microchip: sparx5: Fix CPU node "enable-method" property dependencies 640d7abca1ba dt-bindings: writing-schema: Explain sub-nodes with additionalProperties:true d0e1f7ab79fe Merge drm/drm-next into drm-misc-next 9463aad4a8cb dt-bindings: Document Blaize BLZP1600 GPIO driver 1cd181f49a96 arm64: dts: renesas: Remove undocumented compatible micron,mt25qu512a ad32dcce24ed arm64: dts: renesas: r8a779f4: Add UFS tuning parameters in E-FUSE 374d98a0c04e arm64: dts: renesas: r9a09g047: Add ICU node f84a5fd28547 arm64: dts: renesas: r9a09g047e57-smarc: Enable SDHI1 6a8407e40474 arm64: dts: renesas: rzg3e-smarc-som: Add support to enable SD on SDHI0 0622623eda68 arm64: dts: renesas: rzg3e-smarc-som: Enable SDHI{0,2} 1963097f0f58 arm64: dts: renesas: r9a09g057: Add support for enabling SDHI internal regulator 260b2d4cff22 arm64: dts: renesas: r9a09g047: Add SDHI0-SDHI2 nodes e9ca7811de33 dt-bindings: reset: Add T-HEAD TH1520 SoC Reset Controller 03493b4dcc7c dt-bindings: gpio: pca95xx: add Toradex ecgpiol16 f061f5b90a52 dt-bindings: gpio: Correct indentation and style in DTS example 56d2ab45bc92 dt-bindings: interrupt-controller: Add EcoNet EN751221 INTC 3a22dd525deb ARM: dts: rockchip: Add aliases for rk3036-kylin MMC devices ce9f22f3ac6b arm64: dts: rockchip: Enable HDMI audio output for RK3588 Tiger Haikou 4d53761f203d arm64: dts: rockchip: Enable HDMI audio output for RK3588 Jaguar 05839dce445f arm64: dts: rockchip: Enable HDMI ports on ArmSoM W3 1a906b44673a arm64: dts: rockchip: aliase sdhci as mmc0 for rk3566 box demo 4cc0db11d181 arm64: dts: rockchip: Add gmac phy reset GPIO to QNAP TS433 df34889c120b arm64: dts: rockchip: Correct gmac phy address on QNAP TS433 c2599bd7ba60 arm64: dts: rockchip: enable HDMI sound on FriendlyElec NanoPC-T6 e0105bf99fc5 arm64: dts: rockchip: enable HDMI1 on FriendlyElec NanoPC-T6 993f067b157f arm64: dts: rockchip: Enable ufshc on rk3576 evb1 board 9503e1049d7d arm64: dts: rockchip: change rng reset id back to its constant value 6769059a9a92 dt-bindings: crypto: qcom-qce: document QCS615 crypto engine 8b630d3d0343 spi: dt-bindings: st,stm32mp25-ospi: Make "resets" a required property 41f5c2138eda ASoC: dt-bindings: fsl,mqs: Reference common DAI properties aca7d7c8231d ASoC: dt-bindings: maxim,max98925: Fix include placement in DTS example 85cb1980874d ASoC: dt-bindings: wcd93xx: add bindings for audio mux controlling hp bda617efa5fc dt-bindings: display: panel: samsung,atna40yk20: document ATNA40YK20 6567ff08e8a6 arm64: dts: socfpga: agilex: Add dma channel id for spi 74c2199c410b arm64: dts: socfpga: agilex5: add led and memory nodes 6314a862e1f0 arm64: dts: intel: socfpga_agilex: add frequencies to internal oscillators b6d3a349163f ARM: dts: socfpga: Add basic support for Terrasic's de10-nano edfe33549623 dt-bindings: altera: Add compatible for Terasic's DE10-nano 1848a10387d0 arm64: dts: socfpga: agilex5: add qspi flash node ead0491aa20a dt-bindings: firmware: stratix10: Convert to json-schema d2eb681bb33e dt-bindings: fpga: stratix10: Convert to json-schema 77eaed14fef5 arm64: dts: socfpga: agilex5: fix gpio0 address d8b351236603 arm64: dts: socfpga: agilex5: add NAND daughter board 638d117a6307 dt-bindings: intel: document Agilex5 NAND daughter board 0b86dfc98961 dt-bindings: net: wireless: describe the ath12k AHB module for IPQ5332 31fe92148c84 dt-bindings: gpu: v3d: Add V3D driver maintainer as DT maintainer 3b8d3bd14126 dt-bindings: gpu: v3d: Add SMS register to BCM2712 compatible e45f0f5ee9c5 dt-bindings: gpu: v3d: Add per-compatible register restrictions 146ae6a0cc6a arm64: dts: qcom: x1e001de-devkit: fix USB retimer reset polarity 3f64d8354c4d arm64: dts: qcom: qcs8300: Add RPMh sleep stats 110c25056755 arm64: dts: qcom: ipq9574: Add nsscc node 76e32ecd464a Merge branch '20250313110359.242491-1-quic_mmanikan@quicinc.com' into arm64-for-6.15 fe21f24088be arm64: dts: qcom: x1e80100: enable rtc 1f7bad44a3d1 arm64: dts: qcom: sc8280xp-x13s: switch to uefi rtc offset 1932030c0c07 arm64: dts: qcom: sm8650: Fix domain-idle-state for CPU2 061462bb07da ARM: dts: qcom: Initial dts for LG Nexus 4 3705995fb324 arm64: dts: qcom: sa8775p: Add LMH interrupts for cpufreq_hw node ac0b8ef17d01 arm64: dts: qcom: qcs615: remove disallowed property in spmi bus node 31de34fe7762 arm64: dts: qcom: x1e80100-vivobook-s15: Enable micro-sd card reader c8133dbde91d arm64: dts: qcom: x1e80100-vivobook-s15: Enable USB-A ports 7333726fee23 arm64: dts: qcom: ipq5424: enable GPIO based LEDs and Buttons 99e6dcb2c981 arm64: dts: qcom: sm7325-nothing-spacewar: Enable panel and GPU d1449baefa9d ARM: dts: qcom: msm8226-samsung-matisse-common: Enable modem 218a51a4c950 ARM: dts: qcom: msm8926-htc-memul: Enable modem ec85529af07e ARM: dts: qcom: Introduce dtsi for LTE-capable MSM8926 8927425afd18 ARM: dts: qcom: msm8226: Add BAM DMUX Ethernet/IP device 2a8d7e638921 ARM: dts: qcom: msm8226: Add modem remoteproc node 5303a947ab02 ARM: dts: qcom: msm8226: Add smsm node 2f298f8b4106 ARM: dts: qcom: msm8226: Add node for TCSR halt regs ce1a1df49c35 arm64: dts: qcom: qcs6490-rb3gen2-vision-mezzanine: Add vision mezzanine ef593efe4221 arm64: dts: qcom: sc7280: Add support for camss 81f54e00f40f arm64: dts: qcom: ipq9574: Fix USB vdd info a2f9aa17c719 arm64: dts: qcom: qcm6490-idp: Update protected clocks list f1964aec801b arm64: dts: qcom: x1e78100-t14s: fix missing HID supplies efe9b44f4f23 arm64: dts: qcom: x1e80100-qcp: mark l12b and l15b always-on 65f57c317bff arm64: dts: qcom: x1e80100-yoga-slim7x: mark l12b and l15b always-on 4df0b435b8ce arm64: dts: qcom: x1e80100-hp-x14: mark l12b and l15b always-on 40cf0d330276 arm64: dts: qcom: x1e80100-dell-xps13-9345: mark l12b and l15b always-on 62a8ce218aa0 arm64: dts: qcom: x1e001de-devkit: mark l12b and l15b always-on 53e58f66f64f arm64: dts: qcom: x1e78100-t14s: mark l12b and l15b always-on 52f17b4830b6 arm64: dts: qcom: x1e80100-crd: mark l12b and l15b always-on 2e0f9145b47e arm64: dts: qcom: sc8280xp-crd: add support for volume-up key 8555fbf8367f arm64: dts: qcom: x1e80100-crd: Drop duplicate DMIC supplies 715f877e8303 arm64: dts: qcom: sc8280xp-x13s: Drop duplicate DMIC supplies 1991771e2f0d arm64: dts: qcom: x1e78100-t14s: Add OLED variant 2d3002b4a49d arm64: dts: qcom: x1e78100-t14s: Add LCD variant with backlight support fb84b985b331 dt-bindings: arm: qcom: Document Lenovo ThinkPad T14s Gen 6 LCD and OLED 34f18fc9f9a9 arm64: dts: qcom: qcm6490-fairphone-fp5: Add touchscreen node 0fc33da859aa arm64: dts: qcom: sm8750: Correct clocks property for uart14 node e392ce11427f arm64: dts: qcom: qcs6490-rb3gen2: Add orientation gpio 265874138759 arm64: dts: qcom: ipq5424: add reserved memory region for bootloader 3bb2a608664d arm64: dts: qcom: qcs8300: Add device node for gfx_smmu 4ea98a741024 arm64: dts: qcom: qcs8300-ride: Enable second USB controller on QCS8300 Ride dc6e06f3ca59 arm64: dts: qcom: sm8250: Fix CPU7 opp table 2ea8db25021b arm64: dts: qcom: x1e80100-crd: add gpio-keys label for lid switch 05a7db3bd663 arm64: dts: qcom: x1e80100-crd: add support for volume-up key 804469542c98 arm64: dts: qcom: x1e001de-devkit: Drop clock-names from PS8830 cf004f327add arm64: dts: qcom: x1e80100-romulus: Drop clock-names from PS8830 ae4ea2fc84d5 arm64: dts: qcom: x1e80100-dell-xps13-9345: Drop clock-names from PS8830 8f90f22d05b4 arm64: dts: qcom: sc8180x: Rename AOSS_QMP to power-management 76cf4114ff7b arm64: dts: qcom: qcs615: Rename AOSS_QMP to power-management b5c3438db8ee arm64: dts: qcom: sdx75: Rename AOSS_QMP to power-management c7537e0429c8 arm64: dts: qcom: sdx75: Fix up the USB interrupt description b0786b5d200c arm64: dts: qcom: ipq9574: Remove eMMC node c1d9b6d09198 arm64: dts: qcom: ipq9574: Enable SPI NAND for ipq9574 494f401c3e8c arm64: dts: qcom: ipq9574: Add SPI nand support 0800cd2ac181 arm64: dts: qcom: sm6125: Initial support for xiaomi-ginkgo 44f77eafc733 dt-bindings: arm: qcom: Add Xiaomi Redmi Note 8 7076352823cc arm64: dts: qcom: sc7280: drop video decoder and encoder nodes 52bfe54b74fa arm64: dts: qcom: sa8775p: Add CTCU and ETR nodes 498de1e01884 arm64: dts: qcom: qrb5165-rb5: add compressed playback support 773069e8ecaf arm64: dts: qcom: sm8650: add PPI interrupt partitions for the ARM PMUs 07ddcafd37f3 arm64: dts: qcom: sm8650: switch to interrupt-cells 4 to add PPI partitions 652b5ebbff21 ARM: dts: qcom: msm8960: Add thermal sensor (tsens) 3278100c97aa arm64: dts: qcom: qcs615: add TRNG node bb2b0cc8d9a8 arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states c1a73ba7c1cf arm64: dts: qcom: sm8450: add PCIe EP device nodes 718439f6e82d arm64: dts: qcom: sar2130p: add PCIe EP device nodes 9cf55d5faba5 arm64: dts: qcom: Drop `tx-sched-sp` property 568f3c8b2b5d ARM: dts: qcom: msm8960: Add BAM ab027c48e4ad arm64: dts: qcom: msm8917-xiaomi-riva: Add display backlight 2138fc94be48 arm64: dts: qcom: pm8937: Add LPG PWM driver e91a4033e4ce arm64: dts: qcom: ipq9574: fix the msi interrupt numbers of pcie3 38691f9d0837 arm64: dts: qcom: ipq9574: Add missing properties for cryptobam be1438b63f67 arm64: dts: qcom: sa8775p: Add missing properties for cryptobam 66b846921c08 arm64: dts: qcom: sm8650: Add missing properties for cryptobam 2dac12521235 arm64: dts: qcom: sm8550: Add missing properties for cryptobam fdc35bd52bc8 arm64: dts: qcom: sm8450: Add missing properties for cryptobam 4a32c2aa8f4e arm64: dts: qcom: sm8350: Reenable crypto & cryptobam 52d68253ad12 arm64: dts: qcom: sm8750-qrd: Enable CDSP c82aa2b08a97 arm64: dts: qcom: sm8750-mtp: Enable CDSP 5f73938ce2e7 arm64: dts: qcom: sm8750: Add CDSP 9cd9e329ed44 arm64: dts: qcom: sm8750-qrd: Enable ADSP 9f7809fb268c arm64: dts: qcom: sm8750-mtp: Enable ADSP daf1a64625c6 arm64: dts: qcom: sm8750: Add LPASS macro codecs and pinctrl ffabaffd686a arm64: dts: qcom: sm8750: Add IPCC, SMP2P, AOSS and ADSP e4c81cca30eb arm64: dts: qcom: ipq5424: Enable MMC add2c5457210 arm64: dts: qcom: sm8750: Add ICE nodes 732dd897ea8f arm64: dts: qcom: sm8750: Add TRNG nodes 918bf155967b arm64: dts: qcom: sm8750: Add QCrypto nodes 1b23fab56ee1 arm64: dts: qcom: Use recommended MBN firmware path c08efec1e5aa dt-bindings: display: simple: Add POWERTIP PH128800T004-ZZA01 panel 0b314a523a02 arm64: dts: qcom: sdm845-starqltechn: add touchscreen support 53102db27a11 arm64: dts: qcom: sdm845-starqltechn: add display PMIC ff7fcf3adb6f arm64: dts: qcom: sdm845-starqltechn: add max77705 PMIC 3548ab694bac arm64: dts: qcom: sdm845-starqltechn: add gpio keys e999ae3e334e arm64: dts: qcom: sdm845-starqltechn: remove excess reserved gpios eccbdc90a7a6 arm64: dts: qcom: sdm845-starqltechn: refactor node order c40aa640a72e arm64: dts: qcom: sdm845-starqltechn: fix usb regulator mistake 53c6b51bd2f3 arm64: dts: qcom: sdm845-starqltechn: remove wifi 8016d08c4ee4 arm64: dts: qcom: sdm845: enable gmu 7558c172ac2c arm64: dts: qcom: x1e80100-t14s: Enable external DisplayPort support c8b1cf4d58de arm64: dts: qcom: x1e80100-t14s: Describe the Parade PS8830 retimers e8f48aa148c3 arm64: dts: qcom: x1e80100-crd: Enable external DisplayPort support 12953b040829 arm64: dts: qcom: x1e80100-crd: Describe the Parade PS8830 retimers 1c12f1a1c5e0 arm64: dts: qcom: x1e80100-romulus: Keep L12B and L15B always on cd6009eec380 arm64: dts: qcom: sm8650: add all 8 coresight ETE nodes 08f0a5fbfb5c arm64: dts: qcom: x1e80100-qcp: Add WiFi/BT pwrseq c86a96b79dc4 arm64: dts: qcom: sm8750: Add RPMh sleep stats b6ad871ee6ae arm64: dts: qcom: Correct white-space style 80b421a10451 arm64: dts: qcom: sm8750: Change labels to lower-case deee6d373e3f arm64: dts: qcom: sdm632-fairphone-fp3: Enable modem e919ef3dc364 arm64: dts: qcom: sdm632-fairphone-fp3: Add firmware-name for adsp & wcnss 56e365fe287f arm64: dts: qcom: sdm632-fairphone-fp3: Add newlines between regulator nodes 50e52f7993e6 arm64: dts: qcom: sdm632-fairphone-fp3: Move status properties last 0f637990483d arm64: dts: qcom: qcs615: Add Command DB support c2141cabcc17 arm64: dts: qcom: sm8250-elish: Switch to undeprecated qcom,calibration-variant ec526e787936 arm64: dts: qcom: sc8280xp: Switch to undeprecated qcom,calibration-variant 5360722ae36a arm64: dts: qcom: sa8775p-ride: Switch to undeprecated qcom,calibration-variant 7f183e0e4b2a arm64: dts: qcom: qcm6490: Switch to undeprecated qcom,calibration-variant 20ccf83f7dc8 arm64: dts: qcom: sm8150-hdk: Switch to undeprecated qcom,calibration-variant a2aae9258894 arm64: dts: qcom: sm6115: Switch to undeprecated qcom,calibration-variant bc753687cc11 arm64: dts: qcom: sda660-ifc6560: Switch to undeprecated qcom,calibration-variant 766ecec7fc27 arm64: dts: qcom: sdm845: Switch to undeprecated qcom,calibration-variant b81275ed77c7 arm64: dts: qcom: sc7180: Switch to undeprecated qcom,calibration-variant 003514422bb8 arm64: dts: qcom: qrb4210-rb2: Switch to undeprecated qcom,calibration-variant 372494e32ec5 arm64: dts: qcom: qrb2210-rb1: Switch to undeprecated qcom,calibration-variant 3d7f887f925f arm64: dts: qcom: msm8998: Switch to undeprecated qcom,calibration-variant 2a6360a0bcaa ARM: dts: qcom: ipq4018: Switch to undeprecated qcom,calibration-variant 711fd3c53856 arm64: dts: qcom: x1e80100-qcp: Enable HBR3 on external DPs 458ec1a15657 arm64: dts: qcom: x1e80100-hp-x14: Enable HBR3 on external DPs d6a6bfedf9ae arm64: dts: qcom: x1e001de-devkit: Enable HBR3 on external DPs f8e50df5d86b arm64: dts: qcom: x1e80100-dell-xps13-9345: Enable external DP support ae23d69c45b0 arm64: dts: qcom: sdm845-db845c-navigation-mezzanine: Drop CMA heap 8e96ef991250 arm64: dts: qcom: qrb5165-rb5-vision-mezzanine: Drop CMA heap 4b367fd64b02 arm64: dts: qcom: x1e80100: Drop unused passive thermal trip points for CPU ebf1f1e6c385 arm64: dts: qcom: x1e80100: Add GPU cooling 1cd853d3e939 arm64: dts: qcom: x1e80100: Apply consistent critical thermal shutdown 989e32428df3 arm64: dts: qcom: x1e80100: Fix video thermal zone 9eb704b5190c arm64: dts: qcom: sm8650: add missing cpu-cfg interconnect path in the mdss node b254425701f6 arm64: dts: qcom: sm8550: add missing cpu-cfg interconnect path in the mdss node a7f79cd2cb8c arm64: dts: qcom: x1e80100-slim7x: Drop incorrect qcom,ath12k-calibration-variant a9f8c3d91d5b arm64: dts: qcom: qcs8300: Partially revert "arm64: dts: qcom: qcs8300: add QCrypto nodes" 86e24dafc90b arm64: dts: qcom: sa8775p: Partially revert "arm64: dts: qcom: sa8775p: add QCrypto nodes" 06c923231f08 arm64: dts: qcom: sdm630: Add missing resets to mmc blocks 25333fee1f77 Merge branch '20250203063427.358327-2-alexeymin@postmarketos.org' into arm64-for-6.15 7b608006630d arm64: dts: qcom: sm8650: add UFS OPP table instead of freq-table-hz property 0e0842f4df4b arm64: dts: qcom: sm8650: add QUP serial engines OPP tables 93cb0237bce4 arm64: dts: qcom: sm8650: add OPP table support to PCIe ca623f9ea777 arm64: dts: qcom: sm8650: add USB interconnect paths f839c213fc9c arm64: dts: qcom: sm8650: set CPU interconnect paths as ACTIVE_ONLY e53196775ca4 arm64: dts: qcom: sm8650: use ICC tag for IPA interconnect phandles 706f8f120ead arm64: dts: qcom: sm8550: add QUP serial engines OPP tables 967498cd6d5c arm64: dts: qcom: sm8550: add OPP table support to PCIe 9642703be003 arm64: dts: qcom: sm8550: set CPU interconnect paths as ACTIVE_ONLY ee0cb175c65e arm64: dts: qcom: sm8550: use ICC tag for all interconnect phandles ca70a7700ecf arm64: dts: qcom: qcm6490-fairphone-fp5: Enable the GPU eb752ff527d3 arm64: dts: qcom: qcm6490-fairphone-fp5: Enable display 1d95c3da8c55 arm64: dts: qcom: sm7325-nothing-spacewar: Enable camera EEPROMs dc2ab4600182 arm64: dts: qcom: sm7325-nothing-spacewar: Add CAM fixed-regulators 4ba736c0dcd3 arm64: dts: qcom: sm8650: drop remaining polling-delay-passive properties 4ec33ea53ea8 arm64: dts: qcom: sm8650: harmonize all unregulated thermal trip points ef1efd695a2e arm64: dts: qcom: sm8650: setup gpu thermal with higher temperatures 8f99a70eeaf5 arm64: dts: qcom: sm8650: drop cpu thermal passive trip points b2141c8af961 arm64: dts: qcom: Add X1P42100 SoC and CRD 536623483d06 arm64: dts: qcom: Commonize X1 CRD DTSI f41f13783cb5 arm64: dts: qcom: x1e80100: Wire up PCIe PHY NOCSR resets e57b76ee802c arm64: dts: qcom: qcs8300: Add QUPv3 configuration 736071f5b962 arm64: dts: qcom: ipq5424: Add thermal zone nodes eb736b571ca1 arm64: dts: qcom: ipq5424: Add tsens node 8198b0084ab9 arm64: dts: qcom: ipq5332: Add thermal zone nodes 3009d9c8d08e arm64: dts: qcom: ipq5332: Add tsens node 1c84ea51ce71 arm64: dts: qcom: ipq6018: add LDOA2 regulator 747916e6b00a arm64: dts: qcom: ipq6018: rename labels of mp5496 regulator 863c608cd0b9 arm64: dts: qcom: ipq6018: move mp5496 regulator out of soc dtsi da4ec8d0edbc arm64: dts: qcom: ipq6018: add 1.5GHz CPU Frequency 80e82218d6e1 arm64: dts: qcom: ipq6018: add 1.2GHz CPU Frequency 19ceff512d98 arm64: dts: qcom: sa8775p-ride: Add firmware-name in BT node 57a9930fcd81 arm64: dts: qcom: x1e80100: Mark usb_2 as dma-coherent 1237cb4eccbd arm64: dts: qcom: qrb5165-rb5: enable sensors DSP 1f5e82091632 arm64: dts: qcom: sdm845-db845c: enable sensors DSP faf34ece59aa arm64: dts: qcom: sc8280xp: Fix clock for spi0 to spi7 94a09b9504e4 arm64: dts: qcom: qcs8300-ride: Enable PMIC peripherals 94da6d6bf1fe arm64: dts: qcom: qcs8300: Adds SPMI support 79bffbd44317 ARM: dts: qcom: Fix indentation errors 233806c3ca1d arm64: dts: qcom: qcm2290: Add uart3 node e10add854aaa arm64: dts: qcom: qcs6490-rb3gen2: add and enable BT node eabcc9205de0 arm64: dts: qcom: sm8650: add cpu OPP table with DDR, LLCC & L3 bandwidths 2f231a9d2e0f arm64: dts: qcom: sm8650: add cpu interconnect nodes 6eedd85983ed arm64: dts: qcom: sm8650: add OSM L3 node 6e335b12f60e arm64: dts: qcom: x1e80100: Add the watchdog device b926cb91094d arm64: dts: qcom: qcs6490-rb3gen2: Add vadc and adc-tm channels cb00ad63e5ce arm64: dts: qcom: sc8280xp-pmics: Add more temp-alarm devices bb44fe9e84d2 arm64: dts: qcom: sc8280xp-pmics: Fix slave ID in interrupts configuration 668f6b1e8012 arm64: dts: qcom: x1e80100: Set CPU interconnect paths as ACTIVE_ONLY git-subtree-dir: dts/upstream git-subtree-split: d08867ef8f12adb80b84725a5e82538a5ca46a12
This commit is contained in:
Tom Rini
parent
a6b479b7ad
commit
ecec23fc9a
@ -47,6 +47,7 @@ properties:
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- novtech,chameleon96
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- samtec,vining
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- terasic,de0-atlas
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- terasic,de10-nano
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- terasic,socfpga-cyclone5-sockit
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- const: altr,socfpga-cyclone5
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- const: altr,socfpga
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@ -9,20 +9,120 @@ title: Altera SOCFPGA Clock Manager
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maintainers:
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- Dinh Nguyen <dinguyen@kernel.org>
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description: test
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description:
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This binding describes the Altera SOCFGPA Clock Manager and its associated
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tree of clocks, pll's, and clock gates for the Cyclone5, Arria5 and Arria10
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chip families.
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properties:
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compatible:
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items:
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- const: altr,clk-mgr
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reg:
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maxItems: 1
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clocks:
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type: object
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additionalProperties: false
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properties:
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^osc[0-9]$":
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type: object
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"^[a-z0-9,_]+(clk|pll|clk_gate|clk_divided)(@[a-f0-9]+)?$":
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type: object
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$ref: '#/$defs/clock-props'
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unevaluatedProperties: false
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properties:
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compatible:
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enum:
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- altr,socfpga-pll-clock
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- altr,socfpga-perip-clk
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- altr,socfpga-gate-clk
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- altr,socfpga-a10-pll-clock
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- altr,socfpga-a10-perip-clk
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- altr,socfpga-a10-gate-clk
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- fixed-clock
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clocks:
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description: one or more phandles to input clock
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minItems: 1
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maxItems: 5
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"#address-cells":
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const: 1
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"#size-cells":
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const: 0
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patternProperties:
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"^[a-z0-9,_]+(clk|pll)(@[a-f0-9]+)?$":
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type: object
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$ref: '#/$defs/clock-props'
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unevaluatedProperties: false
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properties:
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compatible:
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enum:
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- altr,socfpga-perip-clk
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- altr,socfpga-gate-clk
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- altr,socfpga-a10-perip-clk
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- altr,socfpga-a10-gate-clk
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clocks:
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description: one or more phandles to input clock
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minItems: 1
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maxItems: 4
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required:
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- compatible
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- clocks
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- "#clock-cells"
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required:
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- compatible
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- "#clock-cells"
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required:
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- compatible
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- reg
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additionalProperties: false
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$defs:
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clock-props:
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properties:
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reg:
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maxItems: 1
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"#clock-cells":
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const: 0
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clk-gate:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: gating register offset
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- description: bit index
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div-reg:
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: divider register offset
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- description: bit shift
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- description: bit width
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fixed-divider:
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$ref: /schemas/types.yaml#/definitions/uint32
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examples:
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- |
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clkmgr@ffd04000 {
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@ -27,6 +27,7 @@ properties:
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items:
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- enum:
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- minix,neo-x8
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- tcu,fernsehfee3
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- const: amlogic,meson8
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- description: Boards with the Amlogic Meson8m2 SoC
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@ -73,6 +74,13 @@ properties:
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- const: amlogic,s805x
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- const: amlogic,meson-gxl
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- description: Boards with the Amlogic Meson GXL S805Y SoC
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items:
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- enum:
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- xiaomi,aquaman
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- const: amlogic,s805y
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- const: amlogic,meson-gxl
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- description: Boards with the Amlogic Meson GXL S905W SoC
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items:
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- enum:
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@ -237,6 +245,24 @@ properties:
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- amlogic,aq222
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- const: amlogic,s4
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- description: Boards with the Amlogic S6 S905X5 SoC
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items:
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- enum:
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- amlogic,bl209
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- const: amlogic,s6
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- description: Boards with the Amlogic S7 S805X3 SoC
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items:
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- enum:
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- amlogic,bp201
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- const: amlogic,s7
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- description: Boards with the Amlogic S7D S905X5M SoC
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items:
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- enum:
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- amlogic,bm202
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- const: amlogic,s7d
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- description: Boards with the Amlogic T7 A311D2 SoC
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items:
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- enum:
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@ -30,6 +30,19 @@ properties:
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power-domains:
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maxItems: 1
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clocks:
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minItems: 1
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maxItems: 3
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clock-names:
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oneOf:
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- items:
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- enum: [apb_pclk, atclk]
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- items: # Zynq-700
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- const: apb_pclk
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- const: dbg_trc
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- const: dbg_apb
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in-ports:
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$ref: /schemas/graph.yaml#/properties/ports
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additionalProperties: false
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49
Bindings/arm/atmel,sama5d2-secumod.yaml
Normal file
49
Bindings/arm/atmel,sama5d2-secumod.yaml
Normal file
@ -0,0 +1,49 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/arm/atmel,sama5d2-secumod.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip AT91 Security Module (SECUMOD)
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maintainers:
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- Nicolas Ferre <nicolas.ferre@microchip.com>
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description:
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The Security Module also offers the PIOBU pins which can be used as GPIO pins.
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Note that they maintain their voltage during Backup/Self-refresh.
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properties:
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compatible:
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oneOf:
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- items:
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- const: atmel,sama5d2-secumod
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- const: syscon
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- items:
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- enum:
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- microchip,sama7d65-secumod
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- microchip,sama7g5-secumod
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- const: atmel,sama5d2-secumod
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- const: syscon
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reg:
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maxItems: 1
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gpio-controller: true
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"#gpio-cells":
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const: 2
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required:
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- compatible
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- reg
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unevaluatedProperties: false
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examples:
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- |
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security-module@fc040000 {
|
||||
compatible = "atmel,sama5d2-secumod", "syscon";
|
||||
reg = <0xfc040000 0x100>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
@ -46,28 +46,3 @@ Examples:
|
||||
reg = <0xffffe800 0x200>;
|
||||
};
|
||||
|
||||
Security Module (SECUMOD)
|
||||
|
||||
The Security Module macrocell provides all necessary secure functions to avoid
|
||||
voltage, temperature, frequency and mechanical attacks on the chip. It also
|
||||
embeds secure memories that can be scrambled.
|
||||
|
||||
The Security Module also offers the PIOBU pins which can be used as GPIO pins.
|
||||
Note that they maintain their voltage during Backup/Self-refresh.
|
||||
|
||||
required properties:
|
||||
- compatible: Should be "atmel,<chip>-secumod", "syscon".
|
||||
<chip> can be "sama5d2".
|
||||
- reg: Should contain registers location and length
|
||||
- gpio-controller: Marks the port as GPIO controller.
|
||||
- #gpio-cells: There are 2. The pin number is the
|
||||
first, the second represents additional
|
||||
parameters such as GPIO_ACTIVE_HIGH/LOW.
|
||||
|
||||
|
||||
secumod@fc040000 {
|
||||
compatible = "atmel,sama5d2-secumod", "syscon";
|
||||
reg = <0xfc040000 0x100>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
|
||||
@ -52,6 +52,7 @@ properties:
|
||||
- description: BCM2837 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- raspberrypi,2-model-b-rev2
|
||||
- raspberrypi,3-model-a-plus
|
||||
- raspberrypi,3-model-b
|
||||
- raspberrypi,3-model-b-plus
|
||||
|
||||
@ -10,9 +10,9 @@ maintainers:
|
||||
- Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
|
||||
|
||||
description: |+
|
||||
The device tree allows to describe the layout of CPUs in a system through
|
||||
the "cpus" node, which in turn contains a number of subnodes (ie "cpu")
|
||||
defining properties for every cpu.
|
||||
The device tree allows to describe the layout of CPUs in a system through the
|
||||
"cpus" node, which in turn contains a number of subnodes (ie "cpu") defining
|
||||
properties for every cpu.
|
||||
|
||||
Bindings for CPU nodes follow the Devicetree Specification, available from:
|
||||
|
||||
@ -41,45 +41,40 @@ description: |+
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
description: |
|
||||
Usage and definition depend on ARM architecture version and
|
||||
configuration:
|
||||
description: >
|
||||
Usage and definition depend on ARM architecture version and configuration:
|
||||
|
||||
On uniprocessor ARM architectures previous to v7
|
||||
this property is required and must be set to 0.
|
||||
On uniprocessor ARM architectures previous to v7 this property is required
|
||||
and must be set to 0.
|
||||
|
||||
On ARM 11 MPcore based systems this property is
|
||||
required and matches the CPUID[11:0] register bits.
|
||||
On ARM 11 MPcore based systems this property is required and matches the
|
||||
CPUID[11:0] register bits.
|
||||
|
||||
Bits [11:0] in the reg cell must be set to
|
||||
bits [11:0] in CPU ID register.
|
||||
Bits [11:0] in the reg cell must be set to bits [11:0] in CPU ID register.
|
||||
|
||||
All other bits in the reg cell must be set to 0.
|
||||
|
||||
On 32-bit ARM v7 or later systems this property is
|
||||
required and matches the CPU MPIDR[23:0] register
|
||||
bits.
|
||||
On 32-bit ARM v7 or later systems this property is required and matches
|
||||
the CPU MPIDR[23:0] register bits.
|
||||
|
||||
Bits [23:0] in the reg cell must be set to
|
||||
bits [23:0] in MPIDR.
|
||||
Bits [23:0] in the reg cell must be set to bits [23:0] in MPIDR.
|
||||
|
||||
All other bits in the reg cell must be set to 0.
|
||||
|
||||
On ARM v8 64-bit systems this property is required
|
||||
and matches the MPIDR_EL1 register affinity bits.
|
||||
On ARM v8 64-bit systems this property is required and matches the
|
||||
MPIDR_EL1 register affinity bits.
|
||||
|
||||
* If cpus node's #address-cells property is set to 2
|
||||
|
||||
The first reg cell bits [7:0] must be set to
|
||||
bits [39:32] of MPIDR_EL1.
|
||||
The first reg cell bits [7:0] must be set to bits [39:32] of
|
||||
MPIDR_EL1.
|
||||
|
||||
The second reg cell bits [23:0] must be set to
|
||||
bits [23:0] of MPIDR_EL1.
|
||||
The second reg cell bits [23:0] must be set to bits [23:0] of
|
||||
MPIDR_EL1.
|
||||
|
||||
* If cpus node's #address-cells property is set to 1
|
||||
|
||||
The reg cell bits [23:0] must be set to bits [23:0]
|
||||
of MPIDR_EL1.
|
||||
The reg cell bits [23:0] must be set to bits [23:0] of MPIDR_EL1.
|
||||
|
||||
All other bits in the reg cells must be set to 0.
|
||||
|
||||
@ -273,103 +268,122 @@ properties:
|
||||
description:
|
||||
The DT specification defines this as 64-bit always, but some 32-bit Arm
|
||||
systems have used a 32-bit value which must be supported.
|
||||
Required for systems that have an "enable-method"
|
||||
property value of "spin-table".
|
||||
|
||||
cpu-idle-states:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
maxItems: 1
|
||||
description: |
|
||||
List of phandles to idle state nodes supported
|
||||
by this cpu (see ./idle-states.yaml).
|
||||
description:
|
||||
List of phandles to idle state nodes supported by this cpu (see
|
||||
./idle-states.yaml).
|
||||
|
||||
capacity-dmips-mhz:
|
||||
description:
|
||||
u32 value representing CPU capacity (see ../cpu/cpu-capacity.txt) in
|
||||
DMIPS/MHz, relative to highest capacity-dmips-mhz
|
||||
in the system.
|
||||
DMIPS/MHz, relative to highest capacity-dmips-mhz in the system.
|
||||
|
||||
cci-control-port: true
|
||||
|
||||
dynamic-power-coefficient:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description:
|
||||
A u32 value that represents the running time dynamic
|
||||
power coefficient in units of uW/MHz/V^2. The
|
||||
coefficient can either be calculated from power
|
||||
description: >
|
||||
A u32 value that represents the running time dynamic power coefficient in
|
||||
units of uW/MHz/V^2. The coefficient can either be calculated from power
|
||||
measurements or derived by analysis.
|
||||
|
||||
The dynamic power consumption of the CPU is
|
||||
proportional to the square of the Voltage (V) and
|
||||
the clock frequency (f). The coefficient is used to
|
||||
The dynamic power consumption of the CPU is proportional to the square of
|
||||
the Voltage (V) and the clock frequency (f). The coefficient is used to
|
||||
calculate the dynamic power as below -
|
||||
|
||||
Pdyn = dynamic-power-coefficient * V^2 * f
|
||||
|
||||
where voltage is in V, frequency is in MHz.
|
||||
|
||||
interconnects:
|
||||
minItems: 1
|
||||
maxItems: 3
|
||||
|
||||
nvmem-cells:
|
||||
maxItems: 1
|
||||
|
||||
nvmem-cell-names:
|
||||
const: speed_grade
|
||||
|
||||
performance-domains:
|
||||
maxItems: 1
|
||||
description:
|
||||
List of phandles and performance domain specifiers, as defined by
|
||||
bindings of the performance domain provider. See also
|
||||
dvfs/performance-domain.yaml.
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
List of phandles and PM domain specifiers, as defined by bindings of the
|
||||
PM domain provider (see also ../power_domain.txt).
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
power-domain-names:
|
||||
description:
|
||||
A list of power domain name strings sorted in the same order as the
|
||||
power-domains property.
|
||||
|
||||
For PSCI based platforms, the name corresponding to the index of the PSCI
|
||||
PM domain provider, must be "psci". For SCMI based platforms, the name
|
||||
corresponding to the index of an SCMI performance domain provider, must be
|
||||
"perf".
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
enum: [ psci, perf, cpr ]
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
arm-supply:
|
||||
deprecated: true
|
||||
description: Use 'cpu-supply' instead
|
||||
|
||||
cpu0-supply:
|
||||
deprecated: true
|
||||
description: Use 'cpu-supply' instead
|
||||
|
||||
mem-supply: true
|
||||
|
||||
proc-supply:
|
||||
deprecated: true
|
||||
description: Use 'cpu-supply' instead
|
||||
|
||||
sram-supply:
|
||||
deprecated: true
|
||||
description: Use 'mem-supply' instead
|
||||
|
||||
mediatek,cci:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: Link to Mediatek Cache Coherent Interconnect
|
||||
|
||||
qcom,saw:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
Specifies the SAW* node associated with this CPU.
|
||||
|
||||
Required for systems that have an "enable-method" property
|
||||
value of "qcom,kpss-acc-v1" or "qcom,kpss-acc-v2"
|
||||
|
||||
* arm/msm/qcom,saw2.txt
|
||||
description:
|
||||
Specifies the SAW node associated with this CPU.
|
||||
|
||||
qcom,acc:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
Specifies the ACC* node associated with this CPU.
|
||||
description:
|
||||
Specifies the ACC node associated with this CPU.
|
||||
|
||||
Required for systems that have an "enable-method" property
|
||||
value of "qcom,kpss-acc-v1", "qcom,kpss-acc-v2", "qcom,msm8226-smp" or
|
||||
"qcom,msm8916-smp".
|
||||
|
||||
* arm/msm/qcom,kpss-acc.txt
|
||||
qcom,freq-domain:
|
||||
description: Specifies the QCom CPUFREQ HW associated with the CPU.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
maxItems: 1
|
||||
|
||||
rockchip,pmu:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: |
|
||||
description: >
|
||||
Specifies the syscon node controlling the cpu core power domains.
|
||||
|
||||
Optional for systems that have an "enable-method"
|
||||
property value of "rockchip,rk3066-smp"
|
||||
While optional, it is the preferred way to get access to
|
||||
the cpu-core power-domains.
|
||||
Optional for systems that have an "enable-method" property value of
|
||||
"rockchip,rk3066-smp". While optional, it is the preferred way to get
|
||||
access to the cpu-core power-domains.
|
||||
|
||||
secondary-boot-reg:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: |
|
||||
description: >
|
||||
Required for systems that have an "enable-method" property value of
|
||||
"brcm,bcm11351-cpu-method", "brcm,bcm23550" or "brcm,bcm-nsp-smp".
|
||||
|
||||
This includes the following SoCs: |
|
||||
BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550
|
||||
This includes the following SoCs:
|
||||
BCM11130, BCM11140, BCM11351, BCM28145, BCM28155, BCM21664, BCM23550,
|
||||
BCM58522, BCM58525, BCM58535, BCM58622, BCM58623, BCM58625, BCM88312
|
||||
|
||||
The secondary-boot-reg property is a u32 value that specifies the
|
||||
@ -378,22 +392,66 @@ properties:
|
||||
formed by encoding the target CPU id into the low bits of the
|
||||
physical start address it should jump to.
|
||||
|
||||
if:
|
||||
# If the enable-method property contains one of those values
|
||||
properties:
|
||||
enable-method:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm11351-cpu-method
|
||||
- brcm,bcm23550
|
||||
- brcm,bcm-nsp-smp
|
||||
# and if enable-method is present
|
||||
required:
|
||||
- enable-method
|
||||
thermal-idle:
|
||||
type: object
|
||||
|
||||
then:
|
||||
required:
|
||||
- secondary-boot-reg
|
||||
allOf:
|
||||
- $ref: /schemas/cpu.yaml#
|
||||
- $ref: /schemas/opp/opp-v1.yaml#
|
||||
- if:
|
||||
# If the enable-method property contains one of those values
|
||||
properties:
|
||||
enable-method:
|
||||
contains:
|
||||
enum:
|
||||
- brcm,bcm11351-cpu-method
|
||||
- brcm,bcm23550
|
||||
- brcm,bcm-nsp-smp
|
||||
# and if enable-method is present
|
||||
required:
|
||||
- enable-method
|
||||
then:
|
||||
required:
|
||||
- secondary-boot-reg
|
||||
- if:
|
||||
properties:
|
||||
enable-method:
|
||||
enum:
|
||||
- spin-table
|
||||
- renesas,r9a06g032-smp
|
||||
required:
|
||||
- enable-method
|
||||
then:
|
||||
required:
|
||||
- cpu-release-addr
|
||||
- if:
|
||||
properties:
|
||||
enable-method:
|
||||
enum:
|
||||
- qcom,kpss-acc-v1
|
||||
- qcom,kpss-acc-v2
|
||||
- qcom,msm8226-smp
|
||||
- qcom,msm8916-smp
|
||||
required:
|
||||
- enable-method
|
||||
then:
|
||||
required:
|
||||
- qcom,acc
|
||||
- qcom,saw
|
||||
else:
|
||||
if:
|
||||
# 2 Qualcomm platforms bootloaders need qcom,acc and qcom,saw yet use
|
||||
# "spin-table" or "psci" enable-methods. Disallowing the properties for
|
||||
# all other CPUs is the best we can do as there's not any way to
|
||||
# distinguish these Qualcomm platforms.
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
const: arm,cortex-a53
|
||||
then:
|
||||
properties:
|
||||
qcom,acc: false
|
||||
qcom,saw: false
|
||||
|
||||
required:
|
||||
- device_type
|
||||
@ -403,7 +461,7 @@ required:
|
||||
dependencies:
|
||||
rockchip,pmu: [enable-method]
|
||||
|
||||
additionalProperties: true
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
|
||||
41
Bindings/arm/freescale/fsl,imx51-m4if.yaml
Normal file
41
Bindings/arm/freescale/fsl,imx51-m4if.yaml
Normal file
@ -0,0 +1,41 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/freescale/fsl,imx51-m4if.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale Multi Master Multi Memory Interface (M4IF) and Tigerp module
|
||||
|
||||
description: collect the imx devices, which only have compatible and reg property
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- fsl,imx51-m4if
|
||||
- fsl,imx51-tigerp
|
||||
- fsl,imx51-aipstz
|
||||
- fsl,imx53-aipstz
|
||||
- fsl,imx7d-pcie-phy
|
||||
- items:
|
||||
- const: fsl,imx53-tigerp
|
||||
- const: fsl,imx51-tigerp
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
m4if@83fd8000 {
|
||||
compatible = "fsl,imx51-m4if";
|
||||
reg = <0x83fd8000 0x1000>;
|
||||
};
|
||||
@ -1,12 +0,0 @@
|
||||
* Freescale Multi Master Multi Memory Interface (M4IF) module
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "fsl,imx51-m4if"
|
||||
- reg : Address and length of the register set for the device
|
||||
|
||||
Example:
|
||||
|
||||
m4if: m4if@83fd8000 {
|
||||
compatible = "fsl,imx51-m4if";
|
||||
reg = <0x83fd8000 0x1000>;
|
||||
};
|
||||
@ -1,12 +0,0 @@
|
||||
* Freescale Tigerp platform module
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "fsl,imx51-tigerp"
|
||||
- reg : Address and length of the register set for the device
|
||||
|
||||
Example:
|
||||
|
||||
tigerp: tigerp@83fa0000 {
|
||||
compatible = "fsl,imx51-tigerp";
|
||||
reg = <0x83fa0000 0x28>;
|
||||
};
|
||||
@ -1120,6 +1120,12 @@ properties:
|
||||
- const: avnet,sm2s-imx8mp # SM2S-IMX8PLUS SoM
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: Boundary Devices Nitrogen8M Plus ENC Carrier Board
|
||||
items:
|
||||
- const: boundary,imx8mp-nitrogen-enc-carrier-board
|
||||
- const: boundary,imx8mp-nitrogen-som
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: Boundary Device Nitrogen8MP Universal SMARC Carrier Board
|
||||
items:
|
||||
- const: boundary,imx8mp-nitrogen-smarc-universal-board
|
||||
@ -1156,6 +1162,13 @@ properties:
|
||||
- const: kontron,imx8mp-osm-s # Kontron i.MX8MP OSM-S SoM
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: PHYTEC phyCORE-i.MX8MP FPSC based boards
|
||||
items:
|
||||
- enum:
|
||||
- phytec,imx8mp-libra-rdk-fpsc # i.MX 8M Plus Libra RDK
|
||||
- const: phytec,imx8mp-phycore-fpsc # phyCORE-i.MX 8M Plus FPSC
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: PHYTEC phyCORE-i.MX8MP SoM based boards
|
||||
items:
|
||||
- const: phytec,imx8mp-phyboard-pollux-rdk # phyBOARD-Pollux RDK
|
||||
@ -1176,6 +1189,12 @@ properties:
|
||||
- const: polyhex,imx8mp-debix-som-a # Polyhex Debix SOM A
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: Toradex Boards with SMARC iMX8M Plus Modules
|
||||
items:
|
||||
- const: toradex,smarc-imx8mp-dev # Toradex SMARC iMX8M Plus on Toradex SMARC Development Board
|
||||
- const: toradex,smarc-imx8mp # Toradex SMARC iMX8M Plus Module
|
||||
- const: fsl,imx8mp
|
||||
|
||||
- description: Toradex Boards with Verdin iMX8M Plus Modules
|
||||
items:
|
||||
- enum:
|
||||
@ -1333,6 +1352,22 @@ properties:
|
||||
- const: tq,imx8qxp-tqma8xqp # TQ-Systems GmbH TQMa8XQP SOM (with i.MX8QXP)
|
||||
- const: fsl,imx8qxp
|
||||
|
||||
- description:
|
||||
TQMa8XxS is a series of SOM featuring NXP i.MX8X system-on-chip
|
||||
variants. It has the SMARC-2.0 form factor and is designed to be placed on
|
||||
different carrier boards. MB-SMARC-2 is a carrier reference design.
|
||||
oneOf:
|
||||
- items:
|
||||
- enum:
|
||||
- tq,imx8qxp-tqma8xqps-mb-smarc-2 # TQ-Systems GmbH TQMa8QXPS SOM on MB-SMARC-2
|
||||
- const: tq,imx8qxp-tqma8xqps # TQ-Systems GmbH TQMa8QXPS SOM
|
||||
- const: fsl,imx8qxp
|
||||
- items:
|
||||
- enum:
|
||||
- tq,imx8dxp-tqma8xdps-mb-smarc-2 # TQ-Systems GmbH TQMa8XDPS SOM on MB-SMARC-2
|
||||
- const: tq,imx8dxp-tqma8xdps # TQ-Systems GmbH TQMa8XDPS SOM
|
||||
- const: fsl,imx8dxp
|
||||
|
||||
- description: i.MX8ULP based Boards
|
||||
items:
|
||||
- enum:
|
||||
@ -1347,6 +1382,12 @@ properties:
|
||||
- fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board
|
||||
- const: fsl,imx93
|
||||
|
||||
- description: i.MX94 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx943-evk # i.MX943 EVK Board
|
||||
- const: fsl,imx94
|
||||
|
||||
- description: i.MX95 based Boards
|
||||
items:
|
||||
- enum:
|
||||
@ -1374,12 +1415,16 @@ properties:
|
||||
All SOM and CPU variants use the same device tree hence only one
|
||||
compatible is needed. Bootloader disables all features not present
|
||||
in the assembled SOC.
|
||||
MBa91xxCA mainboard can be used as starterkit for the SOM
|
||||
soldered on an adapter board or for the connector variant
|
||||
to evaluate RGB display support.
|
||||
MBa93xxCA mainboard can be used as starterkit for the SOM
|
||||
soldered on an adapter board or for the connector variant
|
||||
MBa93xxLA mainboard is a single board computer using the solderable
|
||||
SOM variant
|
||||
items:
|
||||
- enum:
|
||||
- tq,imx93-tqma9352-mba91xxca # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM on MBa91xxCA
|
||||
- tq,imx93-tqma9352-mba93xxca # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM on MBa93xxCA
|
||||
- tq,imx93-tqma9352-mba93xxla # TQ-Systems GmbH i.MX93 TQMa93xxLA SOM on MBa93xxLA SBC
|
||||
- const: tq,imx93-tqma9352 # TQ-Systems GmbH i.MX93 TQMa93xxCA/LA SOM
|
||||
@ -1387,8 +1432,10 @@ properties:
|
||||
|
||||
- description: PHYTEC phyCORE-i.MX93 SoM based boards
|
||||
items:
|
||||
- const: phytec,imx93-phyboard-segin # phyBOARD-Segin with i.MX93
|
||||
- const: phytec,imx93-phycore-som # phyCORE-i.MX93 SoM
|
||||
- enum:
|
||||
- phytec,imx93-phyboard-nash # phyBOARD-Nash-i.MX93
|
||||
- phytec,imx93-phyboard-segin # phyBOARD-Segin with i.MX93
|
||||
- const: phytec,imx93-phycore-som # phyCORE-i.MX93 SoM
|
||||
- const: fsl,imx93
|
||||
|
||||
- description: Variscite VAR-SOM-MX93 based boards
|
||||
@ -1403,6 +1450,16 @@ properties:
|
||||
- const: kontron,imx93-osm-s # Kontron OSM-S i.MX93 SoM
|
||||
- const: fsl,imx93
|
||||
|
||||
- description:
|
||||
TQMa95xxSA is a series of SOM featuring NXP i.MX95 SoC variants.
|
||||
It has the SMARC form factor and is designed to be placed on
|
||||
different carrier boards. MB-SMARC-2 is a carrier reference design.
|
||||
items:
|
||||
- enum:
|
||||
- tq,imx95-tqma9596sa-mb-smarc-2 # TQ-Systems GmbH i.MX95 TQMa95xxSA SOM on MB-SMARC-2
|
||||
- const: tq,imx95-tqma9596sa # TQ-Systems GmbH i.MX95 TQMa95xxSA SOM
|
||||
- const: fsl,imx95
|
||||
|
||||
- description:
|
||||
Freescale Vybrid Platform Device Tree Bindings
|
||||
|
||||
|
||||
@ -25,6 +25,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- intel,socfpga-agilex5-socdk
|
||||
- intel,socfpga-agilex5-socdk-nand
|
||||
- const: intel,socfpga-agilex5
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
@ -104,6 +104,10 @@ properties:
|
||||
- enum:
|
||||
- bananapi,bpi-r4
|
||||
- const: mediatek,mt7988a
|
||||
- items:
|
||||
- const: bananapi,bpi-r4-2g5
|
||||
- const: bananapi,bpi-r4
|
||||
- const: mediatek,mt7988a
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8127-moose
|
||||
@ -285,6 +289,13 @@ properties:
|
||||
- const: google,steelix-sku393218
|
||||
- const: google,steelix
|
||||
- const: mediatek,mt8186
|
||||
- description: Google Ponyta
|
||||
items:
|
||||
- enum:
|
||||
- google,ponyta-sku0
|
||||
- google,ponyta-sku1
|
||||
- const: google,ponyta
|
||||
- const: mediatek,mt8186
|
||||
- description: Google Rusty (Lenovo 100e Chromebook Gen 4)
|
||||
items:
|
||||
- const: google,steelix-sku196609
|
||||
|
||||
@ -191,27 +191,27 @@ examples:
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
CPU0: cpu@0 {
|
||||
cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x0>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD0>;
|
||||
power-domains = <&cpu_pd0>;
|
||||
power-domain-names = "psci";
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x100>;
|
||||
enable-method = "psci";
|
||||
power-domains = <&CPU_PD1>;
|
||||
power-domains = <&cpu_pd1>;
|
||||
power-domain-names = "psci";
|
||||
};
|
||||
|
||||
idle-states {
|
||||
|
||||
CPU_PWRDN: cpu-power-down {
|
||||
cpu_pwrdn: cpu-power-down {
|
||||
compatible = "arm,idle-state";
|
||||
arm,psci-suspend-param = <0x0000001>;
|
||||
entry-latency-us = <10>;
|
||||
@ -222,7 +222,7 @@ examples:
|
||||
|
||||
domain-idle-states {
|
||||
|
||||
CLUSTER_RET: cluster-retention {
|
||||
cluster_ret: cluster-retention {
|
||||
compatible = "domain-idle-state";
|
||||
arm,psci-suspend-param = <0x1000011>;
|
||||
entry-latency-us = <500>;
|
||||
@ -230,7 +230,7 @@ examples:
|
||||
min-residency-us = <2000>;
|
||||
};
|
||||
|
||||
CLUSTER_PWRDN: cluster-power-down {
|
||||
cluster_pwrdn: cluster-power-down {
|
||||
compatible = "domain-idle-state";
|
||||
arm,psci-suspend-param = <0x1000031>;
|
||||
entry-latency-us = <2000>;
|
||||
@ -244,21 +244,21 @@ examples:
|
||||
compatible = "arm,psci-1.0";
|
||||
method = "smc";
|
||||
|
||||
CPU_PD0: power-domain-cpu0 {
|
||||
cpu_pd0: power-domain-cpu0 {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CPU_PWRDN>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&cpu_pwrdn>;
|
||||
power-domains = <&cluster_pd>;
|
||||
};
|
||||
|
||||
CPU_PD1: power-domain-cpu1 {
|
||||
cpu_pd1: power-domain-cpu1 {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CPU_PWRDN>;
|
||||
power-domains = <&CLUSTER_PD>;
|
||||
domain-idle-states = <&cpu_pwrdn>;
|
||||
power-domains = <&cluster_pd>;
|
||||
};
|
||||
|
||||
CLUSTER_PD: power-domain-cluster {
|
||||
cluster_pd: power-domain-cluster {
|
||||
#power-domain-cells = <0>;
|
||||
domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>;
|
||||
domain-idle-states = <&cluster_ret>, <&cluster_pwrdn>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
||||
@ -90,6 +90,7 @@ description: |
|
||||
sm6350
|
||||
sm6375
|
||||
sm7125
|
||||
sm7150
|
||||
sm7225
|
||||
sm7325
|
||||
sm8150
|
||||
@ -1020,6 +1021,7 @@ properties:
|
||||
- items:
|
||||
- enum:
|
||||
- sony,pdx201
|
||||
- xiaomi,ginkgo
|
||||
- xiaomi,laurel-sprout
|
||||
- const: qcom,sm6125
|
||||
|
||||
@ -1039,6 +1041,11 @@ properties:
|
||||
- xiaomi,joyeuse
|
||||
- const: qcom,sm7125
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- google,sunfish
|
||||
- const: qcom,sm7150
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- fairphone,fp4
|
||||
@ -1123,14 +1130,18 @@ properties:
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- lenovo,thinkpad-t14s
|
||||
- lenovo,thinkpad-t14s-lcd
|
||||
- lenovo,thinkpad-t14s-oled
|
||||
- const: lenovo,thinkpad-t14s
|
||||
- const: qcom,x1e78100
|
||||
- const: qcom,x1e80100
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- asus,vivobook-s15
|
||||
- asus,zenbook-a14-ux3407ra
|
||||
- dell,xps13-9345
|
||||
- hp,elitebook-ultra-g1q
|
||||
- hp,omnibook-x14
|
||||
- lenovo,yoga-slim7x
|
||||
- microsoft,romulus13
|
||||
@ -1141,6 +1152,7 @@ properties:
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- asus,zenbook-a14-ux3407qa
|
||||
- qcom,x1p42100-crd
|
||||
- const: qcom,x1p42100
|
||||
|
||||
|
||||
@ -946,6 +946,11 @@ properties:
|
||||
- const: radxa,rock-5b
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Radxa ROCK 5B+
|
||||
items:
|
||||
- const: radxa,rock-5b-plus
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Radxa ROCK 5C
|
||||
items:
|
||||
- const: radxa,rock-5c
|
||||
@ -1047,6 +1052,11 @@ properties:
|
||||
- const: rockchip,rk3399-evb
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Rockchip RK3399 Industry Evaluation board
|
||||
items:
|
||||
- const: rockchip,rk3399-evb-ind
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Rockchip RK3399 Sapphire standalone
|
||||
items:
|
||||
- const: rockchip,rk3399-sapphire
|
||||
@ -1057,6 +1067,11 @@ properties:
|
||||
- const: rockchip,rk3399-sapphire-excavator
|
||||
- const: rockchip,rk3399
|
||||
|
||||
- description: Rockchip RK3562 Evaluation board 2
|
||||
items:
|
||||
- const: rockchip,rk3562-evb2-v10
|
||||
- const: rockchip,rk3562
|
||||
|
||||
- description: Rockchip RK3566 BOX Evaluation Demo board
|
||||
items:
|
||||
- const: rockchip,rk3566-box-demo
|
||||
@ -1074,7 +1089,9 @@ properties:
|
||||
|
||||
- description: Rockchip RK3588 Evaluation board
|
||||
items:
|
||||
- const: rockchip,rk3588-evb1-v10
|
||||
- enum:
|
||||
- rockchip,rk3588-evb1-v10
|
||||
- rockchip,rk3588-evb2-v10
|
||||
- const: rockchip,rk3588
|
||||
|
||||
- description: Rockchip RK3588S Evaluation board
|
||||
@ -1109,6 +1126,24 @@ properties:
|
||||
- rockchip,rv1126
|
||||
- rockchip,rv1109
|
||||
|
||||
- description: Theobroma Systems PX30-Cobra
|
||||
items:
|
||||
- enum:
|
||||
- tsd,px30-cobra-ltk050h3146w
|
||||
- tsd,px30-cobra-ltk050h3146w-a2
|
||||
- tsd,px30-cobra-ltk050h3148w
|
||||
- tsd,px30-cobra-ltk500hd1829
|
||||
- const: tsd,px30-cobra
|
||||
- const: rockchip,px30
|
||||
|
||||
- description: Theobroma Systems PX30-PP1516
|
||||
items:
|
||||
- enum:
|
||||
- tsd,px30-pp1516-ltk050h3146w-a2
|
||||
- tsd,px30-pp1516-ltk050h3148w
|
||||
- const: tsd,px30-pp1516
|
||||
- const: rockchip,px30
|
||||
|
||||
- description: Theobroma Systems PX30-uQ7 with Haikou baseboard
|
||||
items:
|
||||
- const: tsd,px30-ringneck-haikou
|
||||
|
||||
@ -25,6 +25,7 @@ select:
|
||||
- rockchip,rk3288-pmu
|
||||
- rockchip,rk3368-pmu
|
||||
- rockchip,rk3399-pmu
|
||||
- rockchip,rk3562-pmu
|
||||
- rockchip,rk3568-pmu
|
||||
- rockchip,rk3576-pmu
|
||||
- rockchip,rk3588-pmu
|
||||
@ -43,6 +44,7 @@ properties:
|
||||
- rockchip,rk3288-pmu
|
||||
- rockchip,rk3368-pmu
|
||||
- rockchip,rk3399-pmu
|
||||
- rockchip,rk3562-pmu
|
||||
- rockchip,rk3568-pmu
|
||||
- rockchip,rk3576-pmu
|
||||
- rockchip,rk3588-pmu
|
||||
|
||||
@ -212,6 +212,14 @@ properties:
|
||||
- samsung,exynos7-espresso # Samsung Exynos7 Espresso
|
||||
- const: samsung,exynos7
|
||||
|
||||
- description: Exynos7870 based boards
|
||||
items:
|
||||
- enum:
|
||||
- samsung,a2corelte # Samsung Galaxy A2 Core
|
||||
- samsung,j6lte # Samsung Galaxy J6
|
||||
- samsung,on7xelte # Samsung Galaxy J7 Prime
|
||||
- const: samsung,exynos7870
|
||||
|
||||
- description: Exynos7885 based boards
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@ -42,6 +42,10 @@ properties:
|
||||
- st,stm32h743i-disco
|
||||
- st,stm32h743i-eval
|
||||
- const: st,stm32h743
|
||||
- items:
|
||||
- enum:
|
||||
- st,stm32h747i-disco
|
||||
- const: st,stm32h747
|
||||
- items:
|
||||
- enum:
|
||||
- st,stm32h750i-art-pi
|
||||
@ -184,6 +188,11 @@ properties:
|
||||
- const: phytec,phycore-stm32mp157c-som
|
||||
- const: st,stm32mp157
|
||||
|
||||
- description: Ultratronik STM32MP1 SBC based Boards
|
||||
items:
|
||||
- const: ultratronik,stm32mp157c-ultra-fly-sbc
|
||||
- const: st,stm32mp157
|
||||
|
||||
- description: ST STM32MP257 based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@ -492,6 +492,11 @@ properties:
|
||||
- const: lamobo,lamobo-r1
|
||||
- const: allwinner,sun7i-a20
|
||||
|
||||
- description: Liontron H-A133L
|
||||
items:
|
||||
- const: liontron,h-a133l
|
||||
- const: allwinner,sun50i-a100
|
||||
|
||||
- description: HAOYU Electronics Marsboard A10
|
||||
items:
|
||||
- const: haoyu,a10-marsboard
|
||||
@ -845,6 +850,11 @@ properties:
|
||||
- const: allwinner,r7-tv-dongle
|
||||
- const: allwinner,sun5i-a10s
|
||||
|
||||
- description: Radxa Cubie A5E
|
||||
items:
|
||||
- const: radxa,cubie-a5e
|
||||
- const: allwinner,sun55i-a527
|
||||
|
||||
- description: Remix Mini PC
|
||||
items:
|
||||
- const: jide,remix-mini-pc
|
||||
@ -966,6 +976,11 @@ properties:
|
||||
- const: hechuang,x96-mate
|
||||
- const: allwinner,sun50i-h616
|
||||
|
||||
- description: X96Q Pro+
|
||||
items:
|
||||
- const: amediatech,x96q-pro-plus
|
||||
- const: allwinner,sun55i-h728
|
||||
|
||||
- description: Xunlong OrangePi
|
||||
items:
|
||||
- const: xunlong,orangepi
|
||||
@ -1081,4 +1096,14 @@ properties:
|
||||
- const: xunlong,orangepi-zero3
|
||||
- const: allwinner,sun50i-h618
|
||||
|
||||
- description: YuzukiHD Avaota A1
|
||||
items:
|
||||
- const: yuzukihd,avaota-a1
|
||||
- const: allwinner,sun55i-t527
|
||||
|
||||
- description: YuzukiHD Chameleon
|
||||
items:
|
||||
- const: yuzukihd,chameleon
|
||||
- const: allwinner,sun50i-h618
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
@ -52,17 +52,14 @@ properties:
|
||||
- nvidia,cardhu-a04
|
||||
- const: nvidia,cardhu
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: asus,tf201
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: asus,tf300t
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: asus,tf300tg
|
||||
- const: nvidia,tegra30
|
||||
- items:
|
||||
- const: asus,tf700t
|
||||
- description: ASUS Transformers Device family
|
||||
items:
|
||||
- enum:
|
||||
- asus,tf201
|
||||
- asus,tf300t
|
||||
- asus,tf300tg
|
||||
- asus,tf300tl
|
||||
- asus,tf700t
|
||||
- const: nvidia,tegra30
|
||||
- description: LG Optimus 4X P880
|
||||
items:
|
||||
|
||||
@ -46,6 +46,7 @@ properties:
|
||||
- description: K3 AM625 SoC
|
||||
items:
|
||||
- enum:
|
||||
- beagle,am62-pocketbeagle2
|
||||
- beagle,am625-beagleplay
|
||||
- ti,am625-sk
|
||||
- ti,am62-lp-sk
|
||||
@ -75,6 +76,30 @@ properties:
|
||||
- const: toradex,verdin-am62 # Verdin AM62 Module
|
||||
- const: ti,am625
|
||||
|
||||
- description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards
|
||||
items:
|
||||
- enum:
|
||||
- toradex,verdin-am62p-nonwifi-dahlia # Verdin AM62P Module on Dahlia
|
||||
- toradex,verdin-am62p-nonwifi-dev # Verdin AM62P Module on Verdin Development Board
|
||||
- toradex,verdin-am62p-nonwifi-ivy # Verdin AM62P Module on Ivy
|
||||
- toradex,verdin-am62p-nonwifi-mallow # Verdin AM62P Module on Mallow
|
||||
- toradex,verdin-am62p-nonwifi-yavia # Verdin AM62P Module on Yavia
|
||||
- const: toradex,verdin-am62p-nonwifi # Verdin AM62P Module without Wi-Fi / BT
|
||||
- const: toradex,verdin-am62p # Verdin AM62P Module
|
||||
- const: ti,am62p5
|
||||
|
||||
- description: K3 AM62P5 SoC Toradex Verdin Modules and Carrier Boards with Wi-Fi / BT
|
||||
items:
|
||||
- enum:
|
||||
- toradex,verdin-am62p-wifi-dahlia # Verdin AM62P Wi-Fi / BT Module on Dahlia
|
||||
- toradex,verdin-am62p-wifi-dev # Verdin AM62P Wi-Fi / BT M. on Verdin Development B.
|
||||
- toradex,verdin-am62p-wifi-ivy # Verdin AM62P Wi-Fi / BT Module on Ivy
|
||||
- toradex,verdin-am62p-wifi-mallow # Verdin AM62P Wi-Fi / BT Module on Mallow
|
||||
- toradex,verdin-am62p-wifi-yavia # Verdin AM62P Wi-Fi / BT Module on Yavia
|
||||
- const: toradex,verdin-am62p-wifi # Verdin AM62P Wi-Fi / BT Module
|
||||
- const: toradex,verdin-am62p # Verdin AM62P Module
|
||||
- const: ti,am62p5
|
||||
|
||||
- description: K3 AM642 SoC
|
||||
items:
|
||||
- enum:
|
||||
@ -139,6 +164,13 @@ properties:
|
||||
- ti,j721s2-evm
|
||||
- const: ti,j721s2
|
||||
|
||||
- description: K3 J721s2 SoC Phytec SoM based boards
|
||||
items:
|
||||
- enum:
|
||||
- phytec,am68-phyboard-izar
|
||||
- const: phytec,am68-phycore-som
|
||||
- const: ti,j721s2
|
||||
|
||||
- description: K3 J722S SoC and Boards
|
||||
items:
|
||||
- enum:
|
||||
|
||||
@ -7,14 +7,13 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
title: VIA/Wondermedia VT8500 Platforms
|
||||
|
||||
maintainers:
|
||||
- Tony Prisk <linux@prisktech.co.nz>
|
||||
description: test
|
||||
- Alexey Charkov <alchark@gmail.com>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: '/'
|
||||
compatible:
|
||||
items:
|
||||
oneOf:
|
||||
- enum:
|
||||
- via,vt8500
|
||||
- wm,wm8505
|
||||
@ -22,4 +21,9 @@ properties:
|
||||
- wm,wm8750
|
||||
- wm,wm8850
|
||||
|
||||
- description: VIA APC Rock and Paper boards
|
||||
items:
|
||||
- const: via,apc-rock
|
||||
- const: wm,wm8950
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
@ -1,21 +0,0 @@
|
||||
Device tree binding for the TI DM816 AHCI SATA Controller
|
||||
---------------------------------------------------------
|
||||
|
||||
Required properties:
|
||||
- compatible: must be "ti,dm816-ahci"
|
||||
- reg: physical base address and size of the register region used by
|
||||
the controller (as defined by the AHCI 1.1 standard)
|
||||
- interrupts: interrupt specifier (refer to the interrupt binding)
|
||||
- clocks: list of phandle and clock specifier pairs (or only
|
||||
phandles for clock providers with '0' defined for
|
||||
#clock-cells); two clocks must be specified: the functional
|
||||
clock and an external reference clock
|
||||
|
||||
Example:
|
||||
|
||||
sata: sata@4a140000 {
|
||||
compatible = "ti,dm816-ahci";
|
||||
reg = <0x4a140000 0x10000>;
|
||||
interrupts = <16>;
|
||||
clocks = <&sysclk5_ck>, <&sata_refclk>;
|
||||
};
|
||||
@ -1,35 +0,0 @@
|
||||
STMicroelectronics STi SATA controller
|
||||
|
||||
This binding describes a SATA device.
|
||||
|
||||
Required properties:
|
||||
- compatible : Must be "st,ahci"
|
||||
- reg : Physical base addresses and length of register sets
|
||||
- interrupts : Interrupt associated with the SATA device
|
||||
- interrupt-names : Associated name must be; "hostc"
|
||||
- clocks : The phandle for the clock
|
||||
- clock-names : Associated name must be; "ahci_clk"
|
||||
- phys : The phandle for the PHY port
|
||||
- phy-names : Associated name must be; "ahci_phy"
|
||||
|
||||
Optional properties:
|
||||
- resets : The power-down, soft-reset and power-reset lines of SATA IP
|
||||
- reset-names : Associated names must be; "pwr-dwn", "sw-rst" and "pwr-rst"
|
||||
|
||||
Example:
|
||||
|
||||
/* Example for stih407 family silicon */
|
||||
sata0: sata@9b20000 {
|
||||
compatible = "st,ahci";
|
||||
reg = <0x9b20000 0x1000>;
|
||||
interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
|
||||
interrupt-names = "hostc";
|
||||
phys = <&phy_port0 PHY_TYPE_SATA>;
|
||||
phy-names = "ahci_phy";
|
||||
resets = <&powerdown STIH407_SATA0_POWERDOWN>,
|
||||
<&softreset STIH407_SATA0_SOFTRESET>,
|
||||
<&softreset STIH407_SATA0_PWR_SOFTRESET>;
|
||||
reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
|
||||
clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
|
||||
clock-names = "ahci_clk";
|
||||
};
|
||||
58
Bindings/ata/apm,xgene-ahci.yaml
Normal file
58
Bindings/ata/apm,xgene-ahci.yaml
Normal file
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/apm,xgene-ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: APM X-Gene 6.0 Gb/s SATA host controller
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
allOf:
|
||||
- $ref: ahci-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- apm,xgene-ahci
|
||||
- apm,xgene-ahci-pcie
|
||||
|
||||
reg:
|
||||
minItems: 4
|
||||
items:
|
||||
- description: AHCI memory resource
|
||||
- description: Host controller core
|
||||
- description: Host controller diagnostic
|
||||
- description: Host controller AXI
|
||||
- description: Host controller MUX
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
- phys
|
||||
- phy-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@1a400000 {
|
||||
compatible = "apm,xgene-ahci";
|
||||
reg = <0x1a400000 0x1000>,
|
||||
<0x1f220000 0x1000>,
|
||||
<0x1f22d000 0x1000>,
|
||||
<0x1f22e000 0x1000>,
|
||||
<0x1f227000 0x1000>;
|
||||
clocks = <&sataclk 0>;
|
||||
dma-coherent;
|
||||
interrupts = <0x0 0x87 0x4>;
|
||||
phys = <&phy2 0>;
|
||||
phy-names = "sata-phy";
|
||||
};
|
||||
@ -1,77 +0,0 @@
|
||||
* APM X-Gene 6.0 Gb/s SATA host controller nodes
|
||||
|
||||
SATA host controller nodes are defined to describe on-chip Serial ATA
|
||||
controllers. Each SATA controller (pair of ports) have its own node.
|
||||
|
||||
Required properties:
|
||||
- compatible : Shall contain:
|
||||
* "apm,xgene-ahci"
|
||||
- reg : First memory resource shall be the AHCI memory
|
||||
resource.
|
||||
Second memory resource shall be the host controller
|
||||
core memory resource.
|
||||
Third memory resource shall be the host controller
|
||||
diagnostic memory resource.
|
||||
4th memory resource shall be the host controller
|
||||
AXI memory resource.
|
||||
5th optional memory resource shall be the host
|
||||
controller MUX memory resource if required.
|
||||
- interrupts : Interrupt-specifier for SATA host controller IRQ.
|
||||
- clocks : Reference to the clock entry.
|
||||
- phys : A list of phandles + phy-specifiers, one for each
|
||||
entry in phy-names.
|
||||
- phy-names : Should contain:
|
||||
* "sata-phy" for the SATA 6.0Gbps PHY
|
||||
|
||||
Optional properties:
|
||||
- dma-coherent : Present if dma operations are coherent
|
||||
- status : Shall be "ok" if enabled or "disabled" if disabled.
|
||||
Default is "ok".
|
||||
|
||||
Example:
|
||||
sataclk: sataclk {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <1>;
|
||||
clock-frequency = <100000000>;
|
||||
clock-output-names = "sataclk";
|
||||
};
|
||||
|
||||
phy2: phy@1f22a000 {
|
||||
compatible = "apm,xgene-phy";
|
||||
reg = <0x0 0x1f22a000 0x0 0x100>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
phy3: phy@1f23a000 {
|
||||
compatible = "apm,xgene-phy";
|
||||
reg = <0x0 0x1f23a000 0x0 0x100>;
|
||||
#phy-cells = <1>;
|
||||
};
|
||||
|
||||
sata2: sata@1a400000 {
|
||||
compatible = "apm,xgene-ahci";
|
||||
reg = <0x0 0x1a400000 0x0 0x1000>,
|
||||
<0x0 0x1f220000 0x0 0x1000>,
|
||||
<0x0 0x1f22d000 0x0 0x1000>,
|
||||
<0x0 0x1f22e000 0x0 0x1000>,
|
||||
<0x0 0x1f227000 0x0 0x1000>;
|
||||
interrupts = <0x0 0x87 0x4>;
|
||||
dma-coherent;
|
||||
clocks = <&sataclk 0>;
|
||||
phys = <&phy2 0>;
|
||||
phy-names = "sata-phy";
|
||||
};
|
||||
|
||||
sata3: sata@1a800000 {
|
||||
compatible = "apm,xgene-ahci-pcie";
|
||||
reg = <0x0 0x1a800000 0x0 0x1000>,
|
||||
<0x0 0x1f230000 0x0 0x1000>,
|
||||
<0x0 0x1f23d000 0x0 0x1000>,
|
||||
<0x0 0x1f23e000 0x0 0x1000>,
|
||||
<0x0 0x1f237000 0x0 0x1000>;
|
||||
interrupts = <0x0 0x88 0x4>;
|
||||
dma-coherent;
|
||||
clocks = <&sataclk 0>;
|
||||
phys = <&phy3 0>;
|
||||
phy-names = "sata-phy";
|
||||
};
|
||||
70
Bindings/ata/arasan,cf-spear1340.yaml
Normal file
70
Bindings/ata/arasan,cf-spear1340.yaml
Normal file
@ -0,0 +1,70 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/arasan,cf-spear1340.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Arasan PATA Compact Flash Controller
|
||||
|
||||
maintainers:
|
||||
- Viresh Kumar <viresh.kumar@linaro.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: arasan,cf-spear1340
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
arasan,broken-udma:
|
||||
description: UDMA mode is unusable
|
||||
type: boolean
|
||||
|
||||
arasan,broken-mwdma:
|
||||
description: MWDMA mode is unusable
|
||||
type: boolean
|
||||
|
||||
arasan,broken-pio:
|
||||
description: PIO mode is unusable
|
||||
type: boolean
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: data
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
required:
|
||||
- arasan,broken-udma
|
||||
- arasan,broken-mwdma
|
||||
then:
|
||||
required:
|
||||
- dmas
|
||||
- dma-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
cf@fc000000 {
|
||||
compatible = "arasan,cf-spear1340";
|
||||
reg = <0xfc000000 0x1000>;
|
||||
interrupts = <12>;
|
||||
dmas = <&dma 23>;
|
||||
dma-names = "data";
|
||||
};
|
||||
59
Bindings/ata/cavium,ebt3000-compact-flash.yaml
Normal file
59
Bindings/ata/cavium,ebt3000-compact-flash.yaml
Normal file
@ -0,0 +1,59 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/cavium,ebt3000-compact-flash.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Cavium Compact Flash
|
||||
|
||||
maintainers:
|
||||
- Rob Herring <robh@kernel.org>
|
||||
|
||||
description:
|
||||
The Cavium Compact Flash device is connected to the Octeon Boot Bus, and is
|
||||
thus a child of the Boot Bus device. It can read and write industry standard
|
||||
compact flash devices.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: cavium,ebt3000-compact-flash
|
||||
|
||||
reg:
|
||||
description: The base address of the CF chip select banks.
|
||||
items:
|
||||
- description: CF chip select bank 0
|
||||
- description: CF chip select bank 1
|
||||
|
||||
cavium,bus-width:
|
||||
description: The width of the connection to the CF devices.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
enum: [8, 16]
|
||||
|
||||
cavium,true-ide:
|
||||
description: True IDE mode when present.
|
||||
type: boolean
|
||||
|
||||
cavium,dma-engine-handle:
|
||||
description: A phandle for the DMA Engine connected to this device.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
||||
compact-flash@5,0 {
|
||||
compatible = "cavium,ebt3000-compact-flash";
|
||||
reg = <5 0 0x10000>, <6 0 0x10000>;
|
||||
cavium,bus-width = <16>;
|
||||
cavium,true-ide;
|
||||
cavium,dma-engine-handle = <&dma0>;
|
||||
};
|
||||
};
|
||||
@ -1,30 +0,0 @@
|
||||
* Compact Flash
|
||||
|
||||
The Cavium Compact Flash device is connected to the Octeon Boot Bus,
|
||||
and is thus a child of the Boot Bus device. It can read and write
|
||||
industry standard compact flash devices.
|
||||
|
||||
Properties:
|
||||
- compatible: "cavium,ebt3000-compact-flash";
|
||||
|
||||
Compatibility with many Cavium evaluation boards.
|
||||
|
||||
- reg: The base address of the CF chip select banks. Depending on
|
||||
the device configuration, there may be one or two banks.
|
||||
|
||||
- cavium,bus-width: The width of the connection to the CF devices. Valid
|
||||
values are 8 and 16.
|
||||
|
||||
- cavium,true-ide: Optional, if present the CF connection is in True IDE mode.
|
||||
|
||||
- cavium,dma-engine-handle: Optional, a phandle for the DMA Engine connected
|
||||
to this device.
|
||||
|
||||
Example:
|
||||
compact-flash@5,0 {
|
||||
compatible = "cavium,ebt3000-compact-flash";
|
||||
reg = <5 0 0x10000>, <6 0 0x10000>;
|
||||
cavium,bus-width = <16>;
|
||||
cavium,true-ide;
|
||||
cavium,dma-engine-handle = <&dma0>;
|
||||
};
|
||||
83
Bindings/ata/marvell,orion-sata.yaml
Normal file
83
Bindings/ata/marvell,orion-sata.yaml
Normal file
@ -0,0 +1,83 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/marvell,orion-sata.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Orion SATA
|
||||
|
||||
maintainers:
|
||||
- Andrew Lunn <andrew@lunn.ch>
|
||||
- Gregory Clement <gregory.clement@bootlin.com>
|
||||
|
||||
allOf:
|
||||
- $ref: sata-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,orion-sata
|
||||
- marvell,armada-370-sata
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: '0'
|
||||
- const: '1'
|
||||
- const: '2'
|
||||
- const: '3'
|
||||
- const: '4'
|
||||
- const: '5'
|
||||
- const: '6'
|
||||
- const: '7'
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
nr-ports:
|
||||
description:
|
||||
Number of SATA ports in use.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 8
|
||||
|
||||
phys:
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
phy-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: port0
|
||||
- const: port1
|
||||
- const: port2
|
||||
- const: port3
|
||||
- const: port4
|
||||
- const: port5
|
||||
- const: port6
|
||||
- const: port7
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- nr-ports
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@80000 {
|
||||
compatible = "marvell,orion-sata";
|
||||
reg = <0x80000 0x5000>;
|
||||
interrupts = <21>;
|
||||
phys = <&sata_phy0>, <&sata_phy1>;
|
||||
phy-names = "port0", "port1";
|
||||
nr-ports = <2>;
|
||||
};
|
||||
@ -1,22 +0,0 @@
|
||||
* Marvell Orion SATA
|
||||
|
||||
Required Properties:
|
||||
- compatibility : "marvell,orion-sata" or "marvell,armada-370-sata"
|
||||
- reg : Address range of controller
|
||||
- interrupts : Interrupt controller is using
|
||||
- nr-ports : Number of SATA ports in use.
|
||||
|
||||
Optional Properties:
|
||||
- phys : List of phandles to sata phys
|
||||
- phy-names : Should be "0", "1", etc, one number per phandle
|
||||
|
||||
Example:
|
||||
|
||||
sata@80000 {
|
||||
compatible = "marvell,orion-sata";
|
||||
reg = <0x80000 0x5000>;
|
||||
interrupts = <21>;
|
||||
phys = <&sata_phy0>, <&sata_phy1>;
|
||||
phy-names = "0", "1";
|
||||
nr-ports = <2>;
|
||||
}
|
||||
@ -1,37 +0,0 @@
|
||||
* ARASAN PATA COMPACT FLASH CONTROLLER
|
||||
|
||||
Required properties:
|
||||
- compatible: "arasan,cf-spear1340"
|
||||
- reg: Address range of the CF registers
|
||||
- interrupt: Should contain the CF interrupt number
|
||||
- clock-frequency: Interface clock rate, in Hz, one of
|
||||
25000000
|
||||
33000000
|
||||
40000000
|
||||
50000000
|
||||
66000000
|
||||
75000000
|
||||
100000000
|
||||
125000000
|
||||
150000000
|
||||
166000000
|
||||
200000000
|
||||
|
||||
Optional properties:
|
||||
- arasan,broken-udma: if present, UDMA mode is unusable
|
||||
- arasan,broken-mwdma: if present, MWDMA mode is unusable
|
||||
- arasan,broken-pio: if present, PIO mode is unusable
|
||||
- dmas: one DMA channel, as described in bindings/dma/dma.txt
|
||||
required unless both UDMA and MWDMA mode are broken
|
||||
- dma-names: the corresponding channel name, must be "data"
|
||||
|
||||
Example:
|
||||
|
||||
cf@fc000000 {
|
||||
compatible = "arasan,cf-spear1340";
|
||||
reg = <0xfc000000 0x1000>;
|
||||
interrupt-parent = <&vic1>;
|
||||
interrupts = <12>;
|
||||
dmas = <&dma-controller 23>;
|
||||
dma-names = "data";
|
||||
};
|
||||
@ -20,6 +20,7 @@ select:
|
||||
contains:
|
||||
enum:
|
||||
- rockchip,rk3568-dwc-ahci
|
||||
- rockchip,rk3576-dwc-ahci
|
||||
- rockchip,rk3588-dwc-ahci
|
||||
required:
|
||||
- compatible
|
||||
@ -29,6 +30,7 @@ properties:
|
||||
items:
|
||||
- enum:
|
||||
- rockchip,rk3568-dwc-ahci
|
||||
- rockchip,rk3576-dwc-ahci
|
||||
- rockchip,rk3588-dwc-ahci
|
||||
- const: snps,dwc-ahci
|
||||
|
||||
@ -83,6 +85,7 @@ allOf:
|
||||
contains:
|
||||
enum:
|
||||
- rockchip,rk3568-dwc-ahci
|
||||
- rockchip,rk3576-dwc-ahci
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
|
||||
72
Bindings/ata/st,ahci.yaml
Normal file
72
Bindings/ata/st,ahci.yaml
Normal file
@ -0,0 +1,72 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/st,ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: STMicroelectronics STi SATA controller
|
||||
|
||||
maintainers:
|
||||
- Patrice Chotard <patrice.chotard@foss.st.com>
|
||||
|
||||
allOf:
|
||||
- $ref: ahci-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: st,ahci
|
||||
|
||||
interrupt-names:
|
||||
items:
|
||||
- const: hostc
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ahci_clk
|
||||
|
||||
resets:
|
||||
items:
|
||||
- description: Power-down line
|
||||
- description: Soft-reset line
|
||||
- description: Power-reset line
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: pwr-dwn
|
||||
- const: sw-rst
|
||||
- const: pwr-rst
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupt-names
|
||||
- phys
|
||||
- phy-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/phy/phy.h>
|
||||
#include <dt-bindings/reset/stih407-resets.h>
|
||||
#include <dt-bindings/clock/stih407-clks.h>
|
||||
|
||||
sata@9b20000 {
|
||||
compatible = "st,ahci";
|
||||
reg = <0x9b20000 0x1000>;
|
||||
interrupts = <GIC_SPI 159 IRQ_TYPE_NONE>;
|
||||
interrupt-names = "hostc";
|
||||
phys = <&phy_port0 PHY_TYPE_SATA>;
|
||||
phy-names = "sata-phy";
|
||||
resets = <&powerdown STIH407_SATA0_POWERDOWN>,
|
||||
<&softreset STIH407_SATA0_SOFTRESET>,
|
||||
<&softreset STIH407_SATA0_PWR_SOFTRESET>;
|
||||
reset-names = "pwr-dwn", "sw-rst", "pwr-rst";
|
||||
clocks = <&clk_s_c0_flexgen CLK_ICN_REG>;
|
||||
clock-names = "ahci_clk";
|
||||
};
|
||||
43
Bindings/ata/ti,dm816-ahci.yaml
Normal file
43
Bindings/ata/ti,dm816-ahci.yaml
Normal file
@ -0,0 +1,43 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/ata/ti,dm816-ahci.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: TI DM816 AHCI SATA Controller
|
||||
|
||||
maintainers:
|
||||
- Bartosz Golaszewski <brgl@bgdev.pl>
|
||||
|
||||
allOf:
|
||||
- $ref: ahci-common.yaml#
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: ti,dm816-ahci
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: functional clock
|
||||
- description: external reference clock
|
||||
|
||||
ti,hwmods:
|
||||
const: sata
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
sata@4a140000 {
|
||||
compatible = "ti,dm816-ahci";
|
||||
reg = <0x4a140000 0x10000>;
|
||||
interrupts = <16>;
|
||||
clocks = <&sysclk5_ck>, <&sata_refclk>;
|
||||
};
|
||||
@ -10,8 +10,8 @@ maintainers:
|
||||
- Saurabh Sengar <ssengar@linux.microsoft.com>
|
||||
|
||||
description:
|
||||
VMBus is a software bus that implement the protocols for communication
|
||||
between the root or host OS and guest OSs (virtual machines).
|
||||
VMBus is a software bus that implements the protocols for communication
|
||||
between the root or host OS and guest OS'es (virtual machines).
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
@ -25,9 +25,16 @@ properties:
|
||||
'#size-cells':
|
||||
const: 1
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
description: Interrupt is used to report a message from the host.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- ranges
|
||||
- interrupts
|
||||
- '#address-cells'
|
||||
- '#size-cells'
|
||||
|
||||
@ -35,6 +42,8 @@ additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
soc {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
@ -49,6 +58,9 @@ examples:
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0f 0xf0000000 0x0f 0xf0000000 0x10000000>;
|
||||
dma-coherent;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <GIC_PPI 2 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -21,6 +21,7 @@ properties:
|
||||
- const: nvidia,tegra210-aconnect
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,tegra264-aconnect
|
||||
- nvidia,tegra234-aconnect
|
||||
- nvidia,tegra186-aconnect
|
||||
- nvidia,tegra194-aconnect
|
||||
|
||||
20
Bindings/cache/andestech,ax45mp-cache.yaml
vendored
20
Bindings/cache/andestech,ax45mp-cache.yaml
vendored
@ -28,6 +28,9 @@ select:
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- andestech,qilai-ax45mp-cache
|
||||
- renesas,r9a07g043f-ax45mp-cache
|
||||
- const: andestech,ax45mp-cache
|
||||
- const: cache
|
||||
|
||||
@ -65,12 +68,27 @@ required:
|
||||
- cache-size
|
||||
- cache-unified
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: andestech,qilai-ax45mp-cache
|
||||
|
||||
then:
|
||||
properties:
|
||||
cache-sets:
|
||||
const: 2048
|
||||
cache-size:
|
||||
const: 2097152
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
cache-controller@13400000 {
|
||||
compatible = "andestech,ax45mp-cache", "cache";
|
||||
compatible = "renesas,r9a07g043f-ax45mp-cache", "andestech,ax45mp-cache",
|
||||
"cache";
|
||||
reg = <0x13400000 0x100000>;
|
||||
interrupts = <508 IRQ_TYPE_LEVEL_HIGH>;
|
||||
cache-line-size = <64>;
|
||||
|
||||
16
Bindings/cache/marvell,feroceon-cache.txt
vendored
16
Bindings/cache/marvell,feroceon-cache.txt
vendored
@ -1,16 +0,0 @@
|
||||
* Marvell Feroceon Cache
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be either "marvell,feroceon-cache" or
|
||||
"marvell,kirkwood-cache".
|
||||
|
||||
Optional properties:
|
||||
- reg : Address of the L2 cache control register. Mandatory for
|
||||
"marvell,kirkwood-cache", not used by "marvell,feroceon-cache"
|
||||
|
||||
|
||||
Example:
|
||||
l2: l2-cache@20128 {
|
||||
compatible = "marvell,kirkwood-cache";
|
||||
reg = <0x20128 0x4>;
|
||||
};
|
||||
45
Bindings/cache/marvell,kirkwood-cache.yaml
vendored
Normal file
45
Bindings/cache/marvell,kirkwood-cache.yaml
vendored
Normal file
@ -0,0 +1,45 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/cache/marvell,kirkwood-cache.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Feroceon/Kirkwood Cache
|
||||
|
||||
maintainers:
|
||||
- Andrew Lunn <andrew@lunn.ch>
|
||||
- Gregory Clement <gregory.clement@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,feroceon-cache
|
||||
- marvell,kirkwood-cache
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: marvell,kirkwood-cache
|
||||
then:
|
||||
required:
|
||||
- reg
|
||||
else:
|
||||
properties:
|
||||
reg: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
l2-cache@20128 {
|
||||
compatible = "marvell,kirkwood-cache";
|
||||
reg = <0x20128 0x4>;
|
||||
};
|
||||
17
Bindings/cache/marvell,tauros2-cache.txt
vendored
17
Bindings/cache/marvell,tauros2-cache.txt
vendored
@ -1,17 +0,0 @@
|
||||
* Marvell Tauros2 Cache
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be "marvell,tauros2-cache".
|
||||
- marvell,tauros2-cache-features : Specify the features supported for the
|
||||
tauros2 cache.
|
||||
The features including
|
||||
CACHE_TAUROS2_PREFETCH_ON (1 << 0)
|
||||
CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1)
|
||||
The definition can be found at
|
||||
arch/arm/include/asm/hardware/cache-tauros2.h
|
||||
|
||||
Example:
|
||||
L2: l2-cache {
|
||||
compatible = "marvell,tauros2-cache";
|
||||
marvell,tauros2-cache-features = <0x3>;
|
||||
};
|
||||
39
Bindings/cache/marvell,tauros2-cache.yaml
vendored
Normal file
39
Bindings/cache/marvell,tauros2-cache.yaml
vendored
Normal file
@ -0,0 +1,39 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/cache/marvell,tauros2-cache.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Tauros2 Cache
|
||||
|
||||
maintainers:
|
||||
- Andrew Lunn <andrew@lunn.ch>
|
||||
- Gregory Clement <gregory.clement@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: marvell,tauros2-cache
|
||||
|
||||
marvell,tauros2-cache-features:
|
||||
description: >
|
||||
Specify the features supported for the tauros2 cache. The features include:
|
||||
|
||||
- CACHE_TAUROS2_PREFETCH_ON (1 << 0)
|
||||
- CACHE_TAUROS2_LINEFILL_BURST8 (1 << 1)
|
||||
|
||||
The definition can be found at arch/arm/include/asm/hardware/cache-tauros2.h
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
maximum: 0x3
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- marvell,tauros2-cache-features
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
l2-cache {
|
||||
compatible = "marvell,tauros2-cache";
|
||||
marvell,tauros2-cache-features = <0x3>;
|
||||
};
|
||||
2
Bindings/cache/qcom,llcc.yaml
vendored
2
Bindings/cache/qcom,llcc.yaml
vendored
@ -40,6 +40,7 @@ properties:
|
||||
- qcom,sm8450-llcc
|
||||
- qcom,sm8550-llcc
|
||||
- qcom,sm8650-llcc
|
||||
- qcom,sm8750-llcc
|
||||
- qcom,x1e80100-llcc
|
||||
|
||||
reg:
|
||||
@ -274,6 +275,7 @@ allOf:
|
||||
- qcom,sm8450-llcc
|
||||
- qcom,sm8550-llcc
|
||||
- qcom,sm8650-llcc
|
||||
- qcom,sm8750-llcc
|
||||
then:
|
||||
properties:
|
||||
reg:
|
||||
|
||||
44
Bindings/cache/sifive,ccache0.yaml
vendored
44
Bindings/cache/sifive,ccache0.yaml
vendored
@ -39,6 +39,7 @@ properties:
|
||||
- const: cache
|
||||
- items:
|
||||
- enum:
|
||||
- eswin,eic7700-l3-cache
|
||||
- starfive,jh7100-ccache
|
||||
- starfive,jh7110-ccache
|
||||
- const: sifive,ccache0
|
||||
@ -55,10 +56,10 @@ properties:
|
||||
enum: [2, 3]
|
||||
|
||||
cache-sets:
|
||||
enum: [1024, 2048]
|
||||
enum: [1024, 2048, 4096]
|
||||
|
||||
cache-size:
|
||||
const: 2097152
|
||||
enum: [2097152, 4194304]
|
||||
|
||||
cache-unified: true
|
||||
|
||||
@ -89,6 +90,7 @@ allOf:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- eswin,eic7700-l3-cache
|
||||
- sifive,fu740-c000-ccache
|
||||
- starfive,jh7100-ccache
|
||||
- starfive,jh7110-ccache
|
||||
@ -108,6 +110,22 @@ allOf:
|
||||
Must contain entries for DirError, DataError and DataFail signals.
|
||||
maxItems: 3
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: eswin,eic7700-l3-cache
|
||||
|
||||
then:
|
||||
properties:
|
||||
cache-size:
|
||||
const: 4194304
|
||||
|
||||
else:
|
||||
properties:
|
||||
cache-size:
|
||||
const: 2097152
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
@ -122,11 +140,31 @@ allOf:
|
||||
cache-sets:
|
||||
const: 2048
|
||||
|
||||
else:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- microchip,mpfs-ccache
|
||||
- sifive,fu540-c000-ccache
|
||||
|
||||
then:
|
||||
properties:
|
||||
cache-sets:
|
||||
const: 1024
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- eswin,eic7700-l3-cache
|
||||
|
||||
then:
|
||||
properties:
|
||||
cache-sets:
|
||||
const: 4096
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -25,6 +25,7 @@ properties:
|
||||
- const: allwinner,sun50i-a64-de2-clk
|
||||
- const: allwinner,sun50i-h5-de2-clk
|
||||
- const: allwinner,sun50i-h6-de3-clk
|
||||
- const: allwinner,sun50i-h616-de33-clk
|
||||
- items:
|
||||
- const: allwinner,sun8i-r40-de2-clk
|
||||
- const: allwinner,sun8i-h3-de2-clk
|
||||
|
||||
@ -1,30 +0,0 @@
|
||||
Device Tree Clock bindings for Altera's SoCFPGA platform
|
||||
|
||||
This binding uses the common clock binding[1].
|
||||
|
||||
[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
Required properties:
|
||||
- compatible : shall be one of the following:
|
||||
"altr,socfpga-pll-clock" - for a PLL clock
|
||||
"altr,socfpga-perip-clock" - The peripheral clock divided from the
|
||||
PLL clock.
|
||||
"altr,socfpga-gate-clk" - Clocks that directly feed peripherals and
|
||||
can get gated.
|
||||
|
||||
- reg : shall be the control register offset from CLOCK_MANAGER's base for the clock.
|
||||
- clocks : shall be the input parent clock phandle for the clock. This is
|
||||
either an oscillator or a pll output.
|
||||
- #clock-cells : from common clock binding, shall be set to 0.
|
||||
|
||||
Optional properties:
|
||||
- fixed-divider : If clocks have a fixed divider value, use this property.
|
||||
- clk-gate : For "socfpga-gate-clk", clk-gate contains the gating register
|
||||
and the bit index.
|
||||
- div-reg : For "socfpga-gate-clk" and "socfpga-periph-clock", div-reg contains
|
||||
the divider register, bit shift, and width.
|
||||
- clk-phase : For the sdmmc_clk, contains the value of the clock phase that controls
|
||||
the SDMMC CIU clock. The first value is the clk_sample(smpsel), and the second
|
||||
value is the cclk_in_drv(drvsel). The clk-phase is used to enable the correct
|
||||
hold/delay times that is needed for the SD/MMC CIU clock. The values of both
|
||||
can be 0-315 degrees, in 45 degree increments.
|
||||
@ -1,31 +0,0 @@
|
||||
Broadcom BCM2835 auxiliary peripheral support
|
||||
|
||||
This binding uses the common clock binding:
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
|
||||
The auxiliary peripherals (UART, SPI1, and SPI2) have a small register
|
||||
area controlling clock gating to the peripherals, and providing an IRQ
|
||||
status register.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "brcm,bcm2835-aux"
|
||||
- #clock-cells: Should be <1>. The permitted clock-specifier values can be
|
||||
found in include/dt-bindings/clock/bcm2835-aux.h
|
||||
- reg: Specifies base physical address and size of the registers
|
||||
- clocks: The parent clock phandle
|
||||
|
||||
Example:
|
||||
|
||||
clocks: cprman@7e101000 {
|
||||
compatible = "brcm,bcm2835-cprman";
|
||||
#clock-cells = <1>;
|
||||
reg = <0x7e101000 0x2000>;
|
||||
clocks = <&clk_osc>;
|
||||
};
|
||||
|
||||
aux: aux@7e215004 {
|
||||
compatible = "brcm,bcm2835-aux";
|
||||
#clock-cells = <1>;
|
||||
reg = <0x7e215000 0x8>;
|
||||
clocks = <&clocks BCM2835_CLOCK_VPU>;
|
||||
};
|
||||
47
Bindings/clock/brcm,bcm2835-aux-clock.yaml
Normal file
47
Bindings/clock/brcm,bcm2835-aux-clock.yaml
Normal file
@ -0,0 +1,47 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/brcm,bcm2835-aux-clock.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom BCM2835 auxiliary peripheral clock
|
||||
|
||||
maintainers:
|
||||
- Stefan Wahren <wahrenst@gmx.net>
|
||||
- Raspberry Pi Kernel Maintenance <kernel-list@raspberrypi.com>
|
||||
|
||||
description:
|
||||
The auxiliary peripherals (UART, SPI1, and SPI2) have a small register
|
||||
area controlling clock gating to the peripherals, and providing an IRQ
|
||||
status register.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: brcm,bcm2835-aux
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#clock-cells"
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/bcm2835.h>
|
||||
clock@7e215000 {
|
||||
compatible = "brcm,bcm2835-aux";
|
||||
reg = <0x7e215000 0x8>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&clocks BCM2835_CLOCK_VPU>;
|
||||
};
|
||||
58
Bindings/clock/fsl,vf610-ccm.yaml
Normal file
58
Bindings/clock/fsl,vf610-ccm.yaml
Normal file
@ -0,0 +1,58 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/fsl,vf610-ccm.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Clock for Freescale Vybrid VF610 SOC
|
||||
|
||||
description:
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
|
||||
for the full list of VF610 clock IDs
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,vf610-ccm
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: external crystal oscillator 32KHz, recommended
|
||||
- description: external crystal oscillator 24MHz, recommended
|
||||
- description: audio
|
||||
- description: enet
|
||||
minItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: sxosc
|
||||
- const: fxosc
|
||||
- const: enet_ext
|
||||
- const: audio_ext
|
||||
minItems: 2
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@4006b000 {
|
||||
compatible = "fsl,vf610-ccm";
|
||||
reg = <0x4006b000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&sxosc>, <&fxosc>;
|
||||
clock-names = "sxosc", "fxosc";
|
||||
};
|
||||
|
||||
@ -1,114 +0,0 @@
|
||||
Binding for Maxim MAX77686/MAX77802/MAX77620 32k clock generator block
|
||||
|
||||
This is a part of device tree bindings of MAX77686/MAX77802/MAX77620
|
||||
multi-function device. More information can be found in MFD DT binding
|
||||
doc as follows:
|
||||
bindings/mfd/max77686.txt for MAX77686 and
|
||||
bindings/mfd/max77802.txt for MAX77802 and
|
||||
bindings/mfd/max77620.txt for MAX77620.
|
||||
|
||||
The MAX77686 contains three 32.768khz clock outputs that can be controlled
|
||||
(gated/ungated) over I2C. Clocks are defined as preprocessor macros in
|
||||
dt-bindings/clock/maxim,max77686.h.
|
||||
|
||||
|
||||
The MAX77802 contains two 32.768khz clock outputs that can be controlled
|
||||
(gated/ungated) over I2C. Clocks are defined as preprocessor macros in
|
||||
dt-bindings/clock/maxim,max77802.h.
|
||||
|
||||
The MAX77686 contains one 32.768khz clock outputs that can be controlled
|
||||
(gated/ungated) over I2C. Clocks are defined as preprocessor macros in
|
||||
dt-bindings/clock/maxim,max77620.h.
|
||||
|
||||
Following properties should be presend in main device node of the MFD chip.
|
||||
|
||||
Required properties:
|
||||
|
||||
- #clock-cells: from common clock binding; shall be set to 1.
|
||||
|
||||
Optional properties:
|
||||
- clock-output-names: From common clock binding.
|
||||
|
||||
Each clock is assigned an identifier and client nodes can use this identifier
|
||||
to specify the clock which they consume. Following indices are allowed:
|
||||
- 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620)
|
||||
- 1: 32khz_cp clock (max77686, max77802),
|
||||
- 2: 32khz_pmic clock (max77686).
|
||||
|
||||
Clocks are defined as preprocessor macros in above dt-binding header for
|
||||
respective chips.
|
||||
|
||||
Example:
|
||||
|
||||
1. With MAX77686:
|
||||
|
||||
#include <dt-bindings/clock/maxim,max77686.h>
|
||||
/* ... */
|
||||
|
||||
Node of the MFD chip
|
||||
max77686: max77686@9 {
|
||||
compatible = "maxim,max77686";
|
||||
interrupt-parent = <&wakeup_eint>;
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <0x09>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
/* ... */
|
||||
};
|
||||
|
||||
Clock consumer node
|
||||
|
||||
foo@0 {
|
||||
compatible = "bar,foo";
|
||||
/* ... */
|
||||
clock-names = "my-clock";
|
||||
clocks = <&max77686 MAX77686_CLK_PMIC>;
|
||||
};
|
||||
|
||||
2. With MAX77802:
|
||||
|
||||
#include <dt-bindings/clock/maxim,max77802.h>
|
||||
/* ... */
|
||||
|
||||
Node of the MFD chip
|
||||
max77802: max77802@9 {
|
||||
compatible = "maxim,max77802";
|
||||
interrupt-parent = <&wakeup_eint>;
|
||||
interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
|
||||
reg = <0x09>;
|
||||
#clock-cells = <1>;
|
||||
|
||||
/* ... */
|
||||
};
|
||||
|
||||
Clock consumer node
|
||||
|
||||
foo@0 {
|
||||
compatible = "bar,foo";
|
||||
/* ... */
|
||||
clock-names = "my-clock";
|
||||
clocks = <&max77802 MAX77802_CLK_32K_AP>;
|
||||
};
|
||||
|
||||
|
||||
3. With MAX77620:
|
||||
|
||||
#include <dt-bindings/clock/maxim,max77620.h>
|
||||
/* ... */
|
||||
|
||||
Node of the MFD chip
|
||||
max77620: max77620@3c {
|
||||
compatible = "maxim,max77620";
|
||||
reg = <0x3c>;
|
||||
#clock-cells = <1>;
|
||||
/* ... */
|
||||
};
|
||||
|
||||
Clock consumer node
|
||||
|
||||
foo@0 {
|
||||
compatible = "bar,foo";
|
||||
/* ... */
|
||||
clock-names = "my-clock";
|
||||
clocks = <&max77620 MAX77620_CLK_32K_OUT0>;
|
||||
};
|
||||
@ -52,6 +52,9 @@ properties:
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
'#reset-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
@ -14,6 +14,7 @@ description: |
|
||||
domains on Qualcomm SoCs.
|
||||
|
||||
See also::
|
||||
include/dt-bindings/clock/qcom,sm6350-videocc.h
|
||||
include/dt-bindings/clock/qcom,videocc-sc7180.h
|
||||
include/dt-bindings/clock/qcom,videocc-sc7280.h
|
||||
include/dt-bindings/clock/qcom,videocc-sdm845.h
|
||||
@ -26,6 +27,7 @@ properties:
|
||||
- qcom,sc7180-videocc
|
||||
- qcom,sc7280-videocc
|
||||
- qcom,sdm845-videocc
|
||||
- qcom,sm6350-videocc
|
||||
- qcom,sm8150-videocc
|
||||
- qcom,sm8250-videocc
|
||||
|
||||
@ -87,6 +89,24 @@ allOf:
|
||||
- const: bi_tcxo
|
||||
- const: bi_tcxo_ao
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- qcom,sm6350-videocc
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: Video AHB clock from GCC
|
||||
- description: Board XO source
|
||||
- description: Sleep Clock source
|
||||
clock-names:
|
||||
items:
|
||||
- const: iface
|
||||
- const: bi_tcxo
|
||||
- const: sleep_clk
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -4,13 +4,13 @@
|
||||
$id: http://devicetree.org/schemas/clock/renesas,rzv2h-cpg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RZ/{G3E,V2H(P)} Clock Pulse Generator (CPG)
|
||||
title: Renesas RZ/{G3E,V2H(P),V2N} Clock Pulse Generator (CPG)
|
||||
|
||||
maintainers:
|
||||
- Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
|
||||
|
||||
description:
|
||||
On Renesas RZ/{G3E,V2H(P)} SoCs, the CPG (Clock Pulse Generator) handles
|
||||
On Renesas RZ/{G3E,V2H(P),V2N} SoCs, the CPG (Clock Pulse Generator) handles
|
||||
generation and control of clock signals for the IP modules, generation and
|
||||
control of resets, and control over booting, low power consumption and power
|
||||
supply domains.
|
||||
@ -19,6 +19,7 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- renesas,r9a09g047-cpg # RZ/G3E
|
||||
- renesas,r9a09g056-cpg # RZ/V2N
|
||||
- renesas,r9a09g057-cpg # RZ/V2H
|
||||
|
||||
reg:
|
||||
|
||||
@ -8,6 +8,7 @@ title: Samsung ExynosAuto v920 SoC clock controller
|
||||
|
||||
maintainers:
|
||||
- Sunyeal Hong <sunyeal.hong@samsung.com>
|
||||
- Shin Son <shin.son@samsung.com>
|
||||
- Chanwoo Choi <cw00.choi@samsung.com>
|
||||
- Krzysztof Kozlowski <krzk@kernel.org>
|
||||
- Sylwester Nawrocki <s.nawrocki@samsung.com>
|
||||
@ -32,6 +33,9 @@ properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynosautov920-cmu-top
|
||||
- samsung,exynosautov920-cmu-cpucl0
|
||||
- samsung,exynosautov920-cmu-cpucl1
|
||||
- samsung,exynosautov920-cmu-cpucl2
|
||||
- samsung,exynosautov920-cmu-peric0
|
||||
- samsung,exynosautov920-cmu-peric1
|
||||
- samsung,exynosautov920-cmu-misc
|
||||
@ -69,6 +73,71 @@ allOf:
|
||||
items:
|
||||
- const: oscclk
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- samsung,exynosautov920-cmu-cpucl0
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: External reference clock (38.4 MHz)
|
||||
- description: CMU_CPUCL0 SWITCH clock (from CMU_TOP)
|
||||
- description: CMU_CPUCL0 CLUSTER clock (from CMU_TOP)
|
||||
- description: CMU_CPUCL0 DBG clock (from CMU_TOP)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: oscclk
|
||||
- const: switch
|
||||
- const: cluster
|
||||
- const: dbg
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- samsung,exynosautov920-cmu-cpucl1
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: External reference clock (38.4 MHz)
|
||||
- description: CMU_CPUCL1 SWITCH clock (from CMU_TOP)
|
||||
- description: CMU_CPUCL1 CLUSTER clock (from CMU_TOP)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: oscclk
|
||||
- const: switch
|
||||
- const: cluster
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- samsung,exynosautov920-cmu-cpucl2
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: External reference clock (38.4 MHz)
|
||||
- description: CMU_CPUCL2 SWITCH clock (from CMU_TOP)
|
||||
- description: CMU_CPUCL2 CLUSTER clock (from CMU_TOP)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: oscclk
|
||||
- const: switch
|
||||
- const: cluster
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
||||
@ -11,10 +11,18 @@ maintainers:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- sophgo,cv1800-clk
|
||||
- sophgo,cv1810-clk
|
||||
- sophgo,sg2000-clk
|
||||
oneOf:
|
||||
- enum:
|
||||
- sophgo,cv1800b-clk
|
||||
- sophgo,cv1812h-clk
|
||||
- sophgo,sg2000-clk
|
||||
- items:
|
||||
- const: sophgo,sg2002-clk
|
||||
- const: sophgo,sg2000-clk
|
||||
- const: sophgo,cv1800-clk
|
||||
deprecated: true
|
||||
- const: sophgo,cv1810-clk
|
||||
deprecated: true
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
99
Bindings/clock/sophgo,sg2044-clk.yaml
Normal file
99
Bindings/clock/sophgo,sg2044-clk.yaml
Normal file
@ -0,0 +1,99 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/sophgo,sg2044-clk.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Sophgo SG2044 Clock Controller
|
||||
|
||||
maintainers:
|
||||
- Inochi Amaoto <inochiama@gmail.com>
|
||||
|
||||
description: |
|
||||
The Sophgo SG2044 clock controller requires an external oscillator
|
||||
as input clock.
|
||||
|
||||
All available clocks are defined as preprocessor macros in
|
||||
include/dt-bindings/clock/sophgo,sg2044-clk.h
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: sophgo,sg2044-clk
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: fpll0
|
||||
- description: fpll1
|
||||
- description: fpll2
|
||||
- description: dpll0
|
||||
- description: dpll1
|
||||
- description: dpll2
|
||||
- description: dpll3
|
||||
- description: dpll4
|
||||
- description: dpll5
|
||||
- description: dpll6
|
||||
- description: dpll7
|
||||
- description: mpll0
|
||||
- description: mpll1
|
||||
- description: mpll2
|
||||
- description: mpll3
|
||||
- description: mpll4
|
||||
- description: mpll5
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: fpll0
|
||||
- const: fpll1
|
||||
- const: fpll2
|
||||
- const: dpll0
|
||||
- const: dpll1
|
||||
- const: dpll2
|
||||
- const: dpll3
|
||||
- const: dpll4
|
||||
- const: dpll5
|
||||
- const: dpll6
|
||||
- const: dpll7
|
||||
- const: mpll0
|
||||
- const: mpll1
|
||||
- const: mpll2
|
||||
- const: mpll3
|
||||
- const: mpll4
|
||||
- const: mpll5
|
||||
|
||||
'#clock-cells':
|
||||
const: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- '#clock-cells'
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/sophgo,sg2044-pll.h>
|
||||
|
||||
clock-controller@50002000 {
|
||||
compatible = "sophgo,sg2044-clk";
|
||||
reg = <0x50002000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&syscon CLK_FPLL0>, <&syscon CLK_FPLL1>,
|
||||
<&syscon CLK_FPLL2>, <&syscon CLK_DPLL0>,
|
||||
<&syscon CLK_DPLL1>, <&syscon CLK_DPLL2>,
|
||||
<&syscon CLK_DPLL3>, <&syscon CLK_DPLL4>,
|
||||
<&syscon CLK_DPLL5>, <&syscon CLK_DPLL6>,
|
||||
<&syscon CLK_DPLL7>, <&syscon CLK_MPLL0>,
|
||||
<&syscon CLK_MPLL1>, <&syscon CLK_MPLL2>,
|
||||
<&syscon CLK_MPLL3>, <&syscon CLK_MPLL4>,
|
||||
<&syscon CLK_MPLL5>;
|
||||
clock-names = "fpll0", "fpll1", "fpll2", "dpll0",
|
||||
"dpll1", "dpll2", "dpll3", "dpll4",
|
||||
"dpll5", "dpll6", "dpll7", "mpll0",
|
||||
"mpll1", "mpll2", "mpll3", "mpll4",
|
||||
"mpll5";
|
||||
};
|
||||
50
Bindings/clock/spacemit,k1-pll.yaml
Normal file
50
Bindings/clock/spacemit,k1-pll.yaml
Normal file
@ -0,0 +1,50 @@
|
||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/clock/spacemit,k1-pll.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: SpacemiT K1 PLL
|
||||
|
||||
maintainers:
|
||||
- Haylen Chu <heylenay@4d2.org>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: spacemit,k1-pll
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
description: External 24MHz oscillator
|
||||
|
||||
spacemit,mpmu:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
Phandle to the "Main PMU (MPMU)" syscon. It is used to check PLL
|
||||
lock status.
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
description:
|
||||
See <dt-bindings/clock/spacemit,k1-syscon.h> for valid indices.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- spacemit,mpmu
|
||||
- "#clock-cells"
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
clock-controller@d4090000 {
|
||||
compatible = "spacemit,k1-pll";
|
||||
reg = <0xd4090000 0x1000>;
|
||||
clocks = <&vctcxo_24m>;
|
||||
spacemit,mpmu = <&sysctl_mpmu>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
@ -1,71 +0,0 @@
|
||||
STMicroelectronics STM32H7 Reset and Clock Controller
|
||||
=====================================================
|
||||
|
||||
The RCC IP is both a reset and a clock controller.
|
||||
|
||||
Please refer to clock-bindings.txt for common clock controller binding usage.
|
||||
Please also refer to reset.txt for common reset controller binding usage.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be:
|
||||
"st,stm32h743-rcc"
|
||||
|
||||
- reg: should be register base and length as documented in the
|
||||
datasheet
|
||||
|
||||
- #reset-cells: 1, see below
|
||||
|
||||
- #clock-cells : from common clock binding; shall be set to 1
|
||||
|
||||
- clocks: External oscillator clock phandle
|
||||
- high speed external clock signal (HSE)
|
||||
- low speed external clock signal (LSE)
|
||||
- external I2S clock (I2S_CKIN)
|
||||
|
||||
Optional properties:
|
||||
- st,syscfg: phandle for pwrcfg, mandatory to disable/enable backup domain
|
||||
write protection (RTC clock).
|
||||
|
||||
Example:
|
||||
|
||||
rcc: reset-clock-controller@58024400 {
|
||||
compatible = "st,stm32h743-rcc", "st,stm32-rcc";
|
||||
reg = <0x58024400 0x400>;
|
||||
#reset-cells = <1>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&clk_hse>, <&clk_lse>, <&clk_i2s_ckin>;
|
||||
|
||||
st,syscfg = <&pwrcfg>;
|
||||
};
|
||||
|
||||
The peripheral clock consumer should specify the desired clock by
|
||||
having the clock ID in its "clocks" phandle cell.
|
||||
|
||||
Example:
|
||||
|
||||
timer5: timer@40000c00 {
|
||||
compatible = "st,stm32-timer";
|
||||
reg = <0x40000c00 0x400>;
|
||||
interrupts = <50>;
|
||||
clocks = <&rcc TIM5_CK>;
|
||||
};
|
||||
|
||||
Specifying softreset control of devices
|
||||
=======================================
|
||||
|
||||
Device nodes should specify the reset channel required in their "resets"
|
||||
property, containing a phandle to the reset device node and an index specifying
|
||||
which channel to use.
|
||||
The index is the bit number within the RCC registers bank, starting from RCC
|
||||
base address.
|
||||
It is calculated as: index = register_offset / 4 * 32 + bit_offset.
|
||||
Where bit_offset is the bit offset within the register.
|
||||
|
||||
For example, for CRC reset:
|
||||
crc = AHB4RSTR_offset / 4 * 32 + CRCRST_bit_offset = 0x88 / 4 * 32 + 19 = 1107
|
||||
|
||||
Example:
|
||||
|
||||
timer2 {
|
||||
resets = <&rcc STM32H7_APB1L_RESET(TIM2)>;
|
||||
};
|
||||
@ -8,7 +8,8 @@ title: T-HEAD TH1520 AP sub-system clock controller
|
||||
|
||||
description: |
|
||||
The T-HEAD TH1520 AP sub-system clock controller configures the
|
||||
CPU, DPU, GMAC and TEE PLLs.
|
||||
CPU, DPU, GMAC and TEE PLLs. Additionally the VO subsystem configures
|
||||
the clock gates for the HDMI, MIPI and the GPU.
|
||||
|
||||
SoC reference manual
|
||||
https://openbeagle.org/beaglev-ahead/beaglev-ahead/-/blob/main/docs/TH1520%20System%20User%20Manual.pdf
|
||||
@ -20,14 +21,24 @@ maintainers:
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: thead,th1520-clk-ap
|
||||
enum:
|
||||
- thead,th1520-clk-ap
|
||||
- thead,th1520-clk-vo
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: main oscillator (24MHz)
|
||||
- description: |
|
||||
One input clock:
|
||||
- For "thead,th1520-clk-ap": the clock input must be the 24 MHz
|
||||
main oscillator.
|
||||
- For "thead,th1520-clk-vo": the clock input must be the VIDEO_PLL,
|
||||
which is configured by the AP clock controller. According to the
|
||||
TH1520 manual, VIDEO_PLL is a Silicon Creations Sigma-Delta PLL
|
||||
(integer PLL) typically running at 792 MHz (FOUTPOSTDIV), with
|
||||
a maximum FOUTVCO of 2376 MHz.
|
||||
|
||||
"#clock-cells":
|
||||
const: 1
|
||||
|
||||
@ -1,41 +0,0 @@
|
||||
* Clock bindings for Freescale Vybrid VF610 SOC
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,vf610-ccm"
|
||||
- reg: Address and length of the register set
|
||||
- #clock-cells: Should be <1>
|
||||
|
||||
Optional properties:
|
||||
- clocks: list of clock identifiers which are external input clocks to the
|
||||
given clock controller. Please refer the next section to find
|
||||
the input clocks for a given controller.
|
||||
- clock-names: list of names of clocks which are external input clocks to the
|
||||
given clock controller.
|
||||
|
||||
Input clocks for top clock controller:
|
||||
- sxosc (external crystal oscillator 32KHz, recommended)
|
||||
- fxosc (external crystal oscillator 24MHz, recommended)
|
||||
- audio_ext
|
||||
- enet_ext
|
||||
|
||||
The clock consumer should specify the desired clock by having the clock
|
||||
ID in its "clocks" phandle cell. See include/dt-bindings/clock/vf610-clock.h
|
||||
for the full list of VF610 clock IDs.
|
||||
|
||||
Examples:
|
||||
|
||||
clks: ccm@4006b000 {
|
||||
compatible = "fsl,vf610-ccm";
|
||||
reg = <0x4006b000 0x1000>;
|
||||
#clock-cells = <1>;
|
||||
clocks = <&sxosc>, <&fxosc>;
|
||||
clock-names = "sxosc", "fxosc";
|
||||
};
|
||||
|
||||
uart1: serial@40028000 {
|
||||
compatible = "fsl,vf610-uart";
|
||||
reg = <0x40028000 0x1000>;
|
||||
interrupts = <0 62 0x04>;
|
||||
clocks = <&clks VF610_CLK_UART1>;
|
||||
clock-names = "ipg";
|
||||
};
|
||||
36
Bindings/counter/fsl,ftm-quaddec.yaml
Normal file
36
Bindings/counter/fsl,ftm-quaddec.yaml
Normal file
@ -0,0 +1,36 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/counter/fsl,ftm-quaddec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: FlexTimer Quadrature decoder counter
|
||||
|
||||
description:
|
||||
Exposes a simple counter for the quadrature decoder mode.
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,ftm-quaddec
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
big-endian: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
counter@29d0000 {
|
||||
compatible = "fsl,ftm-quaddec";
|
||||
reg = <0x29d0000 0x10000>;
|
||||
big-endian;
|
||||
};
|
||||
@ -1,18 +0,0 @@
|
||||
FlexTimer Quadrature decoder counter
|
||||
|
||||
This driver exposes a simple counter for the quadrature decoder mode.
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be "fsl,ftm-quaddec".
|
||||
- reg: Must be set to the memory region of the flextimer.
|
||||
|
||||
Optional property:
|
||||
- big-endian: Access the device registers in big-endian mode.
|
||||
|
||||
Example:
|
||||
counter0: counter@29d0000 {
|
||||
compatible = "fsl,ftm-quaddec";
|
||||
reg = <0x0 0x29d0000 0x0 0x10000>;
|
||||
big-endian;
|
||||
status = "disabled";
|
||||
};
|
||||
@ -1,553 +0,0 @@
|
||||
===========================================
|
||||
CPU topology binding description
|
||||
===========================================
|
||||
|
||||
===========================================
|
||||
1 - Introduction
|
||||
===========================================
|
||||
|
||||
In a SMP system, the hierarchy of CPUs is defined through three entities that
|
||||
are used to describe the layout of physical CPUs in the system:
|
||||
|
||||
- socket
|
||||
- cluster
|
||||
- core
|
||||
- thread
|
||||
|
||||
The bottom hierarchy level sits at core or thread level depending on whether
|
||||
symmetric multi-threading (SMT) is supported or not.
|
||||
|
||||
For instance in a system where CPUs support SMT, "cpu" nodes represent all
|
||||
threads existing in the system and map to the hierarchy level "thread" above.
|
||||
In systems where SMT is not supported "cpu" nodes represent all cores present
|
||||
in the system and map to the hierarchy level "core" above.
|
||||
|
||||
CPU topology bindings allow one to associate cpu nodes with hierarchical groups
|
||||
corresponding to the system hierarchy; syntactically they are defined as device
|
||||
tree nodes.
|
||||
|
||||
Currently, only ARM/RISC-V intend to use this cpu topology binding but it may be
|
||||
used for any other architecture as well.
|
||||
|
||||
The cpu nodes, as per bindings defined in [4], represent the devices that
|
||||
correspond to physical CPUs and are to be mapped to the hierarchy levels.
|
||||
|
||||
A topology description containing phandles to cpu nodes that are not compliant
|
||||
with bindings standardized in [4] is therefore considered invalid.
|
||||
|
||||
===========================================
|
||||
2 - cpu-map node
|
||||
===========================================
|
||||
|
||||
The ARM/RISC-V CPU topology is defined within the cpu-map node, which is a direct
|
||||
child of the cpus node and provides a container where the actual topology
|
||||
nodes are listed.
|
||||
|
||||
- cpu-map node
|
||||
|
||||
Usage: Optional - On SMP systems provide CPUs topology to the OS.
|
||||
Uniprocessor systems do not require a topology
|
||||
description and therefore should not define a
|
||||
cpu-map node.
|
||||
|
||||
Description: The cpu-map node is just a container node where its
|
||||
subnodes describe the CPU topology.
|
||||
|
||||
Node name must be "cpu-map".
|
||||
|
||||
The cpu-map node's parent node must be the cpus node.
|
||||
|
||||
The cpu-map node's child nodes can be:
|
||||
|
||||
- one or more cluster nodes or
|
||||
- one or more socket nodes in a multi-socket system
|
||||
|
||||
Any other configuration is considered invalid.
|
||||
|
||||
The cpu-map node can only contain 4 types of child nodes:
|
||||
|
||||
- socket node
|
||||
- cluster node
|
||||
- core node
|
||||
- thread node
|
||||
|
||||
whose bindings are described in paragraph 3.
|
||||
|
||||
The nodes describing the CPU topology (socket/cluster/core/thread) can
|
||||
only be defined within the cpu-map node and every core/thread in the
|
||||
system must be defined within the topology. Any other configuration is
|
||||
invalid and therefore must be ignored.
|
||||
|
||||
===========================================
|
||||
2.1 - cpu-map child nodes naming convention
|
||||
===========================================
|
||||
|
||||
cpu-map child nodes must follow a naming convention where the node name
|
||||
must be "socketN", "clusterN", "coreN", "threadN" depending on the node type
|
||||
(ie socket/cluster/core/thread) (where N = {0, 1, ...} is the node number; nodes
|
||||
which are siblings within a single common parent node must be given a unique and
|
||||
sequential N value, starting from 0).
|
||||
cpu-map child nodes which do not share a common parent node can have the same
|
||||
name (ie same number N as other cpu-map child nodes at different device tree
|
||||
levels) since name uniqueness will be guaranteed by the device tree hierarchy.
|
||||
|
||||
===========================================
|
||||
3 - socket/cluster/core/thread node bindings
|
||||
===========================================
|
||||
|
||||
Bindings for socket/cluster/cpu/thread nodes are defined as follows:
|
||||
|
||||
- socket node
|
||||
|
||||
Description: must be declared within a cpu-map node, one node
|
||||
per physical socket in the system. A system can
|
||||
contain single or multiple physical socket.
|
||||
The association of sockets and NUMA nodes is beyond
|
||||
the scope of this bindings, please refer [2] for
|
||||
NUMA bindings.
|
||||
|
||||
This node is optional for a single socket system.
|
||||
|
||||
The socket node name must be "socketN" as described in 2.1 above.
|
||||
A socket node can not be a leaf node.
|
||||
|
||||
A socket node's child nodes must be one or more cluster nodes.
|
||||
|
||||
Any other configuration is considered invalid.
|
||||
|
||||
- cluster node
|
||||
|
||||
Description: must be declared within a cpu-map node, one node
|
||||
per cluster. A system can contain several layers of
|
||||
clustering within a single physical socket and cluster
|
||||
nodes can be contained in parent cluster nodes.
|
||||
|
||||
The cluster node name must be "clusterN" as described in 2.1 above.
|
||||
A cluster node can not be a leaf node.
|
||||
|
||||
A cluster node's child nodes must be:
|
||||
|
||||
- one or more cluster nodes; or
|
||||
- one or more core nodes
|
||||
|
||||
Any other configuration is considered invalid.
|
||||
|
||||
- core node
|
||||
|
||||
Description: must be declared in a cluster node, one node per core in
|
||||
the cluster. If the system does not support SMT, core
|
||||
nodes are leaf nodes, otherwise they become containers of
|
||||
thread nodes.
|
||||
|
||||
The core node name must be "coreN" as described in 2.1 above.
|
||||
|
||||
A core node must be a leaf node if SMT is not supported.
|
||||
|
||||
Properties for core nodes that are leaf nodes:
|
||||
|
||||
- cpu
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: a phandle to the cpu node that corresponds to the
|
||||
core node.
|
||||
|
||||
If a core node is not a leaf node (CPUs supporting SMT) a core node's
|
||||
child nodes can be:
|
||||
|
||||
- one or more thread nodes
|
||||
|
||||
Any other configuration is considered invalid.
|
||||
|
||||
- thread node
|
||||
|
||||
Description: must be declared in a core node, one node per thread
|
||||
in the core if the system supports SMT. Thread nodes are
|
||||
always leaf nodes in the device tree.
|
||||
|
||||
The thread node name must be "threadN" as described in 2.1 above.
|
||||
|
||||
A thread node must be a leaf node.
|
||||
|
||||
A thread node must contain the following property:
|
||||
|
||||
- cpu
|
||||
Usage: required
|
||||
Value type: <phandle>
|
||||
Definition: a phandle to the cpu node that corresponds to
|
||||
the thread node.
|
||||
|
||||
===========================================
|
||||
4 - Example dts
|
||||
===========================================
|
||||
|
||||
Example 1 (ARM 64-bit, 16-cpu system, two clusters of clusters in a single
|
||||
physical socket):
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <2>;
|
||||
|
||||
cpu-map {
|
||||
socket0 {
|
||||
cluster0 {
|
||||
cluster0 {
|
||||
core0 {
|
||||
thread0 {
|
||||
cpu = <&CPU0>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU1>;
|
||||
};
|
||||
};
|
||||
|
||||
core1 {
|
||||
thread0 {
|
||||
cpu = <&CPU2>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cluster1 {
|
||||
core0 {
|
||||
thread0 {
|
||||
cpu = <&CPU4>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU5>;
|
||||
};
|
||||
};
|
||||
|
||||
core1 {
|
||||
thread0 {
|
||||
cpu = <&CPU6>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU7>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cluster1 {
|
||||
cluster0 {
|
||||
core0 {
|
||||
thread0 {
|
||||
cpu = <&CPU8>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU9>;
|
||||
};
|
||||
};
|
||||
core1 {
|
||||
thread0 {
|
||||
cpu = <&CPU10>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU11>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
cluster1 {
|
||||
core0 {
|
||||
thread0 {
|
||||
cpu = <&CPU12>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU13>;
|
||||
};
|
||||
};
|
||||
core1 {
|
||||
thread0 {
|
||||
cpu = <&CPU14>;
|
||||
};
|
||||
thread1 {
|
||||
cpu = <&CPU15>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
CPU0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x0>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x1>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU2: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU3: cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU4: cpu@10000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10000>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU5: cpu@10001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10001>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU6: cpu@10100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU7: cpu@10101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x0 0x10101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU8: cpu@100000000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x0>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU9: cpu@100000001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x1>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU10: cpu@100000100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU11: cpu@100000101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU12: cpu@100010000 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10000>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU13: cpu@100010001 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10001>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU14: cpu@100010100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10100>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
|
||||
CPU15: cpu@100010101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a57";
|
||||
reg = <0x1 0x10101>;
|
||||
enable-method = "spin-table";
|
||||
cpu-release-addr = <0 0x20000000>;
|
||||
};
|
||||
};
|
||||
|
||||
Example 2 (ARM 32-bit, dual-cluster, 8-cpu system, no SMT):
|
||||
|
||||
cpus {
|
||||
#size-cells = <0>;
|
||||
#address-cells = <1>;
|
||||
|
||||
cpu-map {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&CPU0>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&CPU1>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&CPU2>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&CPU3>;
|
||||
};
|
||||
};
|
||||
|
||||
cluster1 {
|
||||
core0 {
|
||||
cpu = <&CPU4>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&CPU5>;
|
||||
};
|
||||
core2 {
|
||||
cpu = <&CPU6>;
|
||||
};
|
||||
core3 {
|
||||
cpu = <&CPU7>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
CPU0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x0>;
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x1>;
|
||||
};
|
||||
|
||||
CPU2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x2>;
|
||||
};
|
||||
|
||||
CPU3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x3>;
|
||||
};
|
||||
|
||||
CPU4: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x100>;
|
||||
};
|
||||
|
||||
CPU5: cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x101>;
|
||||
};
|
||||
|
||||
CPU6: cpu@102 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x102>;
|
||||
};
|
||||
|
||||
CPU7: cpu@103 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x103>;
|
||||
};
|
||||
};
|
||||
|
||||
Example 3: HiFive Unleashed (RISC-V 64 bit, 4 core system)
|
||||
|
||||
{
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
compatible = "sifive,fu540g", "sifive,fu500";
|
||||
model = "sifive,hifive-unleashed-a00";
|
||||
|
||||
...
|
||||
cpus {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
cpu-map {
|
||||
socket0 {
|
||||
cluster0 {
|
||||
core0 {
|
||||
cpu = <&CPU1>;
|
||||
};
|
||||
core1 {
|
||||
cpu = <&CPU2>;
|
||||
};
|
||||
core2 {
|
||||
cpu0 = <&CPU2>;
|
||||
};
|
||||
core3 {
|
||||
cpu0 = <&CPU3>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
CPU1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "sifive,rocket0", "riscv";
|
||||
reg = <0x1>;
|
||||
}
|
||||
|
||||
CPU2: cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "sifive,rocket0", "riscv";
|
||||
reg = <0x2>;
|
||||
}
|
||||
CPU3: cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "sifive,rocket0", "riscv";
|
||||
reg = <0x3>;
|
||||
}
|
||||
CPU4: cpu@4 {
|
||||
device_type = "cpu";
|
||||
compatible = "sifive,rocket0", "riscv";
|
||||
reg = <0x4>;
|
||||
}
|
||||
}
|
||||
};
|
||||
===============================================================================
|
||||
[1] ARM Linux kernel documentation
|
||||
Documentation/devicetree/bindings/arm/cpus.yaml
|
||||
[2] Devicetree NUMA binding description
|
||||
Documentation/devicetree/bindings/numa.txt
|
||||
[3] RISC-V Linux kernel documentation
|
||||
Documentation/devicetree/bindings/riscv/cpus.yaml
|
||||
[4] https://www.devicetree.org/specifications/
|
||||
@ -1,250 +0,0 @@
|
||||
Binding for MediaTek's CPUFreq driver
|
||||
=====================================
|
||||
|
||||
Required properties:
|
||||
- clocks: A list of phandle + clock-specifier pairs for the clocks listed in clock names.
|
||||
- clock-names: Should contain the following:
|
||||
"cpu" - The multiplexer for clock input of CPU cluster.
|
||||
"intermediate" - A parent of "cpu" clock which is used as "intermediate" clock
|
||||
source (usually MAINPLL) when the original CPU PLL is under
|
||||
transition and not stable yet.
|
||||
Please refer to Documentation/devicetree/bindings/clock/clock-bindings.txt for
|
||||
generic clock consumer properties.
|
||||
- operating-points-v2: Please refer to Documentation/devicetree/bindings/opp/opp-v2.yaml
|
||||
for detail.
|
||||
- proc-supply: Regulator for Vproc of CPU cluster.
|
||||
|
||||
Optional properties:
|
||||
- sram-supply: Regulator for Vsram of CPU cluster. When present, the cpufreq driver
|
||||
needs to do "voltage tracking" to step by step scale up/down Vproc and
|
||||
Vsram to fit SoC specific needs. When absent, the voltage scaling
|
||||
flow is handled by hardware, hence no software "voltage tracking" is
|
||||
needed.
|
||||
- mediatek,cci:
|
||||
Used to confirm the link status between cpufreq and mediatek cci. Because
|
||||
cpufreq and mediatek cci could share the same regulator in some MediaTek SoCs.
|
||||
To prevent the issue of high frequency and low voltage, we need to use this
|
||||
property to make sure mediatek cci is ready.
|
||||
For details of mediatek cci, please refer to
|
||||
Documentation/devicetree/bindings/interconnect/mediatek,cci.yaml
|
||||
- #cooling-cells:
|
||||
For details, please refer to
|
||||
Documentation/devicetree/bindings/thermal/thermal-cooling-devices.yaml
|
||||
|
||||
Example 1 (MT7623 SoC):
|
||||
|
||||
cpu_opp_table: opp_table {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-598000000 {
|
||||
opp-hz = /bits/ 64 <598000000>;
|
||||
opp-microvolt = <1050000>;
|
||||
};
|
||||
|
||||
opp-747500000 {
|
||||
opp-hz = /bits/ 64 <747500000>;
|
||||
opp-microvolt = <1050000>;
|
||||
};
|
||||
|
||||
opp-1040000000 {
|
||||
opp-hz = /bits/ 64 <1040000000>;
|
||||
opp-microvolt = <1150000>;
|
||||
};
|
||||
|
||||
opp-1196000000 {
|
||||
opp-hz = /bits/ 64 <1196000000>;
|
||||
opp-microvolt = <1200000>;
|
||||
};
|
||||
|
||||
opp-1300000000 {
|
||||
opp-hz = /bits/ 64 <1300000000>;
|
||||
opp-microvolt = <1300000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x0>;
|
||||
clocks = <&infracfg CLK_INFRA_CPUSEL>,
|
||||
<&apmixedsys CLK_APMIXED_MAINPLL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x1>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
};
|
||||
cpu@2 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x2>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
};
|
||||
cpu@3 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a7";
|
||||
reg = <0x3>;
|
||||
operating-points-v2 = <&cpu_opp_table>;
|
||||
};
|
||||
|
||||
Example 2 (MT8173 SoC):
|
||||
cpu_opp_table_a: opp_table_a {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-507000000 {
|
||||
opp-hz = /bits/ 64 <507000000>;
|
||||
opp-microvolt = <859000>;
|
||||
};
|
||||
|
||||
opp-702000000 {
|
||||
opp-hz = /bits/ 64 <702000000>;
|
||||
opp-microvolt = <908000>;
|
||||
};
|
||||
|
||||
opp-1001000000 {
|
||||
opp-hz = /bits/ 64 <1001000000>;
|
||||
opp-microvolt = <983000>;
|
||||
};
|
||||
|
||||
opp-1105000000 {
|
||||
opp-hz = /bits/ 64 <1105000000>;
|
||||
opp-microvolt = <1009000>;
|
||||
};
|
||||
|
||||
opp-1183000000 {
|
||||
opp-hz = /bits/ 64 <1183000000>;
|
||||
opp-microvolt = <1028000>;
|
||||
};
|
||||
|
||||
opp-1404000000 {
|
||||
opp-hz = /bits/ 64 <1404000000>;
|
||||
opp-microvolt = <1083000>;
|
||||
};
|
||||
|
||||
opp-1508000000 {
|
||||
opp-hz = /bits/ 64 <1508000000>;
|
||||
opp-microvolt = <1109000>;
|
||||
};
|
||||
|
||||
opp-1573000000 {
|
||||
opp-hz = /bits/ 64 <1573000000>;
|
||||
opp-microvolt = <1125000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpu_opp_table_b: opp_table_b {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp-507000000 {
|
||||
opp-hz = /bits/ 64 <507000000>;
|
||||
opp-microvolt = <828000>;
|
||||
};
|
||||
|
||||
opp-702000000 {
|
||||
opp-hz = /bits/ 64 <702000000>;
|
||||
opp-microvolt = <867000>;
|
||||
};
|
||||
|
||||
opp-1001000000 {
|
||||
opp-hz = /bits/ 64 <1001000000>;
|
||||
opp-microvolt = <927000>;
|
||||
};
|
||||
|
||||
opp-1209000000 {
|
||||
opp-hz = /bits/ 64 <1209000000>;
|
||||
opp-microvolt = <968000>;
|
||||
};
|
||||
|
||||
opp-1404000000 {
|
||||
opp-hz = /bits/ 64 <1007000000>;
|
||||
opp-microvolt = <1028000>;
|
||||
};
|
||||
|
||||
opp-1612000000 {
|
||||
opp-hz = /bits/ 64 <1612000000>;
|
||||
opp-microvolt = <1049000>;
|
||||
};
|
||||
|
||||
opp-1807000000 {
|
||||
opp-hz = /bits/ 64 <1807000000>;
|
||||
opp-microvolt = <1089000>;
|
||||
};
|
||||
|
||||
opp-1989000000 {
|
||||
opp-hz = /bits/ 64 <1989000000>;
|
||||
opp-microvolt = <1125000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x000>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
clocks = <&infracfg CLK_INFRA_CA53SEL>,
|
||||
<&apmixedsys CLK_APMIXED_MAINPLL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cpu_opp_table_a>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a53";
|
||||
reg = <0x001>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
clocks = <&infracfg CLK_INFRA_CA53SEL>,
|
||||
<&apmixedsys CLK_APMIXED_MAINPLL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cpu_opp_table_a>;
|
||||
};
|
||||
|
||||
cpu2: cpu@100 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a72";
|
||||
reg = <0x100>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
clocks = <&infracfg CLK_INFRA_CA72SEL>,
|
||||
<&apmixedsys CLK_APMIXED_MAINPLL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cpu_opp_table_b>;
|
||||
};
|
||||
|
||||
cpu3: cpu@101 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a72";
|
||||
reg = <0x101>;
|
||||
enable-method = "psci";
|
||||
cpu-idle-states = <&CPU_SLEEP_0>;
|
||||
clocks = <&infracfg CLK_INFRA_CA72SEL>,
|
||||
<&apmixedsys CLK_APMIXED_MAINPLL>;
|
||||
clock-names = "cpu", "intermediate";
|
||||
operating-points-v2 = <&cpu_opp_table_b>;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
proc-supply = <&mt6397_vpca15_reg>;
|
||||
};
|
||||
|
||||
&cpu1 {
|
||||
proc-supply = <&mt6397_vpca15_reg>;
|
||||
};
|
||||
|
||||
&cpu2 {
|
||||
proc-supply = <&da9211_vcpu_reg>;
|
||||
sram-supply = <&mt6397_vsramca7_reg>;
|
||||
};
|
||||
|
||||
&cpu3 {
|
||||
proc-supply = <&da9211_vcpu_reg>;
|
||||
sram-supply = <&mt6397_vsramca7_reg>;
|
||||
};
|
||||
38
Bindings/crypto/amd,ccp-seattle-v1a.yaml
Normal file
38
Bindings/crypto/amd,ccp-seattle-v1a.yaml
Normal file
@ -0,0 +1,38 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/amd,ccp-seattle-v1a.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: AMD Cryptographic Coprocessor (ccp)
|
||||
|
||||
maintainers:
|
||||
- Tom Lendacky <thomas.lendacky@amd.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: amd,ccp-seattle-v1a
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto@e0100000 {
|
||||
compatible = "amd,ccp-seattle-v1a";
|
||||
reg = <0xe0100000 0x10000>;
|
||||
interrupts = <0 3 4>;
|
||||
dma-coherent;
|
||||
};
|
||||
@ -1,17 +0,0 @@
|
||||
* AMD Cryptographic Coprocessor driver (ccp)
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "amd,ccp-seattle-v1a"
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain the CCP interrupt
|
||||
|
||||
Optional properties:
|
||||
- dma-coherent: Present if dma operations are coherent
|
||||
|
||||
Example:
|
||||
ccp@e0100000 {
|
||||
compatible = "amd,ccp-seattle-v1a";
|
||||
reg = <0 0xe0100000 0 0x10000>;
|
||||
interrupt-parent = <&gic>;
|
||||
interrupts = <0 3 4>;
|
||||
};
|
||||
@ -1,16 +0,0 @@
|
||||
Axis crypto engine with PDMA interface.
|
||||
|
||||
Required properties:
|
||||
- compatible : Should be one of the following strings:
|
||||
"axis,artpec6-crypto" for the version in the Axis ARTPEC-6 SoC
|
||||
"axis,artpec7-crypto" for the version in the Axis ARTPEC-7 SoC.
|
||||
- reg: Base address and size for the PDMA register area.
|
||||
- interrupts: Interrupt handle for the PDMA interrupt line.
|
||||
|
||||
Example:
|
||||
|
||||
crypto@f4264000 {
|
||||
compatible = "axis,artpec6-crypto";
|
||||
reg = <0xf4264000 0x1000>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
39
Bindings/crypto/axis,artpec6-crypto.yaml
Normal file
39
Bindings/crypto/axis,artpec6-crypto.yaml
Normal file
@ -0,0 +1,39 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/axis,artpec6-crypto.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Axis ARTPEC6 crypto engine with PDMA interface
|
||||
|
||||
maintainers:
|
||||
- Lars Persson <lars.persson@axis.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- axis,artpec6-crypto
|
||||
- axis,artpec7-crypto
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
crypto@f4264000 {
|
||||
compatible = "axis,artpec6-crypto";
|
||||
reg = <0xf4264000 0x1000>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
@ -1,22 +0,0 @@
|
||||
The Broadcom Secure Processing Unit (SPU) hardware supports symmetric
|
||||
cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware
|
||||
blocks.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be one of the following:
|
||||
brcm,spum-crypto - for devices with SPU-M hardware
|
||||
brcm,spu2-crypto - for devices with SPU2 hardware
|
||||
brcm,spu2-v2-crypto - for devices with enhanced SPU2 hardware features like SHA3
|
||||
and Rabin Fingerprint support
|
||||
brcm,spum-nsp-crypto - for the Northstar Plus variant of the SPU-M hardware
|
||||
|
||||
- reg: Should contain SPU registers location and length.
|
||||
- mboxes: The mailbox channel to be used to communicate with the SPU.
|
||||
Mailbox channels correspond to DMA rings on the device.
|
||||
|
||||
Example:
|
||||
crypto@612d0000 {
|
||||
compatible = "brcm,spum-crypto";
|
||||
reg = <0 0x612d0000 0 0x900>;
|
||||
mboxes = <&pdc0 0>;
|
||||
};
|
||||
44
Bindings/crypto/brcm,spum-crypto.yaml
Normal file
44
Bindings/crypto/brcm,spum-crypto.yaml
Normal file
@ -0,0 +1,44 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/brcm,spum-crypto.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Broadcom SPU Crypto Offload
|
||||
|
||||
maintainers:
|
||||
- Rob Rice <rob.rice@broadcom.com>
|
||||
|
||||
description:
|
||||
The Broadcom Secure Processing Unit (SPU) hardware supports symmetric
|
||||
cryptographic offload for Broadcom SoCs. A SoC may have multiple SPU hardware
|
||||
blocks.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- brcm,spum-crypto
|
||||
- brcm,spu2-crypto
|
||||
- brcm,spu2-v2-crypto # enhanced SPU2 hardware features like SHA3 and Rabin Fingerprint support
|
||||
- brcm,spum-nsp-crypto # Northstar Plus variant of the SPU-M hardware
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
mboxes:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- mboxes
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto@612d0000 {
|
||||
compatible = "brcm,spum-crypto";
|
||||
reg = <0x612d0000 0x900>;
|
||||
mboxes = <&pdc0 0>;
|
||||
};
|
||||
@ -83,6 +83,8 @@ properties:
|
||||
by SNVS ONOFF, the driver can report the status of POWER key and wakeup
|
||||
system if pressed after system suspend.
|
||||
|
||||
$ref: /schemas/input/input.yaml
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,sec-v4.0-pwrkey
|
||||
@ -111,6 +113,9 @@ properties:
|
||||
maxItems: 1
|
||||
default: 116
|
||||
|
||||
power-off-time-sec:
|
||||
enum: [0, 5, 10, 15]
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- interrupts
|
||||
|
||||
@ -38,7 +38,9 @@ properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: fsl,sec-v5.4
|
||||
- enum:
|
||||
- fsl,sec-v5.4
|
||||
- fsl,sec-v6.0
|
||||
- const: fsl,sec-v5.0
|
||||
- const: fsl,sec-v4.0
|
||||
- items:
|
||||
@ -93,6 +95,12 @@ patternProperties:
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: fsl,sec-v6.0-job-ring
|
||||
- const: fsl,sec-v5.2-job-ring
|
||||
- const: fsl,sec-v5.0-job-ring
|
||||
- const: fsl,sec-v4.4-job-ring
|
||||
- const: fsl,sec-v4.0-job-ring
|
||||
- items:
|
||||
- const: fsl,sec-v5.4-job-ring
|
||||
- const: fsl,sec-v5.0-job-ring
|
||||
|
||||
@ -1,157 +0,0 @@
|
||||
SEC 6 is as Freescale's Cryptographic Accelerator and Assurance Module (CAAM).
|
||||
Currently Freescale powerpc chip C29X is embedded with SEC 6.
|
||||
SEC 6 device tree binding include:
|
||||
-SEC 6 Node
|
||||
-Job Ring Node
|
||||
-Full Example
|
||||
|
||||
=====================================================================
|
||||
SEC 6 Node
|
||||
|
||||
Description
|
||||
|
||||
Node defines the base address of the SEC 6 block.
|
||||
This block specifies the address range of all global
|
||||
configuration registers for the SEC 6 block.
|
||||
For example, In C293, we could see three SEC 6 node.
|
||||
|
||||
PROPERTIES
|
||||
|
||||
- compatible
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must include "fsl,sec-v6.0".
|
||||
|
||||
- fsl,sec-era
|
||||
Usage: optional
|
||||
Value type: <u32>
|
||||
Definition: A standard property. Define the 'ERA' of the SEC
|
||||
device.
|
||||
|
||||
- #address-cells
|
||||
Usage: required
|
||||
Value type: <u32>
|
||||
Definition: A standard property. Defines the number of cells
|
||||
for representing physical addresses in child nodes.
|
||||
|
||||
- #size-cells
|
||||
Usage: required
|
||||
Value type: <u32>
|
||||
Definition: A standard property. Defines the number of cells
|
||||
for representing the size of physical addresses in
|
||||
child nodes.
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Specifies the physical
|
||||
address and length of the SEC 6 configuration registers.
|
||||
|
||||
- ranges
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: A standard property. Specifies the physical address
|
||||
range of the SEC 6.0 register space (-SNVS not included). A
|
||||
triplet that includes the child address, parent address, &
|
||||
length.
|
||||
|
||||
Note: All other standard properties (see the Devicetree Specification)
|
||||
are allowed but are optional.
|
||||
|
||||
EXAMPLE
|
||||
crypto@a0000 {
|
||||
compatible = "fsl,sec-v6.0";
|
||||
fsl,sec-era = <6>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0xa0000 0x20000>;
|
||||
ranges = <0 0xa0000 0x20000>;
|
||||
};
|
||||
|
||||
=====================================================================
|
||||
Job Ring (JR) Node
|
||||
|
||||
Child of the crypto node defines data processing interface to SEC 6
|
||||
across the peripheral bus for purposes of processing
|
||||
cryptographic descriptors. The specified address
|
||||
range can be made visible to one (or more) cores.
|
||||
The interrupt defined for this node is controlled within
|
||||
the address range of this node.
|
||||
|
||||
- compatible
|
||||
Usage: required
|
||||
Value type: <string>
|
||||
Definition: Must include "fsl,sec-v6.0-job-ring".
|
||||
|
||||
- reg
|
||||
Usage: required
|
||||
Value type: <prop-encoded-array>
|
||||
Definition: Specifies a two JR parameters: an offset from
|
||||
the parent physical address and the length the JR registers.
|
||||
|
||||
- interrupts
|
||||
Usage: required
|
||||
Value type: <prop_encoded-array>
|
||||
Definition: Specifies the interrupts generated by this
|
||||
device. The value of the interrupts property
|
||||
consists of one interrupt specifier. The format
|
||||
of the specifier is defined by the binding document
|
||||
describing the node's interrupt parent.
|
||||
|
||||
EXAMPLE
|
||||
jr@1000 {
|
||||
compatible = "fsl,sec-v6.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
interrupts = <49 2 0 0>;
|
||||
};
|
||||
|
||||
===================================================================
|
||||
Full Example
|
||||
|
||||
Since some chips may contain more than one SEC, the dtsi contains
|
||||
only the node contents, not the node itself. A chip using the SEC
|
||||
should include the dtsi inside each SEC node. Example:
|
||||
|
||||
In qoriq-sec6.0.dtsi:
|
||||
|
||||
compatible = "fsl,sec-v6.0";
|
||||
fsl,sec-era = <6>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
jr@1000 {
|
||||
compatible = "fsl,sec-v6.0-job-ring",
|
||||
"fsl,sec-v5.2-job-ring",
|
||||
"fsl,sec-v5.0-job-ring",
|
||||
"fsl,sec-v4.4-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x1000 0x1000>;
|
||||
};
|
||||
|
||||
jr@2000 {
|
||||
compatible = "fsl,sec-v6.0-job-ring",
|
||||
"fsl,sec-v5.2-job-ring",
|
||||
"fsl,sec-v5.0-job-ring",
|
||||
"fsl,sec-v4.4-job-ring",
|
||||
"fsl,sec-v4.0-job-ring";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
|
||||
In the C293 device tree, we add the include of public property:
|
||||
|
||||
crypto@a0000 {
|
||||
/include/ "qoriq-sec6.0.dtsi"
|
||||
}
|
||||
|
||||
crypto@a0000 {
|
||||
reg = <0xa0000 0x20000>;
|
||||
ranges = <0 0xa0000 0x20000>;
|
||||
|
||||
jr@1000 {
|
||||
interrupts = <49 2 0 0>;
|
||||
};
|
||||
|
||||
jr@2000 {
|
||||
interrupts = <50 2 0 0>;
|
||||
};
|
||||
};
|
||||
134
Bindings/crypto/hisilicon,hip06-sec.yaml
Normal file
134
Bindings/crypto/hisilicon,hip06-sec.yaml
Normal file
@ -0,0 +1,134 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/hisilicon,hip06-sec.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Hisilicon hip06/hip07 Security Accelerator
|
||||
|
||||
maintainers:
|
||||
- Jonathan Cameron <Jonathan.Cameron@huawei.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- hisilicon,hip06-sec
|
||||
- hisilicon,hip07-sec
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: Registers for backend processing engines
|
||||
- description: Registers for common functionality
|
||||
- description: Registers for queue 0
|
||||
- description: Registers for queue 1
|
||||
- description: Registers for queue 2
|
||||
- description: Registers for queue 3
|
||||
- description: Registers for queue 4
|
||||
- description: Registers for queue 5
|
||||
- description: Registers for queue 6
|
||||
- description: Registers for queue 7
|
||||
- description: Registers for queue 8
|
||||
- description: Registers for queue 9
|
||||
- description: Registers for queue 10
|
||||
- description: Registers for queue 11
|
||||
- description: Registers for queue 12
|
||||
- description: Registers for queue 13
|
||||
- description: Registers for queue 14
|
||||
- description: Registers for queue 15
|
||||
|
||||
interrupts:
|
||||
items:
|
||||
- description: SEC unit error queue interrupt
|
||||
- description: Completion interrupt for queue 0
|
||||
- description: Error interrupt for queue 0
|
||||
- description: Completion interrupt for queue 1
|
||||
- description: Error interrupt for queue 1
|
||||
- description: Completion interrupt for queue 2
|
||||
- description: Error interrupt for queue 2
|
||||
- description: Completion interrupt for queue 3
|
||||
- description: Error interrupt for queue 3
|
||||
- description: Completion interrupt for queue 4
|
||||
- description: Error interrupt for queue 4
|
||||
- description: Completion interrupt for queue 5
|
||||
- description: Error interrupt for queue 5
|
||||
- description: Completion interrupt for queue 6
|
||||
- description: Error interrupt for queue 6
|
||||
- description: Completion interrupt for queue 7
|
||||
- description: Error interrupt for queue 7
|
||||
- description: Completion interrupt for queue 8
|
||||
- description: Error interrupt for queue 8
|
||||
- description: Completion interrupt for queue 9
|
||||
- description: Error interrupt for queue 9
|
||||
- description: Completion interrupt for queue 10
|
||||
- description: Error interrupt for queue 10
|
||||
- description: Completion interrupt for queue 11
|
||||
- description: Error interrupt for queue 11
|
||||
- description: Completion interrupt for queue 12
|
||||
- description: Error interrupt for queue 12
|
||||
- description: Completion interrupt for queue 13
|
||||
- description: Error interrupt for queue 13
|
||||
- description: Completion interrupt for queue 14
|
||||
- description: Error interrupt for queue 14
|
||||
- description: Completion interrupt for queue 15
|
||||
- description: Error interrupt for queue 15
|
||||
|
||||
dma-coherent: true
|
||||
|
||||
iommus:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- dma-coherent
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
bus {
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
|
||||
crypto@400d2000000 {
|
||||
compatible = "hisilicon,hip07-sec";
|
||||
reg = <0x400 0xd0000000 0x0 0x10000
|
||||
0x400 0xd2000000 0x0 0x10000
|
||||
0x400 0xd2010000 0x0 0x10000
|
||||
0x400 0xd2020000 0x0 0x10000
|
||||
0x400 0xd2030000 0x0 0x10000
|
||||
0x400 0xd2040000 0x0 0x10000
|
||||
0x400 0xd2050000 0x0 0x10000
|
||||
0x400 0xd2060000 0x0 0x10000
|
||||
0x400 0xd2070000 0x0 0x10000
|
||||
0x400 0xd2080000 0x0 0x10000
|
||||
0x400 0xd2090000 0x0 0x10000
|
||||
0x400 0xd20a0000 0x0 0x10000
|
||||
0x400 0xd20b0000 0x0 0x10000
|
||||
0x400 0xd20c0000 0x0 0x10000
|
||||
0x400 0xd20d0000 0x0 0x10000
|
||||
0x400 0xd20e0000 0x0 0x10000
|
||||
0x400 0xd20f0000 0x0 0x10000
|
||||
0x400 0xd2100000 0x0 0x10000>;
|
||||
interrupts = <576 4>,
|
||||
<577 1>, <578 4>,
|
||||
<579 1>, <580 4>,
|
||||
<581 1>, <582 4>,
|
||||
<583 1>, <584 4>,
|
||||
<585 1>, <586 4>,
|
||||
<587 1>, <588 4>,
|
||||
<589 1>, <590 4>,
|
||||
<591 1>, <592 4>,
|
||||
<593 1>, <594 4>,
|
||||
<595 1>, <596 4>,
|
||||
<597 1>, <598 4>,
|
||||
<599 1>, <600 4>,
|
||||
<601 1>, <602 4>,
|
||||
<603 1>, <604 4>,
|
||||
<605 1>, <606 4>,
|
||||
<607 1>, <608 4>;
|
||||
dma-coherent;
|
||||
iommus = <&p1_smmu_alg_a 0x600>;
|
||||
};
|
||||
};
|
||||
@ -1,67 +0,0 @@
|
||||
* Hisilicon hip07 Security Accelerator (SEC)
|
||||
|
||||
Required properties:
|
||||
- compatible: Must contain one of
|
||||
- "hisilicon,hip06-sec"
|
||||
- "hisilicon,hip07-sec"
|
||||
- reg: Memory addresses and lengths of the memory regions through which
|
||||
this device is controlled.
|
||||
Region 0 has registers to control the backend processing engines.
|
||||
Region 1 has registers for functionality common to all queues.
|
||||
Regions 2-18 have registers for the 16 individual queues which are isolated
|
||||
both in hardware and within the driver.
|
||||
- interrupts: Interrupt specifiers.
|
||||
Refer to interrupt-controller/interrupts.txt for generic interrupt client node
|
||||
bindings.
|
||||
Interrupt 0 is for the SEC unit error queue.
|
||||
Interrupt 2N + 1 is the completion interrupt for queue N.
|
||||
Interrupt 2N + 2 is the error interrupt for queue N.
|
||||
- dma-coherent: The driver assumes coherent dma is possible.
|
||||
|
||||
Optional properties:
|
||||
- iommus: The SEC units are behind smmu-v3 iommus.
|
||||
Refer to iommu/arm,smmu-v3.txt for more information.
|
||||
|
||||
Example:
|
||||
|
||||
p1_sec_a: crypto@400d2000000 {
|
||||
compatible = "hisilicon,hip07-sec";
|
||||
reg = <0x400 0xd0000000 0x0 0x10000
|
||||
0x400 0xd2000000 0x0 0x10000
|
||||
0x400 0xd2010000 0x0 0x10000
|
||||
0x400 0xd2020000 0x0 0x10000
|
||||
0x400 0xd2030000 0x0 0x10000
|
||||
0x400 0xd2040000 0x0 0x10000
|
||||
0x400 0xd2050000 0x0 0x10000
|
||||
0x400 0xd2060000 0x0 0x10000
|
||||
0x400 0xd2070000 0x0 0x10000
|
||||
0x400 0xd2080000 0x0 0x10000
|
||||
0x400 0xd2090000 0x0 0x10000
|
||||
0x400 0xd20a0000 0x0 0x10000
|
||||
0x400 0xd20b0000 0x0 0x10000
|
||||
0x400 0xd20c0000 0x0 0x10000
|
||||
0x400 0xd20d0000 0x0 0x10000
|
||||
0x400 0xd20e0000 0x0 0x10000
|
||||
0x400 0xd20f0000 0x0 0x10000
|
||||
0x400 0xd2100000 0x0 0x10000>;
|
||||
interrupt-parent = <&p1_mbigen_sec_a>;
|
||||
iommus = <&p1_smmu_alg_a 0x600>;
|
||||
dma-coherent;
|
||||
interrupts = <576 4>,
|
||||
<577 1>, <578 4>,
|
||||
<579 1>, <580 4>,
|
||||
<581 1>, <582 4>,
|
||||
<583 1>, <584 4>,
|
||||
<585 1>, <586 4>,
|
||||
<587 1>, <588 4>,
|
||||
<589 1>, <590 4>,
|
||||
<591 1>, <592 4>,
|
||||
<593 1>, <594 4>,
|
||||
<595 1>, <596 4>,
|
||||
<597 1>, <598 4>,
|
||||
<599 1>, <600 4>,
|
||||
<601 1>, <602 4>,
|
||||
<603 1>, <604 4>,
|
||||
<605 1>, <606 4>,
|
||||
<607 1>, <608 4>;
|
||||
};
|
||||
69
Bindings/crypto/img,hash-accelerator.yaml
Normal file
69
Bindings/crypto/img,hash-accelerator.yaml
Normal file
@ -0,0 +1,69 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/img,hash-accelerator.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Imagination Technologies hardware hash accelerator
|
||||
|
||||
maintainers:
|
||||
- James Hartley <james.hartley@imgtec.com>
|
||||
|
||||
description:
|
||||
The hash accelerator provides hardware hashing acceleration for
|
||||
SHA1, SHA224, SHA256 and MD5 hashes.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: img,hash-accelerator
|
||||
|
||||
reg:
|
||||
items:
|
||||
- description: Register base address and size
|
||||
- description: DMA port specifier
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
dmas:
|
||||
maxItems: 1
|
||||
|
||||
dma-names:
|
||||
items:
|
||||
- const: tx
|
||||
|
||||
clocks:
|
||||
items:
|
||||
- description: System clock for hash block registers
|
||||
- description: Hash clock for data path
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: sys
|
||||
- const: hash
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- dmas
|
||||
- dma-names
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/mips-gic.h>
|
||||
#include <dt-bindings/clock/pistachio-clk.h>
|
||||
|
||||
hash@18149600 {
|
||||
compatible = "img,hash-accelerator";
|
||||
reg = <0x18149600 0x100>, <0x18101100 0x4>;
|
||||
interrupts = <GIC_SHARED 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&dma 8 0xffffffff 0>;
|
||||
dma-names = "tx";
|
||||
clocks = <&cr_periph SYS_CLK_HASH>, <&clk_periph PERIPH_CLK_ROM>;
|
||||
clock-names = "sys", "hash";
|
||||
};
|
||||
@ -1,27 +0,0 @@
|
||||
Imagination Technologies hardware hash accelerator
|
||||
|
||||
The hash accelerator provides hardware hashing acceleration for
|
||||
SHA1, SHA224, SHA256 and MD5 hashes
|
||||
|
||||
Required properties:
|
||||
|
||||
- compatible : "img,hash-accelerator"
|
||||
- reg : Offset and length of the register set for the module, and the DMA port
|
||||
- interrupts : The designated IRQ line for the hashing module.
|
||||
- dmas : DMA specifier as per Documentation/devicetree/bindings/dma/dma.txt
|
||||
- dma-names : Should be "tx"
|
||||
- clocks : Clock specifiers
|
||||
- clock-names : "sys" Used to clock the hash block registers
|
||||
"hash" Used to clock data through the accelerator
|
||||
|
||||
Example:
|
||||
|
||||
hash: hash@18149600 {
|
||||
compatible = "img,hash-accelerator";
|
||||
reg = <0x18149600 0x100>, <0x18101100 0x4>;
|
||||
interrupts = <GIC_SHARED 59 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&dma 8 0xffffffff 0>;
|
||||
dma-names = "tx";
|
||||
clocks = <&cr_periph SYS_CLK_HASH>, <&clk_periph PERIPH_CLK_ROM>;
|
||||
clock-names = "sys", "hash";
|
||||
};
|
||||
133
Bindings/crypto/marvell,orion-crypto.yaml
Normal file
133
Bindings/crypto/marvell,orion-crypto.yaml
Normal file
@ -0,0 +1,133 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/crypto/marvell,orion-crypto.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Marvell Cryptographic Engines And Security Accelerator
|
||||
|
||||
maintainers:
|
||||
- Andrew Lunn <andrew@lunn.ch>
|
||||
- Boris Brezillon <bbrezillon@kernel.org>
|
||||
|
||||
description: |
|
||||
Marvell Cryptographic Engines And Security Accelerator
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,armada-370-crypto
|
||||
- marvell,armada-xp-crypto
|
||||
- marvell,armada-375-crypto
|
||||
- marvell,armada-38x-crypto
|
||||
- marvell,dove-crypto
|
||||
- marvell,kirkwood-crypto
|
||||
- marvell,orion-crypto
|
||||
|
||||
reg:
|
||||
minItems: 1
|
||||
items:
|
||||
- description: Registers region
|
||||
- description: SRAM region
|
||||
deprecated: true
|
||||
|
||||
reg-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: regs
|
||||
- const: sram
|
||||
deprecated: true
|
||||
|
||||
interrupts:
|
||||
description: One interrupt for each CESA engine
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clocks:
|
||||
description: One or two clocks for each CESA engine
|
||||
minItems: 1
|
||||
maxItems: 4
|
||||
|
||||
clock-names:
|
||||
minItems: 1
|
||||
items:
|
||||
- const: cesa0
|
||||
- const: cesa1
|
||||
- const: cesaz0
|
||||
- const: cesaz1
|
||||
|
||||
marvell,crypto-srams:
|
||||
description: Phandle(s) to crypto SRAM.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
items:
|
||||
maxItems: 1
|
||||
|
||||
marvell,crypto-sram-size:
|
||||
description: SRAM size reserved for crypto operations.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
default: 0x800
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- reg-names
|
||||
- interrupts
|
||||
- marvell,crypto-srams
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- marvell,kirkwood-crypto
|
||||
- marvell,orion-crypto
|
||||
then:
|
||||
required:
|
||||
- clocks
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- marvell,armada-370-crypto
|
||||
- marvell,armada-375-crypto
|
||||
- marvell,armada-38x-crypto
|
||||
- marvell,armada-xp-crypto
|
||||
then:
|
||||
required:
|
||||
- clock-names
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- marvell,armada-375-crypto
|
||||
- marvell,armada-38x-crypto
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
minItems: 4
|
||||
clock-names:
|
||||
minItems: 4
|
||||
else:
|
||||
properties:
|
||||
clocks:
|
||||
maxItems: 2
|
||||
clock-names:
|
||||
maxItems: 2
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
crypto@30000 {
|
||||
compatible = "marvell,orion-crypto";
|
||||
reg = <0x30000 0x10000>;
|
||||
reg-names = "regs";
|
||||
interrupts = <22>;
|
||||
marvell,crypto-srams = <&crypto_sram>;
|
||||
marvell,crypto-sram-size = <0x600>;
|
||||
};
|
||||
@ -1,44 +0,0 @@
|
||||
Marvell Cryptographic Engines And Security Accelerator
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of the following string
|
||||
"marvell,orion-crypto"
|
||||
"marvell,kirkwood-crypto"
|
||||
"marvell,dove-crypto"
|
||||
"marvell,armada-370-crypto"
|
||||
"marvell,armada-xp-crypto"
|
||||
"marvell,armada-375-crypto"
|
||||
"marvell,armada-38x-crypto"
|
||||
- reg: base physical address of the engine and length of memory mapped
|
||||
region. Can also contain an entry for the SRAM attached to the CESA,
|
||||
but this representation is deprecated and marvell,crypto-srams should
|
||||
be used instead
|
||||
- reg-names: "regs". Can contain an "sram" entry, but this representation
|
||||
is deprecated and marvell,crypto-srams should be used instead
|
||||
- interrupts: interrupt number
|
||||
- clocks: reference to the crypto engines clocks. This property is not
|
||||
required for orion and kirkwood platforms
|
||||
- clock-names: "cesaX" and "cesazX", X should be replaced by the crypto engine
|
||||
id.
|
||||
This property is not required for the orion and kirkwoord
|
||||
platforms.
|
||||
"cesazX" clocks are not required on armada-370 platforms
|
||||
- marvell,crypto-srams: phandle to crypto SRAM definitions
|
||||
|
||||
Optional properties:
|
||||
- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
|
||||
specified the whole SRAM is used (2KB)
|
||||
|
||||
|
||||
Examples:
|
||||
|
||||
crypto@90000 {
|
||||
compatible = "marvell,armada-xp-crypto";
|
||||
reg = <0x90000 0x10000>;
|
||||
reg-names = "regs";
|
||||
interrupts = <48>, <49>;
|
||||
clocks = <&gateclk 23>, <&gateclk 23>;
|
||||
clock-names = "cesa0", "cesa1";
|
||||
marvell,crypto-srams = <&crypto_sram0>, <&crypto_sram1>;
|
||||
marvell,crypto-sram-size = <0x600>;
|
||||
};
|
||||
@ -1,25 +0,0 @@
|
||||
MediaTek cryptographic accelerators
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "mediatek,eip97-crypto"
|
||||
- reg: Address and length of the register set for the device
|
||||
- interrupts: Should contain the five crypto engines interrupts in numeric
|
||||
order. These are global system and four descriptor rings.
|
||||
- clocks: the clock used by the core
|
||||
- clock-names: Must contain "cryp".
|
||||
- power-domains: Must contain a reference to the PM domain.
|
||||
|
||||
|
||||
Example:
|
||||
crypto: crypto@1b240000 {
|
||||
compatible = "mediatek,eip97-crypto";
|
||||
reg = <0 0x1b240000 0 0x20000>;
|
||||
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
|
||||
<GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
|
||||
clocks = <ðsys CLK_ETHSYS_CRYPTO>;
|
||||
clock-names = "cryp";
|
||||
power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
|
||||
};
|
||||
@ -1,32 +0,0 @@
|
||||
Marvell Cryptographic Engines And Security Accelerator
|
||||
|
||||
Required properties:
|
||||
- compatible: should be one of the following string
|
||||
"marvell,orion-crypto"
|
||||
"marvell,kirkwood-crypto"
|
||||
"marvell,dove-crypto"
|
||||
- reg: base physical address of the engine and length of memory mapped
|
||||
region. Can also contain an entry for the SRAM attached to the CESA,
|
||||
but this representation is deprecated and marvell,crypto-srams should
|
||||
be used instead
|
||||
- reg-names: "regs". Can contain an "sram" entry, but this representation
|
||||
is deprecated and marvell,crypto-srams should be used instead
|
||||
- interrupts: interrupt number
|
||||
- clocks: reference to the crypto engines clocks. This property is only
|
||||
required for Dove platforms
|
||||
- marvell,crypto-srams: phandle to crypto SRAM definitions
|
||||
|
||||
Optional properties:
|
||||
- marvell,crypto-sram-size: SRAM size reserved for crypto operations, if not
|
||||
specified the whole SRAM is used (2KB)
|
||||
|
||||
Examples:
|
||||
|
||||
crypto@30000 {
|
||||
compatible = "marvell,orion-crypto";
|
||||
reg = <0x30000 0x10000>;
|
||||
reg-names = "regs";
|
||||
interrupts = <22>;
|
||||
marvell,crypto-srams = <&crypto_sram>;
|
||||
marvell,crypto-sram-size = <0x600>;
|
||||
};
|
||||
@ -45,6 +45,7 @@ properties:
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,qcs615-qce
|
||||
- qcom,qcs8300-qce
|
||||
- qcom,sa8775p-qce
|
||||
- qcom,sc7280-qce
|
||||
|
||||
@ -128,7 +128,7 @@ required:
|
||||
- power-domains
|
||||
- ports
|
||||
|
||||
additionalProperties: false
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
@ -180,4 +180,69 @@ examples:
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
dsi1: dsi@10860000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "renesas,r9a07g044-mipi-dsi", "renesas,rzg2l-mipi-dsi";
|
||||
reg = <0x10860000 0x20000>;
|
||||
interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "seq0", "seq1", "vin1", "rcv",
|
||||
"ferr", "ppi", "debug";
|
||||
clocks = <&cpg CPG_MOD R9A07G044_MIPI_DSI_PLLCLK>,
|
||||
<&cpg CPG_MOD R9A07G044_MIPI_DSI_SYSCLK>,
|
||||
<&cpg CPG_MOD R9A07G044_MIPI_DSI_ACLK>,
|
||||
<&cpg CPG_MOD R9A07G044_MIPI_DSI_PCLK>,
|
||||
<&cpg CPG_MOD R9A07G044_MIPI_DSI_VCLK>,
|
||||
<&cpg CPG_MOD R9A07G044_MIPI_DSI_LPCLK>;
|
||||
clock-names = "pllclk", "sysclk", "aclk", "pclk", "vclk", "lpclk";
|
||||
resets = <&cpg R9A07G044_MIPI_DSI_CMN_RSTB>,
|
||||
<&cpg R9A07G044_MIPI_DSI_ARESET_N>,
|
||||
<&cpg R9A07G044_MIPI_DSI_PRESET_N>;
|
||||
reset-names = "rst", "arst", "prst";
|
||||
power-domains = <&cpg>;
|
||||
|
||||
panel@0 {
|
||||
compatible = "rocktech,jh057n00900";
|
||||
reg = <0>;
|
||||
vcc-supply = <®_2v8_p>;
|
||||
iovcc-supply = <®_1v8_p>;
|
||||
reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>;
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&dsi1_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
dsi1_in: endpoint {
|
||||
remote-endpoint = <&du_out_dsi1>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
dsi1_out: endpoint {
|
||||
data-lanes = <1 2 3 4>;
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
...
|
||||
|
||||
@ -118,15 +118,11 @@ $defs:
|
||||
ti,lvds-vod-swing-clock-microvolt:
|
||||
description: LVDS diferential output voltage <min max> for clock
|
||||
lanes in microvolts.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
ti,lvds-vod-swing-data-microvolt:
|
||||
description: LVDS diferential output voltage <min max> for data
|
||||
lanes in microvolts.
|
||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
||||
minItems: 2
|
||||
maxItems: 2
|
||||
|
||||
allOf:
|
||||
|
||||
@ -1,17 +0,0 @@
|
||||
Device Tree bindings for Freescale TCON Driver
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be one of
|
||||
* "fsl,vf610-tcon".
|
||||
|
||||
- reg: Address and length of the register set for tcon.
|
||||
- clocks: From common clock binding: handle to tcon ipg clock.
|
||||
- clock-names: From common clock binding: Shall be "ipg".
|
||||
|
||||
Examples:
|
||||
timing-controller@4003d000 {
|
||||
compatible = "fsl,vf610-tcon";
|
||||
reg = <0x4003d000 0x1000>;
|
||||
clocks = <&clks VF610_CLK_TCON0>;
|
||||
clock-names = "ipg";
|
||||
};
|
||||
43
Bindings/display/fsl,vf610-tcon.yaml
Normal file
43
Bindings/display/fsl,vf610-tcon.yaml
Normal file
@ -0,0 +1,43 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/fsl,vf610-tcon.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale TCON
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,vf610-tcon
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ipg
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/vf610-clock.h>
|
||||
|
||||
timing-controller@4003d000 {
|
||||
compatible = "fsl,vf610-tcon";
|
||||
reg = <0x4003d000 0x1000>;
|
||||
clocks = <&clks VF610_CLK_TCON0>;
|
||||
clock-names = "ipg";
|
||||
};
|
||||
36
Bindings/display/imx/fsl,imx-display-subsystem.yaml
Normal file
36
Bindings/display/imx/fsl,imx-display-subsystem.yaml
Normal file
@ -0,0 +1,36 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx-display-subsystem.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX DRM master device
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
description:
|
||||
The freescale i.MX DRM master device is a virtual device needed to list all
|
||||
IPU or other display interface nodes that comprise the graphics subsystem.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx-display-subsystem
|
||||
|
||||
ports:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
description:
|
||||
Should contain a list of phandles pointing to camera
|
||||
sensor interface ports of IPU devices.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
display-subsystem {
|
||||
compatible = "fsl,imx-display-subsystem";
|
||||
ports = <&ipu_di0>;
|
||||
};
|
||||
74
Bindings/display/imx/fsl,imx-parallel-display.yaml
Normal file
74
Bindings/display/imx/fsl,imx-parallel-display.yaml
Normal file
@ -0,0 +1,74 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx-parallel-display.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Parallel display support
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx-parallel-display
|
||||
|
||||
interface-pix-fmt:
|
||||
$ref: /schemas/types.yaml#/definitions/string
|
||||
enum:
|
||||
- rgb24
|
||||
- rgb565
|
||||
- bgr666
|
||||
- lvds666
|
||||
|
||||
ddc:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle describing the i2c bus handling the display data channel
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: input port connected to the IPU display interface
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: output port connected to a panel
|
||||
|
||||
required:
|
||||
- compatible
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
display {
|
||||
compatible = "fsl,imx-parallel-display";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interface-pix-fmt = "rgb24";
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
endpoint {
|
||||
remote-endpoint = <&ipu_di0_disp0>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
97
Bindings/display/imx/fsl,imx6q-ipu.yaml
Normal file
97
Bindings/display/imx/fsl,imx6q-ipu.yaml
Normal file
@ -0,0 +1,97 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ipu.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX IPUv3
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- fsl,imx51-ipu
|
||||
- fsl,imx53-ipu
|
||||
- fsl,imx6q-ipu
|
||||
- items:
|
||||
- const: fsl,imx6qp-ipu
|
||||
- const: fsl,imx6q-ipu
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
clocks:
|
||||
maxItems: 3
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: bus
|
||||
- const: di0
|
||||
- const: di1
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
fsl,prg:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to prg node associated with this IPU instance
|
||||
|
||||
port@0:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: CSI0
|
||||
|
||||
port@1:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: CSI1
|
||||
|
||||
port@2:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: DI0
|
||||
|
||||
port@3:
|
||||
$ref: /schemas/graph.yaml#/$defs/port-base
|
||||
unevaluatedProperties: false
|
||||
description: DI1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- resets
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
display-controller@18000000 {
|
||||
compatible = "fsl,imx53-ipu";
|
||||
reg = <0x18000000 0x080000000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <11 10>;
|
||||
resets = <&src 2>;
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
endpoint {
|
||||
remote-endpoint = <&display_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
193
Bindings/display/imx/fsl,imx6q-ldb.yaml
Normal file
193
Bindings/display/imx/fsl,imx6q-ldb.yaml
Normal file
@ -0,0 +1,193 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx6q-ldb.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale LVDS Display Bridge (ldb)
|
||||
|
||||
description:
|
||||
The LVDS Display Bridge device tree node contains up to two lvds-channel
|
||||
nodes describing each of the two LVDS encoder channels of the bridge.
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- fsl,imx53-ldb
|
||||
- items:
|
||||
- enum:
|
||||
- fsl,imx6q-ldb
|
||||
- const: fsl,imx53-ldb
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
gpr:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
The phandle points to the iomuxc-gpr region containing the LVDS
|
||||
control register.
|
||||
|
||||
clocks:
|
||||
minItems: 6
|
||||
maxItems: 8
|
||||
|
||||
clock-names:
|
||||
oneOf:
|
||||
- items:
|
||||
- const: di0_pll
|
||||
- const: di1_pll
|
||||
- const: di0_sel
|
||||
- const: di1_sel
|
||||
- const: di0
|
||||
- const: di1
|
||||
- items:
|
||||
- const: di0_pll
|
||||
- const: di1_pll
|
||||
- const: di0_sel
|
||||
- const: di1_sel
|
||||
- const: di2_sel
|
||||
- const: di3_sel
|
||||
- const: di0
|
||||
- const: di1
|
||||
|
||||
fsl,dual-channel:
|
||||
$ref: /schemas/types.yaml#/definitions/flag
|
||||
description:
|
||||
if it exists, only LVDS channel 0 should
|
||||
be configured - one input will be distributed on both outputs in dual
|
||||
channel mode
|
||||
|
||||
patternProperties:
|
||||
'^lvds-channel@[0-1]$':
|
||||
type: object
|
||||
description:
|
||||
Each LVDS Channel has to contain either an of graph link to a panel device node
|
||||
or a display-timings node that describes the video timings for the connected
|
||||
LVDS display as well as the fsl,data-mapping and fsl,data-width properties.
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
'#address-cells':
|
||||
const: 1
|
||||
|
||||
'#size-cells':
|
||||
const: 0
|
||||
|
||||
display-timings:
|
||||
$ref: /schemas/display/panel/display-timings.yaml#
|
||||
|
||||
fsl,data-mapping:
|
||||
enum:
|
||||
- spwg
|
||||
- jeida
|
||||
|
||||
fsl,data-width:
|
||||
$ref: /schemas/types.yaml#/definitions/uint32
|
||||
description: should be <18> or <24>
|
||||
enum:
|
||||
- 18
|
||||
- 24
|
||||
|
||||
fsl,panel:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description: phandle to lcd panel
|
||||
|
||||
patternProperties:
|
||||
'^port@[0-4]$':
|
||||
$ref: /schemas/graph.yaml#/properties/port
|
||||
description:
|
||||
On i.MX5, the internal two-input-multiplexer is used. Due to hardware
|
||||
limitations, only one input port (port@[0,1]) can be used for each channel
|
||||
(lvds-channel@[0,1], respectively).
|
||||
On i.MX6, there should be four input ports (port@[0-3]) that correspond
|
||||
to the four LVDS multiplexer inputs.
|
||||
A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected
|
||||
to a panel input port. Optionally, the output port can be left out if
|
||||
display-timings are used instead.
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- gpr
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx5-clock.h>
|
||||
|
||||
ldb@53fa8008 {
|
||||
compatible = "fsl,imx53-ldb";
|
||||
reg = <0x53fa8008 0x4>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpr = <&gpr>;
|
||||
clocks = <&clks IMX5_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX5_CLK_LDB_DI1_SEL>,
|
||||
<&clks IMX5_CLK_IPU_DI0_SEL>,
|
||||
<&clks IMX5_CLK_IPU_DI1_SEL>,
|
||||
<&clks IMX5_CLK_LDB_DI0_GATE>,
|
||||
<&clks IMX5_CLK_LDB_DI1_GATE>;
|
||||
clock-names = "di0_pll", "di1_pll",
|
||||
"di0_sel", "di1_sel",
|
||||
"di0", "di1";
|
||||
|
||||
/* Using an of-graph endpoint link to connect the panel */
|
||||
lvds-channel@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
endpoint {
|
||||
remote-endpoint = <&ipu_di0_lvds0>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Using display-timings and fsl,data-mapping/width instead */
|
||||
lvds-channel@1 {
|
||||
reg = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <24>;
|
||||
|
||||
display-timings {/* ... */
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
endpoint {
|
||||
remote-endpoint = <&ipu_di1_lvds1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
55
Bindings/display/imx/fsl,imx6qp-pre.yaml
Normal file
55
Bindings/display/imx/fsl,imx6qp-pre.yaml
Normal file
@ -0,0 +1,55 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-pre.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX PRE (Prefetch Resolve Engine)
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx6qp-pre
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: axi
|
||||
fsl,iram:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
description:
|
||||
phandle pointing to the mmio-sram device node, that should be
|
||||
used for the PRE SRAM double buffer.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx6qdl-clock.h>
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
pre@21c8000 {
|
||||
compatible = "fsl,imx6qp-pre";
|
||||
reg = <0x021c8000 0x1000>;
|
||||
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clks IMX6QDL_CLK_PRE0>;
|
||||
clock-names = "axi";
|
||||
fsl,iram = <&ocram2>;
|
||||
};
|
||||
54
Bindings/display/imx/fsl,imx6qp-prg.yaml
Normal file
54
Bindings/display/imx/fsl,imx6qp-prg.yaml
Normal file
@ -0,0 +1,54 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/imx/fsl,imx6qp-prg.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Freescale i.MX PRG (Prefetch Resolve Gasket)
|
||||
|
||||
maintainers:
|
||||
- Frank Li <Frank.Li@nxp.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: fsl,imx6qp-prg
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 2
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: ipg
|
||||
- const: axi
|
||||
|
||||
fsl,pres:
|
||||
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||
items:
|
||||
maxItems: 1
|
||||
description:
|
||||
phandles to the PRE units attached to this PRG, with the fixed
|
||||
PRE as the first entry and the muxable PREs following.
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- clocks
|
||||
- clock-names
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/clock/imx6qdl-clock.h>
|
||||
|
||||
prg@21cc000 {
|
||||
compatible = "fsl,imx6qp-prg";
|
||||
reg = <0x021cc000 0x1000>;
|
||||
clocks = <&clks IMX6QDL_CLK_PRG0_APB>, <&clks IMX6QDL_CLK_PRG0_AXI>;
|
||||
clock-names = "ipg", "axi";
|
||||
fsl,pres = <&pre1>, <&pre2>, <&pre3>;
|
||||
};
|
||||
|
||||
@ -1,160 +0,0 @@
|
||||
Freescale i.MX DRM master device
|
||||
================================
|
||||
|
||||
The freescale i.MX DRM master device is a virtual device needed to list all
|
||||
IPU or other display interface nodes that comprise the graphics subsystem.
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,imx-display-subsystem"
|
||||
- ports: Should contain a list of phandles pointing to display interface ports
|
||||
of IPU devices
|
||||
|
||||
example:
|
||||
|
||||
display-subsystem {
|
||||
compatible = "fsl,imx-display-subsystem";
|
||||
ports = <&ipu_di0>;
|
||||
};
|
||||
|
||||
|
||||
Freescale i.MX IPUv3
|
||||
====================
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,<chip>-ipu" where <chip> is one of
|
||||
- imx51
|
||||
- imx53
|
||||
- imx6q
|
||||
- imx6qp
|
||||
- reg: should be register base and length as documented in the
|
||||
datasheet
|
||||
- interrupts: Should contain sync interrupt and error interrupt,
|
||||
in this order.
|
||||
- resets: phandle pointing to the system reset controller and
|
||||
reset line index, see reset/fsl,imx-src.txt for details
|
||||
Additional required properties for fsl,imx6qp-ipu:
|
||||
- fsl,prg: phandle to prg node associated with this IPU instance
|
||||
Optional properties:
|
||||
- port@[0-3]: Port nodes with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
Ports 0 and 1 should correspond to CSI0 and CSI1,
|
||||
ports 2 and 3 should correspond to DI0 and DI1, respectively.
|
||||
|
||||
example:
|
||||
|
||||
ipu: ipu@18000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-ipu";
|
||||
reg = <0x18000000 0x080000000>;
|
||||
interrupts = <11 10>;
|
||||
resets = <&src 2>;
|
||||
|
||||
ipu_di0: port@2 {
|
||||
reg = <2>;
|
||||
|
||||
ipu_di0_disp0: endpoint {
|
||||
remote-endpoint = <&display_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
Freescale i.MX PRE (Prefetch Resolve Engine)
|
||||
============================================
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "fsl,imx6qp-pre"
|
||||
- reg: should be register base and length as documented in the
|
||||
datasheet
|
||||
- clocks : phandle to the PRE axi clock input, as described
|
||||
in Documentation/devicetree/bindings/clock/clock-bindings.txt and
|
||||
Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
|
||||
- clock-names: should be "axi"
|
||||
- interrupts: should contain the PRE interrupt
|
||||
- fsl,iram: phandle pointing to the mmio-sram device node, that should be
|
||||
used for the PRE SRAM double buffer.
|
||||
|
||||
example:
|
||||
|
||||
pre@21c8000 {
|
||||
compatible = "fsl,imx6qp-pre";
|
||||
reg = <0x021c8000 0x1000>;
|
||||
interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
|
||||
clocks = <&clks IMX6QDL_CLK_PRE0>;
|
||||
clock-names = "axi";
|
||||
fsl,iram = <&ocram2>;
|
||||
};
|
||||
|
||||
Freescale i.MX PRG (Prefetch Resolve Gasket)
|
||||
============================================
|
||||
|
||||
Required properties:
|
||||
- compatible: should be "fsl,imx6qp-prg"
|
||||
- reg: should be register base and length as documented in the
|
||||
datasheet
|
||||
- clocks : phandles to the PRG ipg and axi clock inputs, as described
|
||||
in Documentation/devicetree/bindings/clock/clock-bindings.txt and
|
||||
Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
|
||||
- clock-names: should be "ipg" and "axi"
|
||||
- fsl,pres: phandles to the PRE units attached to this PRG, with the fixed
|
||||
PRE as the first entry and the muxable PREs following.
|
||||
|
||||
example:
|
||||
|
||||
prg@21cc000 {
|
||||
compatible = "fsl,imx6qp-prg";
|
||||
reg = <0x021cc000 0x1000>;
|
||||
clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
|
||||
<&clks IMX6QDL_CLK_PRG0_AXI>;
|
||||
clock-names = "ipg", "axi";
|
||||
fsl,pres = <&pre1>, <&pre2>, <&pre3>;
|
||||
};
|
||||
|
||||
Parallel display support
|
||||
========================
|
||||
|
||||
Required properties:
|
||||
- compatible: Should be "fsl,imx-parallel-display"
|
||||
Optional properties:
|
||||
- interface-pix-fmt: How this display is connected to the
|
||||
display interface. Currently supported types: "rgb24", "rgb565", "bgr666"
|
||||
and "lvds666".
|
||||
- ddc: phandle describing the i2c bus handling the display data
|
||||
channel
|
||||
- port@[0-1]: Port nodes with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/media/video-interfaces.txt.
|
||||
Port 0 is the input port connected to the IPU display interface,
|
||||
port 1 is the output port connected to a panel.
|
||||
|
||||
example:
|
||||
|
||||
disp0 {
|
||||
compatible = "fsl,imx-parallel-display";
|
||||
interface-pix-fmt = "rgb24";
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
display_in: endpoint {
|
||||
remote-endpoint = <&ipu_di0_disp0>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
display_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel {
|
||||
...
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&display_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -1,146 +0,0 @@
|
||||
Device-Tree bindings for LVDS Display Bridge (ldb)
|
||||
|
||||
LVDS Display Bridge
|
||||
===================
|
||||
|
||||
The LVDS Display Bridge device tree node contains up to two lvds-channel
|
||||
nodes describing each of the two LVDS encoder channels of the bridge.
|
||||
|
||||
Required properties:
|
||||
- #address-cells : should be <1>
|
||||
- #size-cells : should be <0>
|
||||
- compatible : should be "fsl,imx53-ldb" or "fsl,imx6q-ldb".
|
||||
Both LDB versions are similar, but i.MX6 has an additional
|
||||
multiplexer in the front to select any of the four IPU display
|
||||
interfaces as input for each LVDS channel.
|
||||
- gpr : should be <&gpr> on i.MX53 and i.MX6q.
|
||||
The phandle points to the iomuxc-gpr region containing the LVDS
|
||||
control register.
|
||||
- clocks, clock-names : phandles to the LDB divider and selector clocks and to
|
||||
the display interface selector clocks, as described in
|
||||
Documentation/devicetree/bindings/clock/clock-bindings.txt
|
||||
The following clocks are expected on i.MX53:
|
||||
"di0_pll" - LDB LVDS channel 0 mux
|
||||
"di1_pll" - LDB LVDS channel 1 mux
|
||||
"di0" - LDB LVDS channel 0 gate
|
||||
"di1" - LDB LVDS channel 1 gate
|
||||
"di0_sel" - IPU1 DI0 mux
|
||||
"di1_sel" - IPU1 DI1 mux
|
||||
On i.MX6q the following additional clocks are needed:
|
||||
"di2_sel" - IPU2 DI0 mux
|
||||
"di3_sel" - IPU2 DI1 mux
|
||||
The needed clock numbers for each are documented in
|
||||
Documentation/devicetree/bindings/clock/imx5-clock.yaml, and in
|
||||
Documentation/devicetree/bindings/clock/imx6q-clock.yaml.
|
||||
|
||||
Optional properties:
|
||||
- pinctrl-names : should be "default" on i.MX53, not used on i.MX6q
|
||||
- pinctrl-0 : a phandle pointing to LVDS pin settings on i.MX53,
|
||||
not used on i.MX6q
|
||||
- fsl,dual-channel : boolean. if it exists, only LVDS channel 0 should
|
||||
be configured - one input will be distributed on both outputs in dual
|
||||
channel mode
|
||||
|
||||
LVDS Channel
|
||||
============
|
||||
|
||||
Each LVDS Channel has to contain either an of graph link to a panel device node
|
||||
or a display-timings node that describes the video timings for the connected
|
||||
LVDS display as well as the fsl,data-mapping and fsl,data-width properties.
|
||||
|
||||
Required properties:
|
||||
- reg : should be <0> or <1>
|
||||
- port: Input and output port nodes with endpoint definitions as defined in
|
||||
Documentation/devicetree/bindings/graph.txt.
|
||||
On i.MX5, the internal two-input-multiplexer is used. Due to hardware
|
||||
limitations, only one input port (port@[0,1]) can be used for each channel
|
||||
(lvds-channel@[0,1], respectively).
|
||||
On i.MX6, there should be four input ports (port@[0-3]) that correspond
|
||||
to the four LVDS multiplexer inputs.
|
||||
A single output port (port@2 on i.MX5, port@4 on i.MX6) must be connected
|
||||
to a panel input port. Optionally, the output port can be left out if
|
||||
display-timings are used instead.
|
||||
|
||||
Optional properties (required if display-timings are used):
|
||||
- display-timings : A node that describes the display timings as defined in
|
||||
Documentation/devicetree/bindings/display/panel/display-timing.txt.
|
||||
- fsl,data-mapping : should be "spwg" or "jeida"
|
||||
This describes how the color bits are laid out in the
|
||||
serialized LVDS signal.
|
||||
- fsl,data-width : should be <18> or <24>
|
||||
|
||||
example:
|
||||
|
||||
gpr: iomuxc-gpr@53fa8000 {
|
||||
/* ... */
|
||||
};
|
||||
|
||||
ldb: ldb@53fa8008 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-ldb";
|
||||
gpr = <&gpr>;
|
||||
clocks = <&clks IMX5_CLK_LDB_DI0_SEL>,
|
||||
<&clks IMX5_CLK_LDB_DI1_SEL>,
|
||||
<&clks IMX5_CLK_IPU_DI0_SEL>,
|
||||
<&clks IMX5_CLK_IPU_DI1_SEL>,
|
||||
<&clks IMX5_CLK_LDB_DI0_GATE>,
|
||||
<&clks IMX5_CLK_LDB_DI1_GATE>;
|
||||
clock-names = "di0_pll", "di1_pll",
|
||||
"di0_sel", "di1_sel",
|
||||
"di0", "di1";
|
||||
|
||||
/* Using an of-graph endpoint link to connect the panel */
|
||||
lvds-channel@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
|
||||
lvds0_in: endpoint {
|
||||
remote-endpoint = <&ipu_di0_lvds0>;
|
||||
};
|
||||
};
|
||||
|
||||
port@2 {
|
||||
reg = <2>;
|
||||
|
||||
lvds0_out: endpoint {
|
||||
remote-endpoint = <&panel_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
/* Using display-timings and fsl,data-mapping/width instead */
|
||||
lvds-channel@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
fsl,data-mapping = "spwg";
|
||||
fsl,data-width = <24>;
|
||||
|
||||
display-timings {
|
||||
/* ... */
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <1>;
|
||||
|
||||
lvds1_in: endpoint {
|
||||
remote-endpoint = <&ipu_di1_lvds1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
panel: lvds-panel {
|
||||
/* ... */
|
||||
|
||||
port {
|
||||
panel_in: endpoint {
|
||||
remote-endpoint = <&lvds0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -25,6 +25,10 @@ properties:
|
||||
- mediatek,mt8173-disp-aal
|
||||
- mediatek,mt8183-disp-aal
|
||||
- mediatek,mt8195-mdp3-aal
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8188-mdp3-aal
|
||||
- const: mediatek,mt8195-mdp3-aal
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt2712-disp-aal
|
||||
|
||||
@ -27,6 +27,10 @@ properties:
|
||||
- mediatek,mt8167-disp-color
|
||||
- mediatek,mt8173-disp-color
|
||||
- mediatek,mt8195-mdp3-color
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8188-mdp3-color
|
||||
- const: mediatek,mt8195-mdp3-color
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt7623-disp-color
|
||||
|
||||
@ -25,6 +25,10 @@ properties:
|
||||
- mediatek,mt8173-disp-merge
|
||||
- mediatek,mt8195-disp-merge
|
||||
- mediatek,mt8195-mdp3-merge
|
||||
- items:
|
||||
- enum:
|
||||
- mediatek,mt8188-mdp3-merge
|
||||
- const: mediatek,mt8195-mdp3-merge
|
||||
- items:
|
||||
- const: mediatek,mt6795-disp-merge
|
||||
- const: mediatek,mt8173-disp-merge
|
||||
|
||||
41
Bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
Normal file
41
Bindings/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml
Normal file
@ -0,0 +1,41 @@
|
||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/display/mediatek/mediatek,mt8195-hdmi-ddc.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: MediaTek HDMI MT8195 series HDMI Display Data Channel (DDC)
|
||||
|
||||
maintainers:
|
||||
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
|
||||
- CK Hu <ck.hu@mediatek.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: mediatek,mt8195-hdmi-ddc
|
||||
- items:
|
||||
- const: mediatek,mt8188-hdmi-ddc
|
||||
- const: mediatek,mt8195-hdmi-ddc
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- clocks
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
hdmi {
|
||||
hdmi_ddc: i2c {
|
||||
compatible = "mediatek,mt8195-hdmi-ddc";
|
||||
clocks = <&clk26m>;
|
||||
};
|
||||
};
|
||||
...
|
||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
x
Reference in New Issue
Block a user