Merge branch '2022-04-21-further-cleanups'

- Fix SPL_SYS_MALLOC_SIMPLE and non-SPL_FRAMEWORK boards (a large number
  of PowerPC platforms)
- Remove duplication of crc16 functionality
- Migrate COUNTER_FREQUENCY to CONFIG_COUNTER_FREQUENCY and have it in
  Kconfig
This commit is contained in:
Tom Rini 2022-04-21 19:55:38 -04:00
commit ea5583b90f
283 changed files with 374 additions and 524 deletions

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@ -283,6 +283,7 @@ config SYS_MALLOC_LEN
config SPL_SYS_MALLOC_F_LEN config SPL_SYS_MALLOC_F_LEN
hex "Size of malloc() pool in SPL" hex "Size of malloc() pool in SPL"
depends on SYS_MALLOC_F && SPL depends on SYS_MALLOC_F && SPL
default 0 if !SPL_FRAMEWORK
default 0x2800 if RCAR_GEN3 default 0x2800 if RCAR_GEN3
default SYS_MALLOC_F_LEN default SYS_MALLOC_F_LEN
help help

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@ -20,6 +20,23 @@ config ARM64_CRC32
not be present on all ARMv8.0, but is always present on ARMv8.1 and not be present on all ARMv8.0, but is always present on ARMv8.1 and
newer. newer.
config COUNTER_FREQUENCY
int "Timer clock frequency"
depends on ARM64 || CPU_V7A
default 8000000 if IMX8 || MX7 || MX6UL || MX6ULL
default 24000000 if ARCH_SUNXI || ARCH_EXYNOS || ROCKCHIP_RK3128 || \
ROCKCHIP_RK3288 || ROCKCHIP_RK322X || ROCKCHIP_RK3036
default 25000000 if ARCH_LX2160A || ARCH_LX2162A || ARCH_LS1088A
default 100000000 if ARCH_ZYNQMP
default 0
help
For platforms with ARMv8-A and ARMv7-A which features a system
counter, those platforms needs software to program the counter
frequency. Setup time clock frequency for certain platform.
0 means no need to configure the system counter frequency.
For platforms needs the frequency set in U-Boot with a
pre-defined value, should have the macro defined as a non-zero value.
config POSITION_INDEPENDENT config POSITION_INDEPENDENT
bool "Generate position-independent pre-relocation code" bool "Generate position-independent pre-relocation code"
depends on ARM64 || CPU_V7A depends on ARM64 || CPU_V7A

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@ -36,7 +36,7 @@
.align 5 .align 5
#define ONE_MS (COUNTER_FREQUENCY / 1000) #define ONE_MS (CONFIG_COUNTER_FREQUENCY / 1000)
#define RESET_WAIT (30 * ONE_MS) #define RESET_WAIT (30 * ONE_MS)
.globl psci_version .globl psci_version

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@ -65,7 +65,7 @@ int timer_init(void)
/* Enable System Counter */ /* Enable System Counter */
writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr); writel(SYS_COUNTER_CTRL_ENABLE, &sctr->cntcr);
freq = COUNTER_FREQUENCY; freq = CONFIG_COUNTER_FREQUENCY;
asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq)); asm("mcr p15, 0, %0, c14, c0, 0" : : "r" (freq));
/* Set PL1 Physical Timer Ctrl */ /* Set PL1 Physical Timer Ctrl */

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@ -189,11 +189,11 @@ ENTRY(_nonsec_init)
* we do this here instead. * we do this here instead.
* But first check if we have the generic timer. * But first check if we have the generic timer.
*/ */
#ifdef COUNTER_FREQUENCY #if CONFIG_COUNTER_FREQUENCY
mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1 mrc p15, 0, r0, c0, c1, 1 @ read ID_PFR1
and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits and r0, r0, #CPUID_ARM_GENTIMER_MASK @ mask arch timer bits
cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT) cmp r0, #(1 << CPUID_ARM_GENTIMER_SHIFT)
ldreq r1, =COUNTER_FREQUENCY ldreq r1, =CONFIG_COUNTER_FREQUENCY
mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ mcreq p15, 0, r1, c14, c0, 0 @ write CNTFRQ
#endif #endif

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@ -57,7 +57,7 @@ static u32 __secure cp15_read_cntp_ctl(void)
return val; return val;
} }
#define ONE_MS (COUNTER_FREQUENCY / 1000) #define ONE_MS (CONFIG_COUNTER_FREQUENCY / 1000)
static void __secure __mdelay(u32 ms) static void __secure __mdelay(u32 ms)
{ {

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@ -113,6 +113,6 @@ _dead_loop:
.align 3 .align 3
.global __real_cntfrq .global __real_cntfrq
__real_cntfrq: __real_cntfrq:
.quad COUNTER_FREQUENCY .quad CONFIG_COUNTER_FREQUENCY
/* Secondary Boot Code ends here */ /* Secondary Boot Code ends here */
__secondary_boot_code_end: __secondary_boot_code_end:

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@ -138,9 +138,9 @@ pie_fixup_done:
0: 0:
msr daifclr, #0x4 /* Unmask SError interrupts */ msr daifclr, #0x4 /* Unmask SError interrupts */
#ifdef COUNTER_FREQUENCY #if CONFIG_COUNTER_FREQUENCY
branch_if_not_highest_el x0, 4f branch_if_not_highest_el x0, 4f
ldr x0, =COUNTER_FREQUENCY ldr x0, =CONFIG_COUNTER_FREQUENCY
msr cntfrq_el0, x0 /* Initialize CNTFRQ */ msr cntfrq_el0, x0 /* Initialize CNTFRQ */
#endif #endif

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@ -20,7 +20,7 @@
void rockchip_stimer_init(void) void rockchip_stimer_init(void)
{ {
asm volatile("mcr p15, 0, %0, c14, c0, 0" asm volatile("mcr p15, 0, %0, c14, c0, 0"
: : "r"(COUNTER_FREQUENCY)); : : "r"(CONFIG_COUNTER_FREQUENCY));
writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);

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@ -88,7 +88,7 @@ __weak void rockchip_stimer_init(void)
return; return;
#ifndef CONFIG_ARM64 #ifndef CONFIG_ARM64
asm volatile("mcr p15, 0, %0, c14, c0, 0" asm volatile("mcr p15, 0, %0, c14, c0, 0"
: : "r"(COUNTER_FREQUENCY)); : : "r"(CONFIG_COUNTER_FREQUENCY));
#endif #endif
writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);
writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE); writel(0xffffffff, CONFIG_ROCKCHIP_STIMER_BASE);

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@ -39,7 +39,7 @@ __weak void rockchip_stimer_init(void)
#ifndef CONFIG_ARM64 #ifndef CONFIG_ARM64
asm volatile("mcr p15, 0, %0, c14, c0, 0" asm volatile("mcr p15, 0, %0, c14, c0, 0"
: : "r"(COUNTER_FREQUENCY)); : : "r"(CONFIG_COUNTER_FREQUENCY));
#endif #endif
writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG); writel(0, CONFIG_ROCKCHIP_STIMER_BASE + TIMER_CONTROL_REG);

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@ -24,12 +24,6 @@ config SYS_CONFIG_NAME
config SYS_MALLOC_LEN config SYS_MALLOC_LEN
default 0x2000000 default 0x2000000
config COUNTER_FREQUENCY
int "Timer clock frequency"
default 0
help
Setup time clock frequency for certain platform
config ZYNQ_SDHCI_MAX_FREQ config ZYNQ_SDHCI_MAX_FREQ
default 200000000 default 200000000

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@ -202,14 +202,14 @@ int board_init(void)
* we avoid the risk of writing to it. * we avoid the risk of writing to it.
*/ */
asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq)); asm volatile("mrc p15, 0, %0, c14, c0, 0" : "=r"(freq));
if (freq != COUNTER_FREQUENCY) { if (freq != CONFIG_COUNTER_FREQUENCY) {
debug("arch timer frequency is %d Hz, should be %d, fixing ...\n", debug("arch timer frequency is %d Hz, should be %d, fixing ...\n",
freq, COUNTER_FREQUENCY); freq, CONFIG_COUNTER_FREQUENCY);
#ifdef CONFIG_NON_SECURE #ifdef CONFIG_NON_SECURE
printf("arch timer frequency is wrong, but cannot adjust it\n"); printf("arch timer frequency is wrong, but cannot adjust it\n");
#else #else
asm volatile("mcr p15, 0, %0, c14, c0, 0" asm volatile("mcr p15, 0, %0, c14, c0, 0"
: : "r"(COUNTER_FREQUENCY)); : : "r"(CONFIG_COUNTER_FREQUENCY));
#endif #endif
} }
} }

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@ -74,7 +74,7 @@ int board_early_init_r(void)
* Program freq register in System counter and * Program freq register in System counter and
* enable system counter. * enable system counter.
*/ */
writel(COUNTER_FREQUENCY, writel(CONFIG_COUNTER_FREQUENCY,
&iou_scntr_secure->base_frequency_id_register); &iou_scntr_secure->base_frequency_id_register);
debug("counter val 0x%x\n", debug("counter val 0x%x\n",

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@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SYS_CONFIG_NAME="exynos78x0-common"
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x40001000 CONFIG_SYS_TEXT_BASE=0x40001000
CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SYS_MALLOC_F_LEN=0x400

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@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SYS_CONFIG_NAME="exynos78x0-common"
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x40001000 CONFIG_SYS_TEXT_BASE=0x40001000
CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SYS_MALLOC_F_LEN=0x400

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@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SYS_CONFIG_NAME="exynos78x0-common" CONFIG_SYS_CONFIG_NAME="exynos78x0-common"
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=26000000
CONFIG_ARCH_EXYNOS=y CONFIG_ARCH_EXYNOS=y
CONFIG_SYS_TEXT_BASE=0x40001000 CONFIG_SYS_TEXT_BASE=0x40001000
CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SYS_MALLOC_F_LEN=0x400

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_OWL=y CONFIG_ARCH_OWL=y
CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SIZE=0x2000

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y CONFIG_SPL_GPIO=y

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SPL_GPIO=y CONFIG_SPL_GPIO=y

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
# CONFIG_SYS_ARCH_TIMER is not set # CONFIG_SYS_ARCH_TIMER is not set
CONFIG_TARGET_PRESIDIO_ASIC=y CONFIG_TARGET_PRESIDIO_ASIC=y
CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_SYS_TEXT_BASE=0x04000000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
# CONFIG_SYS_ARCH_TIMER is not set # CONFIG_SYS_ARCH_TIMER is not set
CONFIG_TARGET_PRESIDIO_ASIC=y CONFIG_TARGET_PRESIDIO_ASIC=y
CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_SYS_TEXT_BASE=0x04000000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
# CONFIG_SYS_ARCH_TIMER is not set # CONFIG_SYS_ARCH_TIMER is not set
CONFIG_TARGET_PRESIDIO_ASIC=y CONFIG_TARGET_PRESIDIO_ASIC=y
CONFIG_SYS_TEXT_BASE=0x04000000 CONFIG_SYS_TEXT_BASE=0x04000000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_OWL=y CONFIG_ARCH_OWL=y
CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_LEN=0x2000000
CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7" CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7"

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_ARCH_SNAPDRAGON=y CONFIG_ARCH_SNAPDRAGON=y
CONFIG_SYS_TEXT_BASE=0x8f600000 CONFIG_SYS_TEXT_BASE=0x8f600000
CONFIG_SYS_MALLOC_LEN=0x802000 CONFIG_SYS_MALLOC_LEN=0x802000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_ARCH_SNAPDRAGON=y CONFIG_ARCH_SNAPDRAGON=y
CONFIG_SYS_TEXT_BASE=0x80080000 CONFIG_SYS_TEXT_BASE=0x80080000
CONFIG_SYS_MALLOC_LEN=0x804000 CONFIG_SYS_MALLOC_LEN=0x804000

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MALLOC_F_LEN=0x2000

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00600000 CONFIG_SYS_TEXT_BASE=0x00600000
CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MALLOC_F_LEN=0x2000

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00a00000 CONFIG_SYS_TEXT_BASE=0x00a00000
CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBCOMMON_SUPPORT=y

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_OFFSET=0x3F8000

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SYS_MALLOC_F_LEN=0x2000

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_SYS_MALLOC_F_LEN=0x1000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=16666666
CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_RMOBILE=y CONFIG_ARCH_RMOBILE=y
CONFIG_SYS_TEXT_BASE=0x50000000 CONFIG_SYS_TEXT_BASE=0x50000000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_TARGET_HIKEY960=y CONFIG_TARGET_HIKEY960=y
CONFIG_SYS_TEXT_BASE=0x1ac98000 CONFIG_SYS_TEXT_BASE=0x1ac98000
CONFIG_SYS_MALLOC_LEN=0x801000 CONFIG_SYS_MALLOC_LEN=0x801000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=19000000
CONFIG_SYS_TEXT_BASE=0x35000000 CONFIG_SYS_TEXT_BASE=0x35000000
CONFIG_SYS_MALLOC_LEN=0x801000 CONFIG_SYS_MALLOC_LEN=0x801000
CONFIG_NR_DRAM_BANKS=6 CONFIG_NR_DRAM_BANKS=6

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_SL28=y CONFIG_TARGET_SL28=y
CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_LEN=0x202000
CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SYS_MALLOC_F_LEN=0x4000

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=24000000
CONFIG_ARCH_ROCKCHIP=y CONFIG_ARCH_ROCKCHIP=y
CONFIG_SYS_TEXT_BASE=0x00200000 CONFIG_SYS_TEXT_BASE=0x00200000
CONFIG_NR_DRAM_BANKS=1 CONFIG_NR_DRAM_BANKS=1

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_TARGET_LS1012A2G5RDB=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_LEN=0x500000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_TARGET_LS1012A2G5RDB=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRDM=y CONFIG_TARGET_LS1012AFRDM=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_LEN=0x500000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRDM=y CONFIG_TARGET_LS1012AFRDM=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y CONFIG_TARGET_LS1012AFRWY=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_LEN=0x500000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y CONFIG_TARGET_LS1012AFRWY=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_LEN=0x500000

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@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y CONFIG_TARGET_LS1012AFRWY=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AFRWY=y CONFIG_TARGET_LS1012AFRWY=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AQDS=y CONFIG_TARGET_LS1012AQDS=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_LEN=0x500000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AQDS=y CONFIG_TARGET_LS1012AQDS=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012AQDS=y CONFIG_TARGET_LS1012AQDS=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y CONFIG_TARGET_LS1012ARDB=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_LEN=0x500000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y CONFIG_TARGET_LS1012ARDB=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SYS_MALLOC_LEN=0x500000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y CONFIG_TARGET_LS1012ARDB=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1012ARDB=y CONFIG_TARGET_LS1012ARDB=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AIOT=y CONFIG_TARGET_LS1021AIOT=y
CONFIG_SYS_TEXT_BASE=0x40010000 CONFIG_SYS_TEXT_BASE=0x40010000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AIOT=y CONFIG_TARGET_LS1021AIOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021AQDS=y CONFIG_TARGET_LS1021AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATSN=y CONFIG_TARGET_LS1021ATSN=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATSN=y CONFIG_TARGET_LS1021ATSN=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SYS_MALLOC_LEN=0x1020000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SYS_MALLOC_LEN=0x1020000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SYS_MALLOC_LEN=0x1020000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SYS_MALLOC_LEN=0x1020000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x1002000 CONFIG_SYS_MALLOC_LEN=0x1002000

View File

@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SYS_MALLOC_LEN=0x1020000

View File

@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SYS_MALLOC_LEN=0x1020000

View File

@ -1,6 +1,7 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_SPL_SKIP_LOWLEVEL_INIT=y CONFIG_SPL_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=12500000
CONFIG_TARGET_LS1021ATWR=y CONFIG_TARGET_LS1021ATWR=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x1020000 CONFIG_SYS_MALLOC_LEN=0x1020000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028AQDS=y CONFIG_TARGET_LS1028AQDS=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028AQDS=y CONFIG_TARGET_LS1028AQDS=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1028AQDS=y CONFIG_TARGET_LS1028AQDS=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_LEN=0x202000

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028ARDB=y CONFIG_TARGET_LS1028ARDB=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y

View File

@ -1,5 +1,6 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SKIP_LOWLEVEL_INIT=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_GIC_V3_ITS=y CONFIG_GIC_V3_ITS=y
CONFIG_TARGET_LS1028ARDB=y CONFIG_TARGET_LS1028ARDB=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_SYS_MALLOC_LEN=0x120000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_SYS_MALLOC_LEN=0x120000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_SYS_MALLOC_LEN=0x120000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_TEXT_BASE=0x40100000 CONFIG_SYS_TEXT_BASE=0x40100000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043AQDS=y CONFIG_TARGET_LS1043AQDS=y
CONFIG_TFABOOT=y CONFIG_TFABOOT=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_SYS_MALLOC_LEN=0x120000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_TEXT_BASE=0x60100000 CONFIG_SYS_TEXT_BASE=0x60100000
CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_SYS_MALLOC_LEN=0x120000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

View File

@ -1,4 +1,5 @@
CONFIG_ARM=y CONFIG_ARM=y
CONFIG_COUNTER_FREQUENCY=25000000
CONFIG_TARGET_LS1043ARDB=y CONFIG_TARGET_LS1043ARDB=y
CONFIG_SYS_TEXT_BASE=0x82000000 CONFIG_SYS_TEXT_BASE=0x82000000
CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SYS_MALLOC_LEN=0x102000

Some files were not shown because too many files have changed in this diff Show More