arm64: dts: imx8mm-cl-iot-gate-u-boot.dtsi: use common imx8mm-u-boot.dtsi

Use common imx8mm-u-boot.dtsi.

Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Marcel Ziswiler 2021-10-23 01:15:12 +02:00 committed by Tom Rini
parent 2dc3ac5772
commit e9c63ab0e3
2 changed files with 4 additions and 70 deletions

View File

@ -3,6 +3,8 @@
* Copyright 2019 NXP * Copyright 2019 NXP
*/ */
#include "imx8mm-u-boot.dtsi"
/ { / {
binman: binman { binman: binman {
multiple-images; multiple-images;
@ -22,11 +24,6 @@
}; };
}; };
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
u-boot,dm-spl; u-boot,dm-spl;
}; };
@ -35,19 +32,6 @@
u-boot,dm-spl; u-boot,dm-spl;
}; };
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&binman { &binman {
u-boot-spl-ddr { u-boot-spl-ddr {
filename = "u-boot-spl-ddr.bin"; filename = "u-boot-spl-ddr.bin";
@ -161,14 +145,6 @@
}; };
}; };
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&fec1 { &fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
}; };
@ -201,15 +177,6 @@
u-boot,dm-spl; u-boot,dm-spl;
}; };
&iomuxc {
u-boot,dm-spl;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&pinctrl_i2c2 { &pinctrl_i2c2 {
u-boot,dm-spl; u-boot,dm-spl;
}; };

View File

@ -3,6 +3,8 @@
* Copyright 2019 NXP * Copyright 2019 NXP
*/ */
#include "imx8mm-u-boot.dtsi"
/ { / {
binman: binman { binman: binman {
multiple-images; multiple-images;
@ -22,11 +24,6 @@
}; };
}; };
&{/soc@0} {
u-boot,dm-pre-reloc;
u-boot,dm-spl;
};
&{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} { &{/soc@0/bus@30800000/i2c@30a30000/pmic@4b} {
u-boot,dm-spl; u-boot,dm-spl;
}; };
@ -35,19 +32,6 @@
u-boot,dm-spl; u-boot,dm-spl;
}; };
&aips1 {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&aips2 {
u-boot,dm-spl;
};
&aips3 {
u-boot,dm-spl;
};
&binman { &binman {
u-boot-spl-ddr { u-boot-spl-ddr {
filename = "u-boot-spl-ddr.bin"; filename = "u-boot-spl-ddr.bin";
@ -149,14 +133,6 @@
}; };
}; };
&clk {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
/delete-property/ assigned-clocks;
/delete-property/ assigned-clock-parents;
/delete-property/ assigned-clock-rates;
};
&fec1 { &fec1 {
phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>; phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
}; };
@ -189,15 +165,6 @@
u-boot,dm-spl; u-boot,dm-spl;
}; };
&iomuxc {
u-boot,dm-spl;
};
&osc_24m {
u-boot,dm-spl;
u-boot,dm-pre-reloc;
};
&pinctrl_i2c2 { &pinctrl_i2c2 {
u-boot,dm-spl; u-boot,dm-spl;
}; };