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pci: pci_mvebu, pci_aardvark: Fix size of configuration cache

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Since u32 takes up 4 bytes, we need to divide the number of u32s by 4
for cfgcache.

Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
This commit is contained in:
Marek Behún 2021-11-11 16:35:44 +01:00 committed by Stefan Roese
parent cfbd2bc695
commit e967c84a6d
2 changed files with 2 additions and 2 deletions
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2
drivers/pci/pci-aardvark.c
View File

@ -202,7 +202,7 @@ struct pcie_advk {
int sec_busno; int sec_busno;
struct udevice *dev; struct udevice *dev;
struct gpio_desc reset_gpio; struct gpio_desc reset_gpio;
u32 cfgcache[0x34 - 0x10]; u32 cfgcache[(0x34 - 0x10) / 4];
bool cfgcrssve; bool cfgcrssve;
}; };

2
drivers/pci/pci_mvebu.c
View File

@ -88,7 +88,7 @@ struct mvebu_pcie {
unsigned int mem_attr; unsigned int mem_attr;
unsigned int io_target; unsigned int io_target;
unsigned int io_attr; unsigned int io_attr;
u32 cfgcache[0x34 - 0x10]; u32 cfgcache[(0x34 - 0x10) / 4];
}; };
/* /*