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synced 2025-11-29 06:31:28 +01:00
mx6sabresd: Convert to DM_PMIC
The usage of DM_PMIC is preferred, so convert to it. This also brings the benefit of causing a significant amount of code removal. Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
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@ -17,7 +17,6 @@
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#include <env.h>
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#include <env.h>
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#include <linux/errno.h>
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#include <linux/errno.h>
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#include <asm/gpio.h>
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#include <asm/gpio.h>
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#include <asm/mach-imx/mxc_i2c.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/iomux-v3.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/boot_mode.h>
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#include <asm/mach-imx/video.h>
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#include <asm/mach-imx/video.h>
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@ -28,7 +27,6 @@
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#include <asm/arch/crm_regs.h>
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#include <asm/arch/crm_regs.h>
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#include <asm/io.h>
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#include <asm/io.h>
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#include <asm/arch/sys_proto.h>
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#include <asm/arch/sys_proto.h>
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#include <i2c.h>
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#include <input.h>
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#include <input.h>
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#include <power/pmic.h>
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#include <power/pmic.h>
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#include <power/pfuze100_pmic.h>
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#include <power/pfuze100_pmic.h>
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@ -49,14 +47,6 @@ DECLARE_GLOBAL_DATA_PTR;
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#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
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#define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST)
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#define I2C_PAD_CTRL (PAD_CTL_PUS_100K_UP | \
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PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS | \
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PAD_CTL_ODE | PAD_CTL_SRE_FAST)
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#define I2C_PMIC 1
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#define I2C_PAD MUX_PAD_CTRL(I2C_PAD_CTRL)
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#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
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#define DISP0_PWR_EN IMX_GPIO_NR(1, 21)
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#define KEY_VOL_UP IMX_GPIO_NR(1, 4)
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#define KEY_VOL_UP IMX_GPIO_NR(1, 4)
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@ -174,32 +164,6 @@ static void enable_lvds(struct display_info_t const *dev)
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enable_backlight();
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enable_backlight();
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}
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}
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static struct i2c_pads_info mx6q_i2c_pad_info1 = {
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.scl = {
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.i2c_mode = MX6Q_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
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.gpio_mode = MX6Q_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
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.gp = IMX_GPIO_NR(4, 12)
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},
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.sda = {
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.i2c_mode = MX6Q_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
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.gpio_mode = MX6Q_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
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.gp = IMX_GPIO_NR(4, 13)
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}
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};
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static struct i2c_pads_info mx6dl_i2c_pad_info1 = {
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.scl = {
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.i2c_mode = MX6DL_PAD_KEY_COL3__I2C2_SCL | I2C_PAD,
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.gpio_mode = MX6DL_PAD_KEY_COL3__GPIO4_IO12 | I2C_PAD,
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.gp = IMX_GPIO_NR(4, 12)
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},
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.sda = {
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.i2c_mode = MX6DL_PAD_KEY_ROW3__I2C2_SDA | I2C_PAD,
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.gpio_mode = MX6DL_PAD_KEY_ROW3__GPIO4_IO13 | I2C_PAD,
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.gp = IMX_GPIO_NR(4, 13)
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}
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};
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static void setup_spi(void)
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static void setup_spi(void)
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{
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{
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SETUP_IOMUX_PADS(ecspi1_pads);
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SETUP_IOMUX_PADS(ecspi1_pads);
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@ -495,10 +459,7 @@ int board_init(void)
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#ifdef CONFIG_MXC_SPI
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#ifdef CONFIG_MXC_SPI
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setup_spi();
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setup_spi();
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#endif
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#endif
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if (is_mx6dq() || is_mx6dqp())
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setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6q_i2c_pad_info1);
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else
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setup_i2c(1, CONFIG_SYS_I2C_SPEED, 0x7f, &mx6dl_i2c_pad_info1);
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#if defined(CONFIG_VIDEO_IPUV3)
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#if defined(CONFIG_VIDEO_IPUV3)
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setup_display();
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setup_display();
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#endif
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#endif
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@ -511,29 +472,32 @@ int board_init(void)
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int power_init_board(void)
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int power_init_board(void)
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{
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{
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struct pmic *p;
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struct udevice *dev;
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unsigned int reg;
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unsigned int reg;
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int ret;
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int ret;
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p = pfuze_common_init(I2C_PMIC);
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ret = pmic_get("pfuze100@8", &dev);
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if (!p)
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if (ret == -ENODEV)
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return -ENODEV;
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return 0;
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ret = pfuze_mode_init(p, APS_PFM);
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if (ret != 0)
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return ret;
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ret = pfuze_mode_init(dev, APS_PFM);
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if (ret < 0)
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if (ret < 0)
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return ret;
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return ret;
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/* Increase VGEN3 from 2.5 to 2.8V */
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/* Increase VGEN3 from 2.5 to 2.8V */
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pmic_reg_read(p, PFUZE100_VGEN3VOL, ®);
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reg = pmic_reg_read(dev, PFUZE100_VGEN3VOL);
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reg &= ~LDO_VOL_MASK;
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reg &= ~LDO_VOL_MASK;
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reg |= LDOB_2_80V;
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reg |= LDOB_2_80V;
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pmic_reg_write(p, PFUZE100_VGEN3VOL, reg);
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pmic_reg_write(dev, PFUZE100_VGEN3VOL, reg);
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/* Increase VGEN5 from 2.8 to 3V */
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/* Increase VGEN5 from 2.8 to 3V */
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pmic_reg_read(p, PFUZE100_VGEN5VOL, ®);
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reg = pmic_reg_read(dev, PFUZE100_VGEN5VOL);
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reg &= ~LDO_VOL_MASK;
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reg &= ~LDO_VOL_MASK;
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reg |= LDOB_3_00V;
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reg |= LDOB_3_00V;
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pmic_reg_write(p, PFUZE100_VGEN5VOL, reg);
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pmic_reg_write(dev, PFUZE100_VGEN5VOL, reg);
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return 0;
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return 0;
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}
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}
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@ -902,7 +866,6 @@ void board_init_f(ulong dummy)
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ccgr_init();
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ccgr_init();
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gpr_init();
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gpr_init();
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/* iomux and setup of i2c */
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board_early_init_f();
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board_early_init_f();
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/* setup GP timer */
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/* setup GP timer */
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@ -11,9 +11,6 @@ CONFIG_ENV_SIZE=0x2000
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CONFIG_ENV_OFFSET=0xC0000
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CONFIG_ENV_OFFSET=0xC0000
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CONFIG_MX6QDL=y
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CONFIG_MX6QDL=y
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CONFIG_TARGET_MX6SABRESD=y
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CONFIG_TARGET_MX6SABRESD=y
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CONFIG_SYS_I2C_MXC_I2C1=y
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CONFIG_SYS_I2C_MXC_I2C2=y
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CONFIG_SYS_I2C_MXC_I2C3=y
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CONFIG_DM_GPIO=y
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CONFIG_DM_GPIO=y
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CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd"
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CONFIG_DEFAULT_DEVICE_TREE="imx6q-sabresd"
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CONFIG_SPL_TEXT_BASE=0x00908000
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CONFIG_SPL_TEXT_BASE=0x00908000
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@ -82,7 +79,6 @@ CONFIG_FASTBOOT_BUF_SIZE=0x10000000
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH=y
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CONFIG_FASTBOOT_FLASH_MMC_DEV=2
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CONFIG_FASTBOOT_FLASH_MMC_DEV=2
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CONFIG_DM_I2C=y
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CONFIG_DM_I2C=y
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CONFIG_SPL_SYS_I2C_LEGACY=y
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CONFIG_SYS_I2C_MXC=y
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CONFIG_SYS_I2C_MXC=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_SUPPORT_EMMC_BOOT=y
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CONFIG_FSL_USDHC=y
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CONFIG_FSL_USDHC=y
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@ -100,11 +96,12 @@ CONFIG_PCI_SCAN_SHOW=y
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CONFIG_PCIE_IMX=y
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CONFIG_PCIE_IMX=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL=y
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CONFIG_PINCTRL_IMX6=y
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CONFIG_PINCTRL_IMX6=y
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CONFIG_POWER_LEGACY=y
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CONFIG_DM_PMIC=y
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CONFIG_POWER_PFUZE100=y
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CONFIG_DM_PMIC_PFUZE100=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_POWER_I2C=y
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CONFIG_DM_REGULATOR_PFUZE100=y
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CONFIG_DM_REGULATOR_GPIO=y
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CONFIG_DM_SERIAL=y
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CONFIG_DM_SERIAL=y
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CONFIG_MXC_UART=y
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CONFIG_MXC_UART=y
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CONFIG_SPI=y
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CONFIG_SPI=y
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@ -24,9 +24,6 @@
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#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
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#define CFG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(3, 19)
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#endif
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#endif
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/* PMIC */
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#define CFG_POWER_PFUZE100_I2C_ADDR 0x08
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/* USB Configs */
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/* USB Configs */
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#ifdef CONFIG_CMD_USB
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#ifdef CONFIG_CMD_USB
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#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CFG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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