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ARM: meson: switch AXG & GX dwc2 otg to DM

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With CONFIG_DM_USB_GADGET=y, we no longer need any board_usb_*() logic
because:
* the dwc2 driver is DM compatible, and handles its own clock enabling
* the dwc3-meson-gxl glue drivers handles "force mode switching"

Remove all mach-meson gx & axg usb code and enable CONFIG_DM_USB_GADGET.

Note: Only configs having both CONFIG_USB_DWC3_MESON_GXL=y *and*
      USB_GADGET_DWC2_OTG=y have been updated.

Thanks for the original work from Mattijs at [1]

[1] https://lore.kernel.org/all/20221024-meson-dm-usb-v1-2-2ab077a503b9@baylibre.com/

Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20230117-u-boot-usb-gxl-otg-dm-v1-2-2853f6d75b06@linaro.org
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
This commit is contained in:
Neil Armstrong 2023-01-17 10:11:46 +01:00
parent 043a9674b6
commit e327e2affd
12 changed files with 10 additions and 266 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

129
arch/arm/mach-meson/board-axg.c
View File

@ -15,12 +15,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/armv8/mmu.h> #include <asm/armv8/mmu.h>
#include <linux/sizes.h> #include <linux/sizes.h>
#include <usb.h>
#include <linux/usb/otg.h>
#include <asm/arch/usb-gx.h>
#include <usb/dwc2_udc.h>
#include <clk.h>
#include <phy.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -90,126 +84,3 @@ static struct mm_region axg_mem_map[] = {
}; };
struct mm_region *mem_map = axg_mem_map; struct mm_region *mem_map = axg_mem_map;
#if CONFIG_IS_ENABLED(USB_DWC3_MESON_GXL) && \
CONFIG_IS_ENABLED(USB_GADGET_DWC2_OTG)
static struct dwc2_plat_otg_data meson_gx_dwc2_data;
int board_usb_init(int index, enum usb_init_type init)
{
struct fdtdec_phandle_args args;
const void *blob = gd->fdt_blob;
int node, dwc2_node;
struct udevice *dev, *clk_dev;
struct clk clk;
int ret;
/* find the usb glue node */
node = fdt_node_offset_by_compatible(blob, -1,
"amlogic,meson-axg-usb-ctrl");
if (node < 0) {
debug("Not found usb-control node\n");
return -ENODEV;
}
if (!fdtdec_get_is_enabled(blob, node)) {
debug("usb is disabled in the device tree\n");
return -ENODEV;
}
ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev);
if (ret) {
debug("Not found usb-control device\n");
return ret;
}
/* find the dwc2 node */
dwc2_node = fdt_node_offset_by_compatible(blob, node,
"amlogic,meson-g12a-usb");
if (dwc2_node < 0) {
debug("Not found dwc2 node\n");
return -ENODEV;
}
if (!fdtdec_get_is_enabled(blob, dwc2_node)) {
debug("dwc2 is disabled in the device tree\n");
return -ENODEV;
}
meson_gx_dwc2_data.regs_otg = fdtdec_get_addr(blob, dwc2_node, "reg");
if (meson_gx_dwc2_data.regs_otg == FDT_ADDR_T_NONE) {
debug("usbotg: can't get base address\n");
return -ENODATA;
}
/* Enable clock */
ret = fdtdec_parse_phandle_with_args(blob, dwc2_node, "clocks",
"#clock-cells", 0, 0, &args);
if (ret) {
debug("usbotg has no clocks defined in the device tree\n");
return ret;
}
ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, &clk_dev);
if (ret)
return ret;
if (args.args_count != 1) {
debug("Can't find clock ID in the device tree\n");
return -ENODATA;
}
clk.dev = clk_dev;
clk.id = args.args[0];
ret = clk_enable(&clk);
if (ret) {
debug("Failed to enable usbotg clock\n");
return ret;
}
meson_gx_dwc2_data.rx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
"g-rx-fifo-size", 0);
meson_gx_dwc2_data.np_tx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
"g-np-tx-fifo-size", 0);
meson_gx_dwc2_data.tx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
"g-tx-fifo-size", 0);
/* Switch to peripheral mode */
ret = dwc3_meson_gxl_force_mode(dev, USB_DR_MODE_PERIPHERAL);
if (ret)
return ret;
return dwc2_udc_probe(&meson_gx_dwc2_data);
}
int board_usb_cleanup(int index, enum usb_init_type init)
{
const void *blob = gd->fdt_blob;
struct udevice *dev;
int node;
int ret;
/* find the usb glue node */
node = fdt_node_offset_by_compatible(blob, -1,
"amlogic,meson-axg-usb-ctrl");
if (node < 0) {
debug("Not found usb-control node\n");
return -ENODEV;
}
if (!fdtdec_get_is_enabled(blob, node))
return -ENODEV;
ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev);
if (ret)
return ret;
/* Switch to OTG mode */
ret = dwc3_meson_gxl_force_mode(dev, USB_DR_MODE_HOST);
if (ret)
return ret;
return 0;
}
#endif

137
arch/arm/mach-meson/board-gx.c
View File

@ -16,12 +16,6 @@
#include <asm/io.h> #include <asm/io.h>
#include <asm/armv8/mmu.h> #include <asm/armv8/mmu.h>
#include <linux/sizes.h> #include <linux/sizes.h>
#include <usb.h>
#include <linux/usb/otg.h>
#include <asm/arch/usb-gx.h>
#include <usb/dwc2_udc.h>
#include <clk.h>
#include <phy.h>
DECLARE_GLOBAL_DATA_PTR; DECLARE_GLOBAL_DATA_PTR;
@ -108,134 +102,3 @@ static struct mm_region gx_mem_map[] = {
}; };
struct mm_region *mem_map = gx_mem_map; struct mm_region *mem_map = gx_mem_map;
#if CONFIG_IS_ENABLED(USB_DWC3_MESON_GXL) && \
CONFIG_IS_ENABLED(USB_GADGET_DWC2_OTG)
static struct dwc2_plat_otg_data meson_gx_dwc2_data;
int board_usb_init(int index, enum usb_init_type init)
{
struct fdtdec_phandle_args args;
const void *blob = gd->fdt_blob;
int node, dwc2_node;
struct udevice *dev, *clk_dev;
struct clk clk;
int ret;
/* find the usb glue node */
node = fdt_node_offset_by_compatible(blob, -1,
"amlogic,meson-gxl-usb-ctrl");
if (node < 0) {
node = fdt_node_offset_by_compatible(blob, -1,
"amlogic,meson-gxm-usb-ctrl");
if (node < 0) {
debug("Not found usb-control node\n");
return -ENODEV;
}
}
if (!fdtdec_get_is_enabled(blob, node)) {
debug("usb is disabled in the device tree\n");
return -ENODEV;
}
ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev);
if (ret) {
debug("Not found usb-control device\n");
return ret;
}
/* find the dwc2 node */
dwc2_node = fdt_node_offset_by_compatible(blob, node,
"amlogic,meson-g12a-usb");
if (dwc2_node < 0) {
debug("Not found dwc2 node\n");
return -ENODEV;
}
if (!fdtdec_get_is_enabled(blob, dwc2_node)) {
debug("dwc2 is disabled in the device tree\n");
return -ENODEV;
}
meson_gx_dwc2_data.regs_otg = fdtdec_get_addr(blob, dwc2_node, "reg");
if (meson_gx_dwc2_data.regs_otg == FDT_ADDR_T_NONE) {
debug("usbotg: can't get base address\n");
return -ENODATA;
}
/* Enable clock */
ret = fdtdec_parse_phandle_with_args(blob, dwc2_node, "clocks",
"#clock-cells", 0, 0, &args);
if (ret) {
debug("usbotg has no clocks defined in the device tree\n");
return ret;
}
ret = uclass_get_device_by_of_offset(UCLASS_CLK, args.node, &clk_dev);
if (ret)
return ret;
if (args.args_count != 1) {
debug("Can't find clock ID in the device tree\n");
return -ENODATA;
}
clk.dev = clk_dev;
clk.id = args.args[0];
ret = clk_enable(&clk);
if (ret) {
debug("Failed to enable usbotg clock\n");
return ret;
}
meson_gx_dwc2_data.rx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
"g-rx-fifo-size", 0);
meson_gx_dwc2_data.np_tx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
"g-np-tx-fifo-size", 0);
meson_gx_dwc2_data.tx_fifo_sz = fdtdec_get_int(blob, dwc2_node,
"g-tx-fifo-size", 0);
/* Switch to peripheral mode */
ret = dwc3_meson_gxl_force_mode(dev, USB_DR_MODE_PERIPHERAL);
if (ret)
return ret;
return dwc2_udc_probe(&meson_gx_dwc2_data);
}
int board_usb_cleanup(int index, enum usb_init_type init)
{
const void *blob = gd->fdt_blob;
struct udevice *dev;
int node;
int ret;
/* find the usb glue node */
node = fdt_node_offset_by_compatible(blob, -1,
"amlogic,meson-gxl-usb-ctrl");
if (node < 0) {
node = fdt_node_offset_by_compatible(blob, -1,
"amlogic,meson-gxm-usb-ctrl");
if (node < 0) {
debug("Not found usb-control node\n");
return -ENODEV;
}
}
if (!fdtdec_get_is_enabled(blob, node))
return -ENODEV;
ret = uclass_get_device_by_of_offset(UCLASS_SIMPLE_BUS, node, &dev);
if (ret)
return ret;
/* Switch to OTG mode */
ret = dwc3_meson_gxl_force_mode(dev, USB_DR_MODE_HOST);
if (ret)
return ret;
return 0;
}
#endif

1
configs/jethub_j100_defconfig
View File

@ -55,6 +55,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y CONFIG_MESON_SERIAL=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC2=y CONFIG_USB_DWC2=y

1
configs/jethub_j80_defconfig
View File

@ -59,6 +59,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y CONFIG_MESON_SERIAL=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC2=y CONFIG_USB_DWC2=y

1
configs/khadas-vim2_defconfig
View File

@ -59,6 +59,7 @@ CONFIG_MESON_SPIFC=y
CONFIG_SYSINFO=y CONFIG_SYSINFO=y
CONFIG_SYSINFO_SMBIOS=y CONFIG_SYSINFO_SMBIOS=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y

1
configs/khadas-vim_defconfig
View File

@ -50,6 +50,7 @@ CONFIG_MESON_SERIAL=y
CONFIG_SYSINFO=y CONFIG_SYSINFO=y
CONFIG_SYSINFO_SMBIOS=y CONFIG_SYSINFO_SMBIOS=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y

1
configs/libretech-ac_defconfig
View File

@ -65,6 +65,7 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y
CONFIG_MESON_SPIFC=y CONFIG_MESON_SPIFC=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y

1
configs/libretech-cc_defconfig
View File

@ -49,6 +49,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y CONFIG_MESON_SERIAL=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y

1
configs/libretech-s905d-pc_defconfig
View File

@ -61,6 +61,7 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y
CONFIG_MESON_SPIFC=y CONFIG_MESON_SPIFC=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y

1
configs/libretech-s912-pc_defconfig
View File

@ -60,6 +60,7 @@ CONFIG_SPI=y
CONFIG_DM_SPI=y CONFIG_DM_SPI=y
CONFIG_MESON_SPIFC=y CONFIG_MESON_SPIFC=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y

1
configs/s400_defconfig
View File

@ -42,6 +42,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y CONFIG_MESON_SERIAL=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y

1
configs/wetek-core2_defconfig
View File

@ -51,6 +51,7 @@ CONFIG_DEBUG_UART_ANNOUNCE=y
CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_DEBUG_UART_SKIP_INIT=y
CONFIG_MESON_SERIAL=y CONFIG_MESON_SERIAL=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_HCD=y
CONFIG_USB_XHCI_DWC3=y CONFIG_USB_XHCI_DWC3=y
CONFIG_USB_DWC3=y CONFIG_USB_DWC3=y