From e064db5fe77caaddb21a7793f266119ad89dd79a Mon Sep 17 00:00:00 2001 From: Patrice Chotard Date: Wed, 30 Jul 2025 14:14:01 +0200 Subject: [PATCH] reset: stm32: Fix set_clr field STM32F4/F7 and H7 series doesn't have a clear reset register, so set_clr field must be set to false. Fixes: 0994a627c278 ("reset: stm32mp25: add stm32mp25 reset driver") Signed-off-by: Patrice Chotard --- drivers/reset/stm32/stm32-reset.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/reset/stm32/stm32-reset.c b/drivers/reset/stm32/stm32-reset.c index 918e81e588f..024f15cb25e 100644 --- a/drivers/reset/stm32/stm32-reset.c +++ b/drivers/reset/stm32/stm32-reset.c @@ -19,7 +19,7 @@ static const struct stm32_reset_cfg *stm32_get_reset_line(struct reset_ctl *rese ptr_line->offset = bank; ptr_line->bit_idx = offset; - ptr_line->set_clr = true; + ptr_line->set_clr = false; return ptr_line; }