From d92fdb60677b3990919a4216d3452418db215224 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 1 Nov 2024 10:17:54 +0100 Subject: [PATCH 01/14] binman: Add option for pointing to separate description Adding binman node with target images description can be unwanted feature but as of today there is no way to disable it. Also on size constrained systems it is not useful to add binman description to DTB. Introduce BINMAN_DTB Kconfig symbol which allows separate DTB for target from DTB for binman itself. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/f1379d2587f9bf279a7a75c318aabbc1b35ee0c6.1730452668.git.michal.simek@amd.com --- Makefile | 11 ++++++++++- lib/Kconfig | 9 +++++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index 22953bdabd8..3434e9582fd 100644 --- a/Makefile +++ b/Makefile @@ -1392,12 +1392,21 @@ endif default_dt := $(if $(DEVICE_TREE),$(DEVICE_TREE),$(CONFIG_DEFAULT_DEVICE_TREE)) endif +binman_dtb := $(shell echo $(CONFIG_BINMAN_DTB)) +ifeq ($(strip $(binman_dtb)),) +ifeq ($(CONFIG_OF_EMBED),y) +binman_dtb = ./dts/dt.dtb +else +binman_dtb = ./u-boot.dtb +endif +endif + quiet_cmd_binman = BINMAN $@ cmd_binman = $(srctree)/tools/binman/binman $(if $(BINMAN_DEBUG),-D) \ $(foreach f,$(BINMAN_TOOLPATHS),--toolpath $(f)) \ --toolpath $(objtree)/tools \ $(if $(BINMAN_VERBOSE),-v$(BINMAN_VERBOSE)) \ - build -u -d u-boot.dtb -O . -m \ + build -u -d $(binman_dtb) -O . -m \ --allow-missing --fake-ext-blobs \ $(if $(BINMAN_ALLOW_MISSING),--ignore-missing) \ -I . -I $(srctree) -I $(srctree)/board/$(BOARDDIR) \ diff --git a/lib/Kconfig b/lib/Kconfig index 56ffdfa1839..0b089814d14 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -45,6 +45,15 @@ config BINMAN_FDT locate entries in the firmware image. See binman.h for the available functionality. +config BINMAN_DTB + string "binman DTB description" + depends on BINMAN + help + This enables option to point to different DTB file with binman node which + is outside of DTB used by the firmware. Use this option if information + about generated images shouldn't be the part of target binary. Or on system + with limited storage. + config CC_OPTIMIZE_LIBS_FOR_SPEED bool "Optimize libraries for speed" help From 417409e573044c185b58106f0154ebc0912e1cc7 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 1 Nov 2024 10:17:55 +0100 Subject: [PATCH 02/14] common: binman: Calling initr_binman() when BINMAN_FDT Calling empty function when BINMAN_FDT is adding +64B for nothing which is not helping on size sensitive configurations as Xilinx mini configurations. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/f79dc1fbf796dd5ad290f6080608ee68d7652cfc.1730452668.git.michal.simek@amd.com --- common/board_r.c | 7 +++---- 1 file changed, 3 insertions(+), 4 deletions(-) diff --git a/common/board_r.c b/common/board_r.c index 62228a723e1..ff9bce88dc9 100644 --- a/common/board_r.c +++ b/common/board_r.c @@ -287,13 +287,10 @@ static int initr_announce(void) return 0; } -static int initr_binman(void) +static int __maybe_unused initr_binman(void) { int ret; - if (!CONFIG_IS_ENABLED(BINMAN_FDT)) - return 0; - ret = binman_init(); if (ret) printf("binman_init failed:%d\n", ret); @@ -635,7 +632,9 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_EFI_LOADER efi_memory_init, #endif +#ifdef CONFIG_BINMAN_FDT initr_binman, +#endif #ifdef CONFIG_FSP_VERSION2 arch_fsp_init_r, #endif From afbc1fa5f18a2eebf1cf06f62574016edc093f50 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 1 Nov 2024 10:17:56 +0100 Subject: [PATCH 03/14] arm64: zynqmp: Describe empty binman node For enabling binman by default there is a need to have at least empty node present that's why create -u-boot.dtsi with empty node to cover all ZynqMP platforms. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/14d874ad4568fa8e3178e893224fecc5c676f04c.1730452668.git.michal.simek@amd.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-binman-mini.dts | 10 ++++++++++ arch/arm/dts/zynqmp-u-boot.dtsi | 11 +++++++++++ configs/xilinx_zynqmp_mini_defconfig | 2 ++ configs/xilinx_zynqmp_mini_emmc0_defconfig | 3 +++ configs/xilinx_zynqmp_mini_emmc1_defconfig | 3 +++ configs/xilinx_zynqmp_mini_nand_defconfig | 2 ++ configs/xilinx_zynqmp_mini_nand_single_defconfig | 2 ++ configs/xilinx_zynqmp_mini_qspi_defconfig | 3 +++ 9 files changed, 37 insertions(+) create mode 100644 arch/arm/dts/zynqmp-binman-mini.dts create mode 100644 arch/arm/dts/zynqmp-u-boot.dtsi diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index d81a9f95977..ce4ea32e708 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -274,6 +274,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += \ zynqmp-mini-qspi-x1-stacked.dtb \ zynqmp-mini-qspi-x2-single.dtb \ zynqmp-mini-qspi-x2-stacked.dtb \ + zynqmp-binman-mini.dtb \ zynqmp-sc-revB.dtb \ zynqmp-sc-revC.dtb \ zynqmp-sm-k24-revA.dtb \ diff --git a/arch/arm/dts/zynqmp-binman-mini.dts b/arch/arm/dts/zynqmp-binman-mini.dts new file mode 100644 index 00000000000..8f3d18ef394 --- /dev/null +++ b/arch/arm/dts/zynqmp-binman-mini.dts @@ -0,0 +1,10 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/dts-v1/; + +#include "zynqmp-u-boot.dtsi" diff --git a/arch/arm/dts/zynqmp-u-boot.dtsi b/arch/arm/dts/zynqmp-u-boot.dtsi new file mode 100644 index 00000000000..9a7527ed5a1 --- /dev/null +++ b/arch/arm/dts/zynqmp-u-boot.dtsi @@ -0,0 +1,11 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * (C) Copyright 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +/ { + binman: binman { + }; +}; diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index b58cf8af74b..396c876c7e6 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -60,6 +60,8 @@ CONFIG_NO_NET=y # CONFIG_DM_MAILBOX is not set # CONFIG_MMC is not set CONFIG_ARM_DCC=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-mini.dtb" CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index f47880b6db4..c19f79f4d1d 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_BINMAN_SYMBOLS is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y @@ -74,6 +75,8 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_ARM_DCC=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-mini.dtb" CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index fc0070adbe1..459e0294715 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -29,6 +29,7 @@ CONFIG_BOARD_EARLY_INIT_R=y # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_BINMAN_SYMBOLS is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y @@ -74,6 +75,8 @@ CONFIG_SUPPORT_EMMC_BOOT=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_ZYNQ=y CONFIG_ARM_DCC=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-mini.dtb" CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 6a7541fe9d5..0a5cfd8dccb 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -60,6 +60,8 @@ CONFIG_NAND_ARASAN=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_SYS_NAND_MAX_CHIPS=2 CONFIG_ARM_DCC=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-mini.dtb" CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 3643caea3ce..4c399fd76b9 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -59,6 +59,8 @@ CONFIG_MTD_RAW_NAND=y CONFIG_NAND_ARASAN=y CONFIG_SYS_NAND_ONFI_DETECTION=y CONFIG_ARM_DCC=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-mini.dtb" CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index a60403d82c2..9d785413a8e 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -32,6 +32,7 @@ CONFIG_LOGLEVEL=0 # CONFIG_BOARD_LATE_INIT is not set CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_BINMAN_SYMBOLS is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y @@ -92,6 +93,8 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_ARM_DCC=y CONFIG_SPI=y CONFIG_ZYNQMP_GQSPI=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-mini.dtb" CONFIG_PANIC_HANG=y # CONFIG_GZIP is not set # CONFIG_LMB is not set From 2eb8cd5bd4936a5eb2e77729855d946f6720921c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 1 Nov 2024 10:17:57 +0100 Subject: [PATCH 04/14] arm64: zynqmp: Add binman description for SOM There is necessary to do some steps to compose boot images. These steps were in scripts in layers for a while. That's why introduce description via binman to simplify wiring and remove all scripting around. This should make sure that everybody is up2date with the latest versions. The first step is to create fit image with DTBs with descriptions in configuration node which is written as regular expression to match all SOM versions. Description is there for k24 and k26 in spite of low level psu_init configuration is different. The reason is that it goes to u-boot.itb image which is the same for k24 and k26. u-boot.itb is another image which is generated. It is normally generated via arch/arm/mach-zynqmp/mkimage_fit_atf.sh but this script is supposed to be deprecated. FIT image by purpose is using 64bit addresses to have default option to move images to high DDR (above 4GB). TF-A and TEE are optional components but in the most cases TF-A is present all the time and TEE(OP-TEE) is used by some configurations too. 3rd generated image is boot.bin with updated user field which contains version number. This image can be used with updated Image Selector which supports A/B update mechanisms with rollback protection. 4th image is image.bin which binary file which contains boot.bin and u-boot.itb together and can be programmed via origin Image Selector. This image can be also used for creating one capsule which contains both boot images (in SPL boot flow). Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/35bc47a4a4799c5f5dbea56a45340a2810538330.1730452668.git.michal.simek@amd.com --- arch/arm/Kconfig | 1 + arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-binman-som.dts | 225 +++++++++++++++++++++++++++ arch/arm/mach-zynqmp/Kconfig | 14 ++ configs/xilinx_zynqmp_kria_defconfig | 3 + 5 files changed, 244 insertions(+) create mode 100644 arch/arm/dts/zynqmp-binman-som.dts diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 7282c4123b0..b068468f2e7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1324,6 +1324,7 @@ config ARCH_ZYNQMP_R5 config ARCH_ZYNQMP bool "Xilinx ZynqMP based platform" select ARM64 + select BINMAN select CLK select DM select DEBUG_UART_BOARD_INIT if SPL && DEBUG_UART diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index ce4ea32e708..95b552b303b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -370,6 +370,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kv-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kv-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-sm-k24-revA-sck-kr-g-revB.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-smk-k24-revA-sck-kr-g-revB.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-binman-som.dtb dtb-$(CONFIG_ARCH_VERSAL) += \ versal-mini.dtb \ diff --git a/arch/arm/dts/zynqmp-binman-som.dts b/arch/arm/dts/zynqmp-binman-som.dts new file mode 100644 index 00000000000..3d9d8476c98 --- /dev/null +++ b/arch/arm/dts/zynqmp-binman-som.dts @@ -0,0 +1,225 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP SOMs (k24/k26) + * + * (C) Copyright 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/ { + binman: binman { + multiple-images; + fit-dtb.blob { + filename = "fit-dtb.blob"; + pad-byte = <0>; + fit { + fit,align = <0x8>; + fit,external-offset = <0x0>; + description = "DTBs for SOMs+CCs"; + fit,fdt-list-val = "zynqmp-smk-k26-revA", "zynqmp-smk-k26-revA-sck-kr-g-revA", + "zynqmp-smk-k26-revA-sck-kr-g-revB", "zynqmp-smk-k26-revA-sck-kv-g-revA", + "zynqmp-smk-k26-revA-sck-kv-g-revB", "zynqmp-sm-k26-revA-sck-kv-g-revA", + "zynqmp-sm-k26-revA-sck-kv-g-revB", "zynqmp-sm-k26-revA-sck-kr-g-revB", + "zynqmp-smk-k24-revA-sck-kd-g-revA", "zynqmp-smk-k24-revA-sck-kv-g-revB", + "zynqmp-smk-k24-revA-sck-kr-g-revB", "zynqmp-sm-k24-revA-sck-kd-g-revA", + "zynqmp-sm-k24-revA-sck-kv-g-revB", "zynqmp-sm-k24-revA-sck-kr-g-revB"; + + images { + @fdt-SEQ { + description = "NAME"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + hash-1 { + algo = "md5"; + }; + }; + }; + configurations { + default = "conf-1"; + conf-1 { + description = "SOM itself"; + fdt = "fdt-1"; + }; + conf-2 { + description = "zynqmp-smk-k26-.*-sck-kr-g-revA"; + fdt = "fdt-2"; + }; + conf-3 { + description = "zynqmp-smk-k26-.*-sck-kr-g-.*"; + fdt = "fdt-3"; + }; + conf-4 { + description = "zynqmp-smk-k26-.*-sck-kv-g-rev[AZ]"; + fdt = "fdt-4"; + }; + conf-5 { + description = "zynqmp-smk-k26-.*-sck-kv-g-.*"; + fdt = "fdt-5"; + }; + conf-6 { + description = "zynqmp-sm-k26-.*-sck-kv-g-rev[AZ]"; + fdt = "fdt-6"; + }; + conf-7 { + description = "zynqmp-sm-k26-.*-sck-kv-g-.*"; + fdt = "fdt-7"; + }; + conf-8 { + description = "zynqmp-sm-k26-.*-sck-kr-g-.*"; + fdt = "fdt-8"; + }; + conf-9 { + description = "zynqmp-smk-k24-.*-sck-kd-g-.*"; + fdt = "fdt-9"; + }; + conf-10 { + description = "zynqmp-smk-k24-.*-sck-kv-g-.*"; + fdt = "fdt-10"; + }; + conf-11 { + description = "zynqmp-smk-k24-.*-sck-kr-g-.*"; + fdt = "fdt-11"; + }; + conf-12 { + description = "zynqmp-sm-k24-.*-sck-kd-g-.*"; + fdt = "fdt-12"; + }; + conf-13 { + description = "zynqmp-sm-k24-.*-sck-kv-g-.*"; + fdt = "fdt-13"; + }; + conf-14 { + description = "zynqmp-sm-k24-.*-sck-kr-g-.*"; + fdt = "fdt-14"; + }; + }; + }; + }; + + /* u-boot.itb generation in a static way */ + itb { + filename = "u-boot.itb"; + pad-byte = <0>; + + fit { + description = "Configuration for Xilinx ZynqMP SoC"; + fit,align = <0x8>; + fit,external-offset = <0x0>; + images { + uboot { + description = "U-Boot (64-bit)"; + type = "firmware"; + os = "u-boot"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + hash { + algo = "md5"; + }; + u-boot-nodtb { + }; + }; + atf { + description = "Trusted Firmware-A"; + type = "firmware"; + os = "arm-trusted-firmware"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + hash { + algo = "md5"; + }; + atf-bl31 { + optional; + }; + }; + tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + tee-os { + optional; + }; + }; + fdt { + description = "Multi DTB fit image"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x0 0x100000>; + hash { + algo = "md5"; + }; + fdt-blob { + filename = "fit-dtb.blob"; + type = "blob-ext"; + }; + }; + }; + configurations { + default = "conf-1"; + conf-1 { + description = "Multi DTB with TF-A/TEE"; + firmware = "atf"; + loadables = "tee", "uboot", "fdt"; + }; + }; + }; + }; + + /* boot.bin generated with version string inside */ + bootimage { + filename = "boot.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "spl/boot.bin"; + }; + /* Optional version string at offset 0x70 */ + blob-ext@2 { + offset = <0x70>; + filename = "version.bin"; + overlap; + optional; + }; + /* Optional version string at offset 0x94 */ + blob-ext@3 { + offset = <0x94>; + filename = "version.bin"; + overlap; + optional; + }; + }; + +#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS + /* Full QSPI image for recovery app */ + image { + filename = "qspi.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "boot.bin"; + }; + blob-ext@2 { + offset = ; + filename = "u-boot.itb"; + }; + fdtmap { + }; + }; +#endif + }; +}; diff --git a/arch/arm/mach-zynqmp/Kconfig b/arch/arm/mach-zynqmp/Kconfig index aea13622b68..92d61e84319 100644 --- a/arch/arm/mach-zynqmp/Kconfig +++ b/arch/arm/mach-zynqmp/Kconfig @@ -132,6 +132,20 @@ config SPL_ZYNQMP_RESTORE_JTAG even if no eFuses were burnt. This option restores the interface if possible. +config BL31_LOAD_ADDR + hex "Load address of BL31 image (mostly TF-A)" + default 0xfffea000 + help + The load address for the BL31 image. This value is used to build the + FIT image header that places BL31 in memory where it will run. + +config BL32_LOAD_ADDR + hex "Load address of BL32 image (mostly secure OS)" + default 0 + help + The load address for the BL32 image. This value is used to build the + FIT image header that places BL32 in memory where it will run. + config ZYNQ_SDHCI_MAX_FREQ default 200000000 diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index e5ffc7076fb..c9f596a4201 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -47,6 +47,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_BINMAN_SYMBOLS is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_FS_LOAD_KERNEL_NAME="" CONFIG_SPL_FS_LOAD_ARGS_NAME="" @@ -223,6 +224,8 @@ CONFIG_VIDEO_ZYNQMP_DPSUB=y CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman-som.dtb" CONFIG_PANIC_HANG=y CONFIG_TPM=y CONFIG_SPL_GZIP=y From a4c98119109a60b9b236996f47065aa8fc0de9ca Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 1 Nov 2024 10:17:58 +0100 Subject: [PATCH 05/14] arm64: zynqmp: Generate u-boot.itb and QSPI image via binman u-boot.itb has been generated via mkimage_fit_atf.sh but it is on the way out that's why convert it's description to binman. Compare to script binman description is not able to configure BL31 and BL32 load/entry addresses which should be done separately. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/90b613796aee38158252c8bb1dfc3da0420f089d.1730452668.git.michal.simek@amd.com --- arch/arm/dts/Makefile | 1 + arch/arm/dts/zynqmp-binman.dts | 111 +++++++++++++++++++++++++++ configs/xilinx_zynqmp_virt_defconfig | 3 + 3 files changed, 115 insertions(+) create mode 100644 arch/arm/dts/zynqmp-binman.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 95b552b303b..cfa358613c4 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -320,6 +320,7 @@ dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-02-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-03-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-04-revA.dtb dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-p-a2197-00-revA-x-prc-05-revA.dtb +dtb-$(CONFIG_ARCH_ZYNQMP) += zynqmp-binman.dtb zynqmp-sc-vek280-revA-dtbs := zynqmp-sc-revB.dtb zynqmp-sc-vek280-revA.dtbo zynqmp-sc-vek280-revB-dtbs := zynqmp-sc-revC.dtb zynqmp-sc-vek280-revB.dtbo diff --git a/arch/arm/dts/zynqmp-binman.dts b/arch/arm/dts/zynqmp-binman.dts new file mode 100644 index 00000000000..df0fdf46510 --- /dev/null +++ b/arch/arm/dts/zynqmp-binman.dts @@ -0,0 +1,111 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * dts file for Xilinx ZynqMP platforms + * + * (C) Copyright 2024, Advanced Micro Devices, Inc. + * + * Michal Simek + */ + +#include + +/dts-v1/; +/ { + binman: binman { + multiple-images; + + /* u-boot.itb generation in a static way */ + itb { + filename = "u-boot.itb"; + pad-byte = <0>; + + fit { + description = "Configuration for Xilinx ZynqMP SoC"; + fit,align = <0x8>; + fit,external-offset = <0x0>; + fit,fdt-list = "of-list"; + images { + uboot { + description = "U-Boot (64-bit)"; + type = "firmware"; + os = "u-boot"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + hash { + algo = "md5"; + }; + u-boot-nodtb { + }; + }; + atf { + description = "Trusted Firmware-A"; + type = "firmware"; + os = "arm-trusted-firmware"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + hash { + algo = "md5"; + }; + atf-bl31 { + optional; + }; + }; + tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + tee-os { + optional; + }; + }; + @fdt-SEQ { + description = "NAME"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x0 0x100000>; + hash-1 { + algo = "md5"; + }; + }; + }; + configurations { + default = "@conf-DEFAULT-SEQ"; + @conf-SEQ { + description = "NAME"; + firmware = "atf"; + loadables = "tee", "uboot"; + fdt = "fdt-SEQ"; + }; + }; + }; + }; + +#ifdef CONFIG_SYS_SPI_U_BOOT_OFFS + /* QSPI image for testing QSPI boot mode */ + image { + filename = "qspi.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "spl/boot.bin"; + }; + blob-ext@2 { + offset = ; + filename = "u-boot.itb"; + }; + fdtmap { + }; + }; +#endif + }; +}; diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index 310efdf2338..09f487acf0d 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -41,6 +41,7 @@ CONFIG_SYS_PBSIZE=2073 CONFIG_BOARD_EARLY_INIT_R=y CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 +# CONFIG_SPL_BINMAN_SYMBOLS is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set CONFIG_SPL_SYS_MALLOC=y CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y @@ -241,6 +242,8 @@ CONFIG_BMP_32BPP=y CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y +# CONFIG_BINMAN_FDT is not set +CONFIG_BINMAN_DTB="./arch/arm/dts/zynqmp-binman.dtb" CONFIG_PANIC_HANG=y CONFIG_TPM=y CONFIG_SPL_GZIP=y From 9121d572e2d061922e747c3e9636ad744316059c Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Fri, 1 Nov 2024 10:17:59 +0100 Subject: [PATCH 06/14] arm64: zynqmp: Remove mkimage fit script Platform has been switched to binman that's why there is no need for this script and also Kconfig symbols. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/cf438091e43c4c9d535a9cfa2886673aa42a4370.1730452668.git.michal.simek@amd.com --- arch/arm/mach-zynqmp/mkimage_fit_atf.sh | 240 ------------------------ boot/Kconfig | 1 - 2 files changed, 241 deletions(-) delete mode 100755 arch/arm/mach-zynqmp/mkimage_fit_atf.sh diff --git a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh b/arch/arm/mach-zynqmp/mkimage_fit_atf.sh deleted file mode 100755 index cdecb1c1d35..00000000000 --- a/arch/arm/mach-zynqmp/mkimage_fit_atf.sh +++ /dev/null @@ -1,240 +0,0 @@ -#!/bin/sh -# SPDX-License-Identifier: GPL-2.0+ -# -# script to generate FIT image source for Xilinx ZynqMP boards with -# ARM Trusted Firmware and multiple device trees (given on the command line) -# -# usage: $0 [ [> 32))` - -[ -z "$BL32" ] && BL32="tee.bin" -BL32_ELF="${BL32%.*}.elf" -[ -f ${BL32_ELF} ] && TEE_LOAD_ADDR=`${CROSS_COMPILE}readelf -l "${BL32_ELF}" | \ -awk '/Entry point/ { print $3 }'` - -[ -z "$TEE_LOAD_ADDR" ] && TEE_LOAD_ADDR="0x60000000" -TEE_LOAD_ADDR_LOW=`printf 0x%x $((TEE_LOAD_ADDR & 0xffffffff))` -TEE_LOAD_ADDR_HIGH=`printf 0x%x $((TEE_LOAD_ADDR >> 32))` - -if [ -z "$BL33_LOAD_ADDR" ];then - BL33_LOAD_ADDR=`awk '/CONFIG_TEXT_BASE/ { print $3 }' include/generated/autoconf.h` -fi -BL33_LOAD_ADDR_LOW=`printf 0x%x $((BL33_LOAD_ADDR & 0xffffffff))` -BL33_LOAD_ADDR_HIGH=`printf 0x%x $((BL33_LOAD_ADDR >> 32))` - -DTB_LOAD_ADDR=`awk '/CONFIG_XILINX_OF_BOARD_DTB_ADDR/ { print $3 }' include/generated/autoconf.h` -if [ ! -z "$DTB_LOAD_ADDR" ]; then - DTB_LOAD_ADDR_LOW=`printf 0x%x $((DTB_LOAD_ADDR & 0xffffffff))` - DTB_LOAD_ADDR_HIGH=`printf 0x%x $((DTB_LOAD_ADDR >> 32))` - DTB_LOAD="load = <$DTB_LOAD_ADDR_HIGH $DTB_LOAD_ADDR_LOW>;" -else - DTB_LOAD="" -fi - -if [ -z "$*" ]; then - DT=arch/arm/dts/${DEVICE_TREE}.dtb -else - DT=$* -fi - -if [ ! -f $BL31 ]; then - echo "WARNING: BL31 file $BL31 NOT found, U-Boot will run in EL3" >&2 - BL31=/dev/null -fi - -cat << __HEADER_EOF -// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) - -/dts-v1/; - -/ { - description = "Configuration for Xilinx ZynqMP SoC"; - - images { - uboot { - description = "U-Boot (64-bit)"; - data = /incbin/("$BL33"); - type = "firmware"; - os = "u-boot"; - arch = "arm64"; - compression = "none"; - load = <$BL33_LOAD_ADDR_HIGH $BL33_LOAD_ADDR_LOW>; - entry = <$BL33_LOAD_ADDR_HIGH $BL33_LOAD_ADDR_LOW>; - hash { - algo = "md5"; - }; - }; -__HEADER_EOF - -if [ -f $BL31 ]; then -cat << __ATF - atf { - description = "Trusted Firmware-A"; - data = /incbin/("$BL31"); - type = "firmware"; - os = "arm-trusted-firmware"; - arch = "arm64"; - compression = "none"; - load = <$ATF_LOAD_ADDR_HIGH $ATF_LOAD_ADDR_LOW>; - entry = <$ATF_LOAD_ADDR_HIGH $ATF_LOAD_ADDR_LOW>; - hash { - algo = "md5"; - }; - }; -__ATF -fi - -if [ -f $BL32 ]; then -cat << __TEE - tee { - description = "TEE firmware"; - data = /incbin/("$BL32"); - type = "firmware"; - os = "tee"; - arch = "arm64"; - compression = "none"; - load = <$TEE_LOAD_ADDR_HIGH $TEE_LOAD_ADDR_LOW>; - entry = <$TEE_LOAD_ADDR_HIGH $TEE_LOAD_ADDR_LOW>; - hash { - algo = "md5"; - }; - }; -__TEE -fi - -MULTI_DTB=`awk '/CONFIG_MULTI_DTB_FIT / { print $3 }' include/generated/autoconf.h` - -if [ 1"$MULTI_DTB" -eq 11 ]; then - cat << __FDT_IMAGE_EOF - fdt_1 { - description = "Multi DTB fit image"; - data = /incbin/("fit-dtb.blob"); - type = "flat_dt"; - arch = "arm64"; - compression = "none"; - $DTB_LOAD - hash { - algo = "md5"; - }; - }; - }; - configurations { - default = "config_1"; -__FDT_IMAGE_EOF - -if [ ! -f $BL31 ]; then -cat << __CONF_SECTION1_EOF - config_1 { - description = "Multi DTB without TF-A"; - firmware = "uboot"; - loadables = "fdt_1"; - }; -__CONF_SECTION1_EOF -else -if [ -f $BL32 ]; then -cat << __CONF_SECTION1_EOF - config_1 { - description = "Multi DTB with TF-A and TEE"; - firmware = "atf"; - loadables = "uboot", "tee", "fdt_1"; - }; -__CONF_SECTION1_EOF -else -cat << __CONF_SECTION1_EOF - config_1 { - description = "Multi DTB with TF-A"; - firmware = "atf"; - loadables = "uboot", "fdt_1"; - }; -__CONF_SECTION1_EOF -fi -fi - -cat << __ITS_EOF - }; -}; -__ITS_EOF - -else - -DEFAULT=1 -cnt=1 -for dtname in $DT -do - cat << __FDT_IMAGE_EOF - fdt_$cnt { - description = "$(basename $dtname .dtb)"; - data = /incbin/("$dtname"); - type = "flat_dt"; - arch = "arm64"; - compression = "none"; - $DTB_LOAD - hash { - algo = "md5"; - }; - }; -__FDT_IMAGE_EOF - -[ "x$(basename $dtname .dtb)" = "x${DEVICE_TREE}" ] && DEFAULT=$cnt - -cnt=$((cnt+1)) -done - -cat << __CONF_HEADER_EOF - }; - configurations { - default = "config_$DEFAULT"; - -__CONF_HEADER_EOF - -cnt=1 -for dtname in $DT -do -if [ ! -f $BL31 ]; then -cat << __CONF_SECTION1_EOF - config_$cnt { - description = "$(basename $dtname .dtb)"; - firmware = "uboot"; - fdt = "fdt_$cnt"; - }; -__CONF_SECTION1_EOF -else -if [ -f $BL32 ]; then -cat << __CONF_SECTION1_EOF - config_$cnt { - description = "$(basename $dtname .dtb)"; - firmware = "atf"; - loadables = "uboot", "tee"; - fdt = "fdt_$cnt"; - }; -__CONF_SECTION1_EOF -else -cat << __CONF_SECTION1_EOF - config_$cnt { - description = "$(basename $dtname .dtb)"; - firmware = "atf"; - loadables = "uboot"; - fdt = "fdt_$cnt"; - }; -__CONF_SECTION1_EOF -fi -fi - -cnt=$((cnt+1)) -done - -cat << __ITS_EOF - }; -}; -__ITS_EOF - -fi diff --git a/boot/Kconfig b/boot/Kconfig index 661e89ca05b..2d699e1c06f 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -291,7 +291,6 @@ config USE_SPL_FIT_GENERATOR config SPL_FIT_GENERATOR string ".its file generator script for U-Boot FIT image" depends on USE_SPL_FIT_GENERATOR - default "arch/arm/mach-zynqmp/mkimage_fit_atf.sh" if SPL_LOAD_FIT && ARCH_ZYNQMP help Specifies a (platform specific) script file to generate the FIT source file used to build the U-Boot FIT image file. This gets From 80d251c326b754b525fe39f29e17560df2102b21 Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Fri, 1 Nov 2024 10:18:00 +0100 Subject: [PATCH 07/14] Makefile: Drop SPL_FIT_GENERATOR support The SPL_FIT_GENERATOR is long superseded by binman, drop SPL_FIT_GENERATOR support as there are no more users. Signed-off-by: Marek Vasut Reviewed-by: Peter Robinson Reviewed-by: Simon Glass Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/22109373594b6a5d1110be9420ccd8fbb93a61d3.1730452668.git.michal.simek@amd.com --- Makefile | 18 ------------------ boot/Kconfig | 14 -------------- doc/usage/fit/howto.rst | 4 ---- 3 files changed, 36 deletions(-) diff --git a/Makefile b/Makefile index 3434e9582fd..06e0915af83 100644 --- a/Makefile +++ b/Makefile @@ -1148,13 +1148,6 @@ ifeq ($(CONFIG_OF_EMBED)$(CONFIG_EFI_APP),y) @echo >&2 "CONFIG_OF_SEPARATE for boards in mainline." @echo >&2 "See doc/develop/devicetree/control.rst for more info." @echo >&2 "====================================================" -endif -ifneq ($(CONFIG_SPL_FIT_GENERATOR),) - @echo >&2 "===================== WARNING ======================" - @echo >&2 "This board uses CONFIG_SPL_FIT_GENERATOR. Please migrate" - @echo >&2 "to binman instead, to avoid the proliferation of" - @echo >&2 "arch-specific scripts with no tests." - @echo >&2 "====================================================" endif $(call deprecated,CONFIG_WDT,DM watchdog,v2019.10,\ $(CONFIG_WATCHDOG)$(CONFIG_HW_WATCHDOG)) @@ -1436,17 +1429,6 @@ OBJCOPYFLAGS_u-boot.ldr.srec := -I binary -O srec u-boot.ldr.hex u-boot.ldr.srec: u-boot.ldr FORCE $(call if_changed,objcopy) -# Boards with more complex image requirements can provide an .its source file -# or a generator script -# NOTE: Please do not use this. We are migrating away from Makefile rules to use -# binman instead. -ifneq ($(CONFIG_USE_SPL_FIT_GENERATOR),) -U_BOOT_ITS := u-boot.its -$(U_BOOT_ITS): $(U_BOOT_ITS_DEPS) FORCE - $(srctree)/$(CONFIG_SPL_FIT_GENERATOR) \ - $(patsubst %,$(dt_dir)/%.dtb,$(subst ",,$(CONFIG_OF_LIST))) > $@ -endif - ifdef CONFIG_SPL_LOAD_FIT MKIMAGEFLAGS_u-boot.img = -f auto -A $(ARCH) -T firmware -C none -O u-boot \ -a $(CONFIG_TEXT_BASE) -e $(CONFIG_SYS_UBOOT_START) \ diff --git a/boot/Kconfig b/boot/Kconfig index 2d699e1c06f..99dcedcc840 100644 --- a/boot/Kconfig +++ b/boot/Kconfig @@ -283,20 +283,6 @@ config SPL_FIT_IMAGE_POST_PROCESS injected into the FIT creation (i.e. the blobs would have been pre- processed before being added to the FIT image). -config USE_SPL_FIT_GENERATOR - bool "Use a script to generate the .its script" - depends on SPL_FIT - default y if SPL_FIT && ARCH_ZYNQMP - -config SPL_FIT_GENERATOR - string ".its file generator script for U-Boot FIT image" - depends on USE_SPL_FIT_GENERATOR - help - Specifies a (platform specific) script file to generate the FIT - source file used to build the U-Boot FIT image file. This gets - passed a list of supported device tree file stub names to - include in the generated image. - if VPL config VPL_FIT diff --git a/doc/usage/fit/howto.rst b/doc/usage/fit/howto.rst index 280eff724f6..675c9aa5bb0 100644 --- a/doc/usage/fit/howto.rst +++ b/doc/usage/fit/howto.rst @@ -57,10 +57,6 @@ own subnode under the /images node, which should then be referenced from one or multiple /configurations subnodes. The required images must be enumerated in the "loadables" property as a list of strings. -CONFIG_SPL_FIT_GENERATOR can point to a script which generates this image source -file during the build process. It gets passed a list of device tree files (taken -from the CONFIG_OF_LIST symbol). - The SPL also records to a DT all additional images (called loadables) which are loaded. The information about loadables locations is passed via the DT node with fit-images name. From 3471dedb50f282c631e94bb048f240a1dc5225bd Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Wed, 20 Nov 2024 09:05:27 +0100 Subject: [PATCH 08/14] arm64: zynqmp: Also generate images with single DT Create u-boot-single.itb where only actual DTB is used not really multiple of DTS from OF_LIST. This results in small files without option to change DT. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/9362da506c13382da0c0d41ad8a111d9c1150f08.1732089924.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-binman.dts | 95 ++++++++++++++++++++++++++++++++++ 1 file changed, 95 insertions(+) diff --git a/arch/arm/dts/zynqmp-binman.dts b/arch/arm/dts/zynqmp-binman.dts index df0fdf46510..675f6bf51eb 100644 --- a/arch/arm/dts/zynqmp-binman.dts +++ b/arch/arm/dts/zynqmp-binman.dts @@ -89,6 +89,85 @@ }; }; + itb-single { + filename = "u-boot-single.itb"; + pad-byte = <0>; + + fit { + description = "Configuration for Xilinx ZynqMP SoC"; + fit,align = <0x8>; + fit,external-offset = <0x0>; + fit,fdt-list = "of-list"; + images { + uboot { + description = "U-Boot (64-bit)"; + type = "firmware"; + os = "u-boot"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + hash { + algo = "md5"; + }; + u-boot-nodtb { + }; + }; + atf { + description = "Trusted Firmware-A"; + type = "firmware"; + os = "arm-trusted-firmware"; + arch = "arm64"; + compression = "none"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + hash { + algo = "md5"; + }; + atf-bl31 { + optional; + }; + }; + tee { + description = "OP-TEE"; + type = "tee"; + arch = "arm64"; + compression = "none"; + os = "tee"; + load = /bits/ 64 ; + entry = /bits/ 64 ; + tee-os { + optional; + }; + }; + fdt { + description = "DT"; + type = "flat_dt"; + arch = "arm64"; + compression = "none"; + load = <0x0 0x100000>; + uboot-fdt-blob { + filename = "u-boot.dtb"; + type = "blob-ext"; + }; + hash-1 { + algo = "md5"; + }; + + }; + }; + configurations { + default = "conf-1"; + conf-1 { + description = "Single DT"; + firmware = "atf"; + loadables = "tee", "uboot"; + fdt = "fdt"; + }; + }; + }; + }; + #ifdef CONFIG_SYS_SPI_U_BOOT_OFFS /* QSPI image for testing QSPI boot mode */ image { @@ -106,6 +185,22 @@ fdtmap { }; }; + + image-single { + filename = "qspi-single.bin"; + pad-byte = <0>; + + blob-ext@1 { + offset = <0x0>; + filename = "spl/boot.bin"; + }; + blob-ext@2 { + offset = ; + filename = "u-boot-single.itb"; + }; + fdtmap { + }; + }; #endif }; }; From 6f894fc77fc72a3d215974091397439306eeb6bc Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Tue, 26 Nov 2024 09:42:38 +0530 Subject: [PATCH 09/14] configs: zynqmp_kria: Enable the USB onboard hub USB host support on ZYNQMP KRIA SOM needs onboard USB hub driver for handling reset GPIO and for i2c initialization sequence. Signed-off-by: Venkatesh Yadav Abbarapu Acked-by: Michal Simek Link: https://lore.kernel.org/r/20241126041238.1969723-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/xilinx_zynqmp_kria_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/xilinx_zynqmp_kria_defconfig b/configs/xilinx_zynqmp_kria_defconfig index c9f596a4201..8fb66f7cb08 100644 --- a/configs/xilinx_zynqmp_kria_defconfig +++ b/configs/xilinx_zynqmp_kria_defconfig @@ -208,6 +208,7 @@ CONFIG_USB_DWC3=y CONFIG_USB_DWC3_GENERIC=y CONFIG_USB_ULPI_VIEWPORT=y CONFIG_USB_ULPI=y +CONFIG_USB_ONBOARD_HUB=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y From 06ecbaae33111f792af96f94de5f8c43ccc47ebf Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Wed, 27 Nov 2024 10:07:45 +0530 Subject: [PATCH 10/14] configs: versal2: Enable OPTEE support Add OPTEE support for versal2 platform. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20241127043745.249580-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- configs/amd_versal2_virt_defconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/configs/amd_versal2_virt_defconfig b/configs/amd_versal2_virt_defconfig index 08e607700c2..b4aebf3e9fb 100644 --- a/configs/amd_versal2_virt_defconfig +++ b/configs/amd_versal2_virt_defconfig @@ -130,6 +130,8 @@ CONFIG_CADENCE_QSPI=y CONFIG_CADENCE_OSPI_VERSAL=y CONFIG_ZYNQ_SPI=y CONFIG_ZYNQMP_GQSPI=y +CONFIG_TEE=y +CONFIG_OPTEE=y CONFIG_TPM2_TIS_SPI=y CONFIG_USB=y CONFIG_DM_USB_GADGET=y @@ -151,3 +153,4 @@ CONFIG_VIRTIO_MMIO=y CONFIG_VIRTIO_NET=y CONFIG_VIRTIO_BLK=y CONFIG_TPM=y +# CONFIG_OPTEE_LIB is not set From 6d234a79e9eb81cce0eed75227087c229f3c4e33 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Fri, 8 Nov 2024 12:05:37 +0530 Subject: [PATCH 11/14] cadence_qspi: Refactor the flash reset functionality As the flash reset is handled in spi nor core, removing the flash reset functionality. As the configuration like tristate and hysterisis need to be enabled by the cdo. Handle the flash reset only for mini u-boot case. Rename the "cadence_qspi_versal_flash_reset" to generic name "cadence_qspi_flash_reset" as this can be used by other platforms as well. Signed-off-by: Venkatesh Yadav Abbarapu Link: https://lore.kernel.org/r/20241108063537.13180-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- drivers/spi/cadence_ospi_versal.c | 45 ++----------------------------- drivers/spi/cadence_qspi.c | 6 +++-- 2 files changed, 6 insertions(+), 45 deletions(-) diff --git a/drivers/spi/cadence_ospi_versal.c b/drivers/spi/cadence_ospi_versal.c index 222f828f54e..dcf28c75596 100644 --- a/drivers/spi/cadence_ospi_versal.c +++ b/drivers/spi/cadence_ospi_versal.c @@ -125,49 +125,8 @@ int cadence_qspi_apb_wait_for_dma_cmplt(struct cadence_spi_priv *priv) return 0; } -#if defined(CONFIG_DM_GPIO) -int cadence_qspi_versal_flash_reset(struct udevice *dev) -{ - struct gpio_desc gpio; - u32 reset_gpio; - int ret; - - /* request gpio and set direction as output set to 1 */ - ret = gpio_request_by_name(dev, "reset-gpios", 0, &gpio, - GPIOD_IS_OUT | GPIOD_IS_OUT_ACTIVE); - if (ret) { - printf("%s: unable to reset ospi flash device", __func__); - return ret; - } - - reset_gpio = PMIO_NODE_ID_BASE + gpio.offset; - - /* Request for pin */ - xilinx_pm_request(PM_PINCTRL_REQUEST, reset_gpio, 0, 0, 0, NULL); - - /* Enable hysteresis in cmos receiver */ - xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, reset_gpio, - PM_PINCTRL_CONFIG_SCHMITT_CMOS, - PM_PINCTRL_INPUT_TYPE_SCHMITT, 0, NULL); - - /* Disable Tri-state */ - xilinx_pm_request(PM_PINCTRL_CONFIG_PARAM_SET, reset_gpio, - PM_PINCTRL_CONFIG_TRI_STATE, - PM_PINCTRL_TRI_STATE_DISABLE, 0, NULL); - udelay(1); - - /* Set value 0 to pin */ - dm_gpio_set_value(&gpio, 0); - udelay(1); - - /* Set value 1 to pin */ - dm_gpio_set_value(&gpio, 1); - udelay(1); - - return 0; -} -#else -int cadence_qspi_versal_flash_reset(struct udevice *dev) +#if !CONFIG_IS_ENABLED(DM_GPIO) +int cadence_qspi_flash_reset(struct udevice *dev) { /* CRP WPROT */ writel(0, WPROT_CRP); diff --git a/drivers/spi/cadence_qspi.c b/drivers/spi/cadence_qspi.c index 331a46d88f7..623904ecdad 100644 --- a/drivers/spi/cadence_qspi.c +++ b/drivers/spi/cadence_qspi.c @@ -33,7 +33,7 @@ __weak int cadence_qspi_apb_dma_read(struct cadence_spi_priv *priv, return 0; } -__weak int cadence_qspi_versal_flash_reset(struct udevice *dev) +__weak int cadence_qspi_flash_reset(struct udevice *dev) { return 0; } @@ -252,7 +252,9 @@ static int cadence_spi_probe(struct udevice *bus) priv->wr_delay = 50 * DIV_ROUND_UP(NSEC_PER_SEC, priv->ref_clk_hz); /* Reset ospi flash device */ - return cadence_qspi_versal_flash_reset(bus); + return cadence_qspi_flash_reset(bus); + + return 0; } static int cadence_spi_remove(struct udevice *dev) From e013f0c59268005a3d422eccb9202e40078be674 Mon Sep 17 00:00:00 2001 From: Love Kumar Date: Fri, 15 Nov 2024 17:32:02 +0530 Subject: [PATCH 12/14] test/py: zynqmp_rpu: Fix tcminit mode value Update the tcminit value to string and number both as per commit 342ccba5586a ("arm64: zynqmp: Fix tcminit mode value based on argv") and also adds negative cases based on invalid command sequences. Signed-off-by: Love Kumar Link: https://lore.kernel.org/r/48f75577f6735a0d14105658e89b625d45537bb1.1731672024.git.love.kumar@amd.com Signed-off-by: Michal Simek --- test/py/tests/test_zynqmp_rpu.py | 84 +++++++++++++++++++------------- 1 file changed, 49 insertions(+), 35 deletions(-) diff --git a/test/py/tests/test_zynqmp_rpu.py b/test/py/tests/test_zynqmp_rpu.py index 479a612b4ec..22f687dd6d3 100644 --- a/test/py/tests/test_zynqmp_rpu.py +++ b/test/py/tests/test_zynqmp_rpu.py @@ -70,7 +70,7 @@ def ret_code(u_boot_console): # Initialize tcm def tcminit(u_boot_console, rpu_mode): - output = u_boot_console.run_command('zynqmp tcminit %s' % rpu_mode) + output = u_boot_console.run_command(f'zynqmp tcminit {rpu_mode}') assert 'Initializing TCM overwrites TCM content' in output return ret_code(u_boot_console) @@ -89,6 +89,13 @@ def disable_cpus(u_boot_console, cpu_nums): for num in cpu_nums: u_boot_console.run_command(f'cpu {num} disable') +# Get random RPU mode between string and integer +def get_rpu_mode(rpu_mode): + if rpu_mode == 0 or rpu_mode == 'lockstep': + return random.choice(['lockstep', 0]) + elif rpu_mode == 1 or rpu_mode == 'split': + return random.choice(['split', 1]) + # Load apps on RPU cores def rpu_apps_load(u_boot_console, rpu_mode): apps, procs, cpu_nums, addrs, outputs, tftp_addrs = get_rpu_apps_env( @@ -98,20 +105,20 @@ def rpu_apps_load(u_boot_console, rpu_mode): test_net.test_net_setup_static(u_boot_console) try: - assert tcminit(u_boot_console, rpu_mode).endswith('0') + assert tcminit(u_boot_console, get_rpu_mode(rpu_mode)).endswith('0') for i in range(len(apps)): if rpu_mode == 'lockstep' and procs[i] != 'rpu0': continue load_app_ddr(u_boot_console, tftp_addrs[i], apps[i]) - rel_addr = int(addrs[i] + 0x3C) + rel_addr = hex(int(addrs[i] + 0x3C)) # Release cpu at app load address cpu_num = cpu_nums[i] - cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rpu_mode) + cmd = f'cpu {cpu_num} release {rel_addr} {rpu_mode}' output = u_boot_console.run_command(cmd) - exp_op = f'Using TCM jump trampoline for address {hex(rel_addr)}' + exp_op = f'Using TCM jump trampoline for address {rel_addr}' assert exp_op in output assert f'R5 {rpu_mode} mode' in output u_boot_console.wait_for(outputs[i]) @@ -133,16 +140,13 @@ def test_zynqmp_rpu_app_load_negative(u_boot_console): u_boot_console) # Invalid commands - u_boot_console.run_command('zynqmp tcminit mode') - assert ret_code(u_boot_console).endswith('1') - rand_str = ''.join(random.choices(string.ascii_lowercase, k=4)) - u_boot_console.run_command('zynqmp tcminit %s' % rand_str) - assert ret_code(u_boot_console).endswith('1') - rand_num = random.randint(2, 100) - u_boot_console.run_command('zynqmp tcminit %d' % rand_num) - assert ret_code(u_boot_console).endswith('1') + inv_modes = ['mode', rand_str, rand_num, 'splittt', 'locksteppp', '00', 11] + + for mode in inv_modes: + u_boot_console.run_command(f'zynqmp tcminit {mode}') + assert ret_code(u_boot_console).endswith('1') test_net.test_net_dhcp(u_boot_console) if not test_net.net_set_up: @@ -150,56 +154,66 @@ def test_zynqmp_rpu_app_load_negative(u_boot_console): try: rpu_mode = 'split' - assert tcminit(u_boot_console, rpu_mode).endswith('0') + assert tcminit(u_boot_console, get_rpu_mode(rpu_mode)).endswith('0') + inv_modes += [0, 1] for i in range(len(apps)): load_app_ddr(u_boot_console, tftp_addrs[i], apps[i]) # Run in split mode at different load address - rel_addr = int(addrs[i]) + random.randint(200, 1000) + rel_addr = hex(int(addrs[i]) + random.randint(200, 1000)) cpu_num = cpu_nums[i] - cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rpu_mode) + cmd = f'cpu {cpu_num} release {rel_addr} {rpu_mode}' output = u_boot_console.run_command(cmd) - exp_op = f'Using TCM jump trampoline for address {hex(rel_addr)}' + exp_op = f'Using TCM jump trampoline for address {rel_addr}' assert exp_op in output assert f'R5 {rpu_mode} mode' in output assert not outputs[i] in output # Invalid rpu mode - rand_str = ''.join(random.choices(string.ascii_lowercase, k=4)) - cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rand_str) - output = u_boot_console.run_command(cmd) - assert exp_op in output - assert f'Unsupported mode' in output - assert not ret_code(u_boot_console).endswith('0') + for mode in inv_modes: + cmd = f'cpu {cpu_num} release {rel_addr} {mode}' + output = u_boot_console.run_command(cmd) + assert exp_op in output + assert f'Unsupported mode' in output + assert not ret_code(u_boot_console).endswith('0') # Switch to lockstep mode, without disabling CPUs rpu_mode = 'lockstep' - u_boot_console.run_command('zynqmp tcminit %s' % rpu_mode) - assert not ret_code(u_boot_console).endswith('0') + output = u_boot_console.run_command( + f'zynqmp tcminit {get_rpu_mode(rpu_mode)}' + ) + assert 'ERROR: ' in output # Disable cpus disable_cpus(u_boot_console, cpu_nums) # Switch to lockstep mode, after disabling CPUs - output = u_boot_console.run_command('zynqmp tcminit %s' % rpu_mode) + output = u_boot_console.run_command( + f'zynqmp tcminit {get_rpu_mode(rpu_mode)}' + ) assert 'Initializing TCM overwrites TCM content' in output assert ret_code(u_boot_console).endswith('0') - # Run lockstep mode for RPU1 + # Run lockstep mode for RPU1/RPU0 for i in range(len(apps)): - if procs[i] == 'rpu0': - continue - load_app_ddr(u_boot_console, tftp_addrs[i], apps[i]) - rel_addr = int(addrs[i] + 0x3C) + rel_addr = hex(int(addrs[i] + 0x3C)) cpu_num = cpu_nums[i] - cmd = 'cpu %d release %x %s' % (cpu_num, rel_addr, rpu_mode) + cmd = f'cpu {cpu_num} release {rel_addr} {rpu_mode}' output = u_boot_console.run_command(cmd) - exp_op = f'Using TCM jump trampoline for address {hex(rel_addr)}' + exp_op = f'Using TCM jump trampoline for address {rel_addr}' assert exp_op in output - assert f'R5 {rpu_mode} mode' in output - assert u_boot_console.p.expect([outputs[i]]) + + if procs[i] == 'rpu1': + assert 'Lockstep mode should run on ZYNQMP_CORE_RPU0' in output + assert not ret_code(u_boot_console).endswith('0') + elif procs[i] == 'rpu0': + assert f'R5 {rpu_mode} mode' in output + u_boot_console.wait_for(outputs[i]) + assert ret_code(u_boot_console).endswith('0') + else: + assert False, 'ERROR: Invalid processor!' finally: disable_cpus(u_boot_console, cpu_nums) # This forces the console object to be shutdown, so any subsequent test From 3ce08a3038d52feedc662efd8b8d46de61508298 Mon Sep 17 00:00:00 2001 From: Michal Simek Date: Thu, 28 Nov 2024 15:49:14 +0100 Subject: [PATCH 13/14] arm64: zynqmp: Sync with v6.12 kernel Sync zynqmp* DTS files with v6.12 Linux kernel. Signed-off-by: Michal Simek Link: https://lore.kernel.org/r/cf37760117765c4cece94736dc2a7b583d5987de.1732805351.git.michal.simek@amd.com --- arch/arm/dts/zynqmp-clk-ccf.dtsi | 16 ++++++++++ arch/arm/dts/zynqmp-sm-k26-revA.dts | 2 +- arch/arm/dts/zynqmp-smk-k26-revA.dts | 2 +- arch/arm/dts/zynqmp-zcu102-revA.dts | 1 + arch/arm/dts/zynqmp-zcu1275-revA.dts | 3 +- arch/arm/dts/zynqmp.dtsi | 44 +++++++++++++++++++++++----- 6 files changed, 57 insertions(+), 11 deletions(-) diff --git a/arch/arm/dts/zynqmp-clk-ccf.dtsi b/arch/arm/dts/zynqmp-clk-ccf.dtsi index dd4569e7bd9..60d1b1acf9a 100644 --- a/arch/arm/dts/zynqmp-clk-ccf.dtsi +++ b/arch/arm/dts/zynqmp-clk-ccf.dtsi @@ -70,6 +70,22 @@ clocks = <&zynqmp_clk ACPU>; }; +&cpu0_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu1_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu2_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu3_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + &fpd_dma_chan1 { clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; }; diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts b/arch/arm/dts/zynqmp-sm-k26-revA.dts index 8c43ade9405..620f5185cc4 100644 --- a/arch/arm/dts/zynqmp-sm-k26-revA.dts +++ b/arch/arm/dts/zynqmp-sm-k26-revA.dts @@ -3,7 +3,7 @@ * dts file for Xilinx ZynqMP SM-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. - * (C) Copyright 2023, Advanced Micro Devices, Inc. + * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-smk-k26-revA.dts b/arch/arm/dts/zynqmp-smk-k26-revA.dts index 719a4e49b57..b804abe89d1 100644 --- a/arch/arm/dts/zynqmp-smk-k26-revA.dts +++ b/arch/arm/dts/zynqmp-smk-k26-revA.dts @@ -3,7 +3,7 @@ * dts file for Xilinx ZynqMP SMK-K26 rev2/1/B/A * * (C) Copyright 2020 - 2021, Xilinx, Inc. - * (C) Copyright 2023, Advanced Micro Devices, Inc. + * (C) Copyright 2023 - 2024, Advanced Micro Devices, Inc. * * Michal Simek */ diff --git a/arch/arm/dts/zynqmp-zcu102-revA.dts b/arch/arm/dts/zynqmp-zcu102-revA.dts index 3132fa533b8..dd63d22f45e 100644 --- a/arch/arm/dts/zynqmp-zcu102-revA.dts +++ b/arch/arm/dts/zynqmp-zcu102-revA.dts @@ -960,6 +960,7 @@ &pcie { status = "okay"; + phys = <&psgtr 0 PHY_TYPE_PCIE 0 0>; }; &psgtr { diff --git a/arch/arm/dts/zynqmp-zcu1275-revA.dts b/arch/arm/dts/zynqmp-zcu1275-revA.dts index 095c972f132..b75b2a796eb 100644 --- a/arch/arm/dts/zynqmp-zcu1275-revA.dts +++ b/arch/arm/dts/zynqmp-zcu1275-revA.dts @@ -15,8 +15,7 @@ / { model = "ZynqMP ZCU1275 RevA"; - compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275", - "xlnx,zynqmp"; + compatible = "xlnx,zynqmp-zcu1275-revA", "xlnx,zynqmp-zcu1275", "xlnx,zynqmp"; aliases { serial0 = &uart0; diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp.dtsi index 6a29f610153..70ca5e6379f 100644 --- a/arch/arm/dts/zynqmp.dtsi +++ b/arch/arm/dts/zynqmp.dtsi @@ -168,8 +168,8 @@ bootph-all; }; - pmu: pmu { - compatible = "arm,armv8-pmuv3"; + pmu { + compatible = "arm,cortex-a53-pmu"; interrupt-parent = <&gic>; interrupts = , , @@ -441,6 +441,34 @@ }; }; + cpu0_debug: debug@fec10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfec10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; + + cpu1_debug: debug@fed10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfed10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu1>; + }; + + cpu2_debug: debug@fee10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfee10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu2>; + }; + + cpu3_debug: debug@fef10000 { + compatible = "arm,coresight-cpu-debug", "arm,primecell"; + reg = <0x0 0xfef10000 0x0 0x1000>; + clock-names = "apb_pclk"; + cpu = <&cpu3>; + }; + /* GDMA */ fpd_dma_chan1: dma-controller@fd500000 { status = "disabled"; @@ -885,7 +913,6 @@ power-domains = <&zynqmp_firmware PD_SATA>; resets = <&zynqmp_reset ZYNQMP_RESET_SATA>; /* iommus = <&smmu 0x4c0>, <&smmu 0x4c1>, <&smmu 0x4c2>, <&smmu 0x4c3>; */ - /* dma-coherent; */ }; sdhci0: mmc@ff160000 { @@ -1065,9 +1092,9 @@ , , ; + clock-names = "ref"; /* iommus = <&smmu 0x860>; */ snps,quirk-frame-length-adjustment = <0x20>; - clock-names = "ref"; snps,resume-hs-terminations; /* dma-coherent; */ }; @@ -1097,9 +1124,9 @@ , , ; + clock-names = "ref"; /* iommus = <&smmu 0x861>; */ snps,quirk-frame-length-adjustment = <0x20>; - clock-names = "ref"; snps,resume-hs-terminations; /* dma-coherent; */ }; @@ -1176,11 +1203,14 @@ "dp_vtc_pixel_clk_in"; power-domains = <&zynqmp_firmware PD_DP>; resets = <&zynqmp_reset ZYNQMP_RESET_DP>; - dma-names = "vid0", "vid1", "vid2", "gfx0"; + dma-names = "vid0", "vid1", "vid2", "gfx0", + "aud0", "aud1"; dmas = <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO0>, <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO1>, <&zynqmp_dpdma ZYNQMP_DPDMA_VIDEO2>, - <&zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS>; + <&zynqmp_dpdma ZYNQMP_DPDMA_GRAPHICS>, + <&zynqmp_dpdma ZYNQMP_DPDMA_AUDIO0>, + <&zynqmp_dpdma ZYNQMP_DPDMA_AUDIO1>; ports { #address-cells = <1>; From 46097afc70352ce5dc0caa8f95b74cba1e00af9b Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Fri, 29 Nov 2024 16:36:31 +0530 Subject: [PATCH 14/14] arm64: zynqmp: Update the usb5744 hub node as per binding Updating the usb5744 hub node as per the latest upstream DT binding https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/ tree/Documentation/devicetree/bindings/usb/microchip,usb5744.yaml?h=v6.8.8 Signed-off-by: Venkatesh Yadav Abbarapu Acked-by: Michal Simek Link: https://lore.kernel.org/r/20241129110631.672637-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek --- arch/arm/dts/zynqmp-sck-kd-g-revA.dtso | 37 +++++++++----- arch/arm/dts/zynqmp-sck-kr-g-revA.dtso | 67 ++++++++++++++++++------- arch/arm/dts/zynqmp-sck-kr-g-revB.dtso | 68 ++++++++++++++++++-------- arch/arm/dts/zynqmp-sck-kv-g-revA.dtso | 24 ++++++--- arch/arm/dts/zynqmp-sck-kv-g-revB.dtso | 33 +++++++++---- 5 files changed, 162 insertions(+), 67 deletions(-) diff --git a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso index 4de29d5d3ff..d56e863ce1c 100644 --- a/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kd-g-revA.dtso @@ -80,7 +80,10 @@ "", ""; }; - /* usb5744@2d */ + hub: usb-hub@2d { /* u36 */ + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; }; /* USB 3.0 */ @@ -99,18 +102,6 @@ phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; -#if 0 - usbhub0: usb-hub { /* u36 */ - i2c-bus = <&i2c1>; - compatible = "microchip,usb5744"; - reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; - }; - - usb2244: usb-sd { /* u41 */ - compatible = "microchip,usb2244"; - reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; - }; -#endif }; &dwc3_0 { @@ -118,6 +109,26 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; }; &gem1 { /* mdio mio50/51 */ diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso index 6349a0e1087..9d0c0c2885d 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revA.dtso @@ -105,11 +105,19 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; + hub_1: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; }; usbhub_i2c1: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; + hub_2: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; }; /* Bus 2/3 are not connected */ }; @@ -145,18 +153,6 @@ phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; -#if 0 - usbhub0: usb-hub { /* u43 */ - i2c-bus = <&usbhub_i2c0>; - compatible = "microchip,usb5744"; - reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; - }; - - usb2244: usb-sd { /* u38 */ - compatible = "microchip,usb2244"; - reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; - }; -#endif }; &dwc3_0 { @@ -164,6 +160,26 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; }; &usb1 { /* mio64 - mio75 */ @@ -174,13 +190,6 @@ phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; -#if 0 - usbhub1: usb-hub { /* u84 */ - i2c-bus = <&usbhub_i2c1>; - compatible = "microchip,usb5744"; - reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; - }; -#endif }; &dwc3_1 { @@ -188,6 +197,26 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub1_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub1_3_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub1_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub1_2_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; }; &gem0 { /* mdio mio50/51 */ diff --git a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso index b0d737d3caf..0d915d496ca 100644 --- a/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kr-g-revB.dtso @@ -117,11 +117,19 @@ #address-cells = <1>; #size-cells = <0>; reg = <0>; + hub_1: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; }; usbhub_i2c1: i2c@1 { #address-cells = <1>; #size-cells = <0>; reg = <1>; + hub_2: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; }; /* Bus 2/3 are not connected */ }; @@ -165,18 +173,6 @@ phys = <&psgtr 2 PHY_TYPE_USB3 0 2>; reset-gpios = <&slg7xl45106 0 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; -#if 0 - usbhub0: usb-hub { /* u43 */ - i2c-bus = <&usbhub_i2c0>; - compatible = "microchip,usb5744"; - reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; - }; - - usb2244: usb-sd { /* u38 */ - compatible = "microchip,usb2244"; - reset-gpios = <&slg7xl45106 2 GPIO_ACTIVE_LOW>; - }; -#endif }; &dwc3_0 { @@ -184,6 +180,26 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub_1>; + reset-gpios = <&slg7xl45106 3 GPIO_ACTIVE_LOW>; + }; }; &usb1 { /* mio64 - mio75 */ @@ -194,14 +210,6 @@ phys = <&psgtr 3 PHY_TYPE_USB3 1 2>; reset-gpios = <&slg7xl45106 1 GPIO_ACTIVE_LOW>; assigned-clock-rates = <250000000>, <20000000>; - -#if 0 - usbhub1: usb-hub { /* u84 */ - i2c-bus = <&usbhub_i2c1>; - compatible = "microchip,usb5744"; - reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; - }; -#endif }; &dwc3_1 { @@ -209,6 +217,26 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub1_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub1_3_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub1_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub1_2_0>; + i2c-bus = <&hub_2>; + reset-gpios = <&slg7xl45106 4 GPIO_ACTIVE_LOW>; + }; }; &gem0 { /* mdio mio50/51 */ diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso index 561b546e37f..a98a888d138 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revA.dtso @@ -129,12 +129,6 @@ pinctrl-0 = <&pinctrl_usb0_default>; phy-names = "usb3-phy"; phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; -#if 0 - usbhub: usb5744 { /* u43 */ - compatible = "microchip,usb5744"; - reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; - }; -#endif }; &dwc3_0 { @@ -142,6 +136,24 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; }; &sdhci1 { /* on CC with tuned parameters */ diff --git a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso index 64683e0ccbb..7490efea98b 100644 --- a/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso +++ b/arch/arm/dts/zynqmp-sck-kv-g-revB.dtso @@ -92,7 +92,10 @@ label = "ina260-u14"; reg = <0x40>; }; - /* u43 - 0x2d - USB hub */ + hub: usb-hub@2d { + compatible = "microchip,usb5744"; + reg = <0x2d>; + }; /* u27 - 0xe0 - STDP4320 DP/HDMI splitter */ }; @@ -131,14 +134,6 @@ phy-names = "usb3-phy"; phys = <&psgtr 2 PHY_TYPE_USB3 0 1>; assigned-clock-rates = <250000000>, <20000000>; -#if 0 - usb5744: usb-hub { /* u43 */ - status = "okay"; - compatible = "microchip,usb5744"; - i2c-bus = <&i2c1>; - reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; - }; -#endif }; &dwc3_0 { @@ -146,6 +141,26 @@ dr_mode = "host"; snps,usb3_lpm_capable; maximum-speed = "super-speed"; + #address-cells = <1>; + #size-cells = <0>; + + /* 2.0 hub on port 1 */ + hub_2_0: hub@1 { + compatible = "usb424,2744"; + reg = <1>; + peer-hub = <&hub_3_0>; + i2c-bus = <&hub>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; + + /* 3.0 hub on port 2 */ + hub_3_0: hub@2 { + compatible = "usb424,5744"; + reg = <2>; + peer-hub = <&hub_2_0>; + i2c-bus = <&hub>; + reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>; + }; }; &sdhci1 { /* on CC with tuned parameters */