mirrors/u-boot
1
0
Fork 0
mirror of https://source.denx.de/u-boot/u-boot.git synced 2025-09-24 23:31:44 +02:00
Code Issues Actions Packages Projects Releases Wiki Activity

arch: arm: dts: fsl-lx2160a.dtsi: sync serial nodes with Linux

Browse Source 
Sync the serial nodes of the LX2160A based boards with their
representation in Linux. We also imported the clockgen and sysclk nodes
which are dependencies.

Signed-off-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
This commit is contained in:
Ioana Ciornei 2023-03-15 13:04:16 +02:00 committed by Peng Fan
parent 853493b9f9
commit dea0f1a27f
3 changed files with 33 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
arch/arm/dts/fsl-lx2160a-qds.dtsi
View File

@ -2,7 +2,7 @@
/*
* NXP LX2160AQDS common device tree source
*
* Copyright 2018-2020 NXP
* Copyright 2018-2020, 2023 NXP
*
*/
@ -11,6 +11,7 @@
/ {
aliases {
spi0 = &fspi;
serial0 = &uart0;
};
};
@ -286,3 +287,11 @@
&sata3 {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};

11
arch/arm/dts/fsl-lx2160a-rdb.dts
View File

@ -5,7 +5,7 @@
* Author: Priyanka Jain <priyanka.jain@nxp.com>
* Sriram Dash <sriram.dash@nxp.com>
*
* Copyright 2018 NXP
* Copyright 2018, 2023 NXP
*
*/
@ -18,6 +18,7 @@
compatible = "fsl,lx2160ardb", "fsl,lx2160a";
aliases {
spi0 = &fspi;
serial0 = &uart0;
};
};
@ -137,3 +138,11 @@
&sata3 {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
status = "okay";
};

22
arch/arm/dts/fsl-lx2160a.dtsi
View File

@ -2,7 +2,7 @@
/*
* NXP lx2160a SOC common device tree source
*
* Copyright 2018-2021 NXP
* Copyright 2018-2021, 2023 NXP
*
*/
@ -35,30 +35,34 @@
dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
uart0: serial@21c0000 {
compatible = "arm,pl011";
compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21c0000 0x0 0x1000>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
current-speed = <115200>;
status = "disabled";
};
uart1: serial@21d0000 {
compatible = "arm,pl011";
compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21d0000 0x0 0x1000>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
current-speed = <115200>;
status = "disabled";
};
uart2: serial@21e0000 {
compatible = "arm,pl011";
compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21e0000 0x0 0x1000>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
current-speed = <115200>;
status = "disabled";
};
uart3: serial@21f0000 {
compatible = "arm,pl011";
compatible = "arm,sbsa-uart","arm,pl011";
reg = <0x0 0x21f0000 0x0 0x1000>;
clocks = <&clockgen 4 0>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
current-speed = <115200>;
status = "disabled";
};
};