From 1692c73ccb39fb790d7ba1a43ca2f14a0f9f1f32 Mon Sep 17 00:00:00 2001 From: Jagan Teki Date: Wed, 6 Mar 2019 22:24:48 +0530 Subject: [PATCH 1/7] sun50i: a64: Add Oceanic 5205 5inMFD initial support Oceanic 5205 5inMFD is a 5 inch Multi function display baseboard designed to mount SoPine SOM. Key features: - Allwinner A64 Cortex-A53 - Mali-400MP2 GPU - AXP803 PMIC - 2GB DDR3 RAM - SD Slot - SPI-NOR flash - EMAC, RTL8211E - MCP2515 CAN - 4-lane, MIPI-DSI panel - Goodix 911 CTP - USB Host - 12V DC power supply Linux commit details about the sun50i-a64-oceanic-5205-5inmfd.dts sync: "arm64: allwinner: a64: Add Oceanic 5205 5inMFD initial support" (sha1: 00f7980a3bd53d12abc34f68146a8eed0e894248) Signed-off-by: Jagan Teki --- arch/arm/dts/Makefile | 1 + .../dts/sun50i-a64-oceanic-5205-5inmfd.dts | 68 +++++++++++++++++++ board/sunxi/MAINTAINERS | 5 ++ configs/oceanic_5205_5inmfd_defconfig | 20 ++++++ 4 files changed, 94 insertions(+) create mode 100644 arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts create mode 100644 configs/oceanic_5205_5inmfd_defconfig diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 0e2ffdb87f0..e6ee98e05c9 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -474,6 +474,7 @@ dtb-$(CONFIG_MACH_SUN50I) += \ sun50i-a64-amarula-relic.dtb \ sun50i-a64-bananapi-m64.dtb \ sun50i-a64-nanopi-a64.dtb \ + sun50i-a64-oceanic-5205-5inmfd.dtb \ sun50i-a64-olinuxino.dtb \ sun50i-a64-orangepi-win.dtb \ sun50i-a64-pine64-lts.dtb \ diff --git a/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts new file mode 100644 index 00000000000..6a2154525d1 --- /dev/null +++ b/arch/arm/dts/sun50i-a64-oceanic-5205-5inmfd.dts @@ -0,0 +1,68 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (C) 2019 Oceanic Systems (UK) Ltd. + * Copyright (C) 2019 Amarula Solutions B.V. + * Author: Jagan Teki + */ + +/dts-v1/; + +#include "sun50i-a64-sopine.dtsi" + +/ { + model = "Oceanic 5205 5inMFD"; + compatible = "oceanic,5205-5inmfd", "allwinner,sun50i-a64"; + + aliases { + ethernet0 = &emac; + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; +}; + +&ehci0 { + status = "okay"; +}; + +&emac { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>; + phy-mode = "rgmii"; + phy-handle = <&ext_rgmii_phy>; + phy-supply = <®_dc1sw>; + allwinner,tx-delay-ps = <600>; + status = "okay"; +}; + +&mdio { + ext_rgmii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + }; +}; + +&ohci0 { + status = "okay"; +}; + +®_dc1sw { + regulator-name = "vcc-phy"; +}; + +&uart0 { + pinctrl-names = "default"; + pinctrl-0 = <&uart0_pb_pins>; + status = "okay"; +}; + +&usb_otg { + dr_mode = "host"; + status = "okay"; +}; + +&usbphy { + status = "okay"; +}; diff --git a/board/sunxi/MAINTAINERS b/board/sunxi/MAINTAINERS index 8e2f90fc68c..7f96d2bb1c4 100644 --- a/board/sunxi/MAINTAINERS +++ b/board/sunxi/MAINTAINERS @@ -341,6 +341,11 @@ M: FUKAUMI Naoki S: Maintained F: configs/Nintendo_NES_Classic_Edition_defconfig +OCEANIC 5205 5INMFD BOARD +M: Jagan Teki +S: Maintained +F: configs/oceanic_5205_5inmfd_defconfig + OLIMEX A20-SOM204 BOARD M: Stefan Mavrodiev S: Maintained diff --git a/configs/oceanic_5205_5inmfd_defconfig b/configs/oceanic_5205_5inmfd_defconfig new file mode 100644 index 00000000000..34fe6f52735 --- /dev/null +++ b/configs/oceanic_5205_5inmfd_defconfig @@ -0,0 +1,20 @@ +CONFIG_ARM=y +CONFIG_ARCH_SUNXI=y +CONFIG_SPL=y +CONFIG_MACH_SUN50I=y +CONFIG_RESERVE_ALLWINNER_BOOT0_HEADER=y +CONFIG_SUNXI_DRAM_LPDDR3_STOCK=y +CONFIG_DRAM_CLK=552 +CONFIG_DRAM_ZQ=3881949 +CONFIG_MMC0_CD_PIN="" +CONFIG_SPL_SPI_SUNXI=y +CONFIG_NR_DRAM_BANKS=1 +# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_SPL_DOS_PARTITION is not set +# CONFIG_SPL_EFI_PARTITION is not set +CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-oceanic-5205-5inmfd" +CONFIG_SUN8I_EMAC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y +CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y From 30cb441ec69838cffe211cfde6ff6f7fa5a395cd Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Sat, 9 Mar 2019 01:03:31 +0000 Subject: [PATCH 2/7] sunxi: Pine64-LTS: (Re-)enable USB 1.x support The Pine64-LTS defconfig is missing the CONFIG_USB_OHCI_HCD symbol, as this was added during the same time as this defconfig was merged. USB 1.x devices like USB keyboards don't work due to this. Add the symbol to the defconfig as all the other boards do. Signed-off-by: Andre Przywara Reviewed-by: Jagan Teki --- configs/pine64-lts_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/pine64-lts_defconfig b/configs/pine64-lts_defconfig index fd3cdeec858..a8331377872 100644 --- a/configs/pine64-lts_defconfig +++ b/configs/pine64-lts_defconfig @@ -16,4 +16,5 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-pine64-lts" CONFIG_SUN8I_EMAC=y CONFIG_USB_EHCI_HCD=y +CONFIG_USB_OHCI_HCD=y CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y From ddd693021535b2ebd434b712c90443d95728cc8f Mon Sep 17 00:00:00 2001 From: Michael Trimarchi Date: Mon, 18 Mar 2019 15:17:45 +0530 Subject: [PATCH 3/7] sunxi: dram_sun8i: Fix A33 memory initialization MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit While the exact problem is not known, based on discussion between Philipp Tomsich and André Przywara it is guessed that exit self-refresh timing is not set with correct value. There may be implicit enter or exit Self-Refresh anywhere as part of some training phase. In ZynqMP register guide [1], which is close to the various Allwinner DRAM controllers, tXSDLL is bits [14:8], while the non-DLL tXS is bits [6:0]: Self refresh exit delay. So it could be safely increased and it only affects the time after the self-refresh “exit”, which happens only after (re-)initialisation. There was no document for cpu in question so based on oscilloscope readings [2][3] and observed result by comparing allwinner architecture. So set it same as Allwinner H5 silicon. Before this patch, failure rate of was 7%. This was tested on A33 allwinner cpu, dual rank connection connected with two MT41K512M16HA-125:A memory model. Memory is configured as DDR3 1.5V And also this is tested in A33-OLinuXino dev board. [1] https://www.xilinx.com/html_docs/registers/ug1087/ddrc___dramtmg8.html [2] https://ibb.co/R70zmyS [3] https://ibb.co/HVVCGQ8 Signed-off-by: Michael Trimarchi Signed-off-by: Shyam Saini Acked-by: Jagan Teki --- arch/arm/mach-sunxi/dram_sun8i_a33.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/dram_sun8i_a33.c b/arch/arm/mach-sunxi/dram_sun8i_a33.c index 1da2727f987..5da01922bfa 100644 --- a/arch/arm/mach-sunxi/dram_sun8i_a33.c +++ b/arch/arm/mach-sunxi/dram_sun8i_a33.c @@ -152,7 +152,7 @@ static void auto_set_timing_para(struct dram_para *para) reg_val &= ~(0xff << 8); reg_val &= ~(0xff << 0); reg_val |= (0x33 << 8); - reg_val |= (0x8 << 0); + reg_val |= (0x10 << 0); writel(reg_val, &mctl_ctl->dramtmg8); /* Set phy interface time */ reg_val = (0x2 << 24) | (t_rdata_en << 16) | (0x1 << 8) From 9c2b0ddc41423e446e3ece3b5183489a1f6c9ed4 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Thu, 14 Mar 2019 11:36:14 +0100 Subject: [PATCH 4/7] arm: sunxi: Allow per-platform DRAM ZQ configuration on sun8i A few sun8i platforms define specific default DRAM ZQ values, but they are not taken in account because of MACH_SUN8I being used for the 123 default first. Replace MACH_SUN8I with the list of platforms that don't have specific DRAM ZQ values, to avoid overwriting the default for those that do. Signed-off-by: Paul Kocialkowski Acked-by: Jagan Teki --- arch/arm/mach-sunxi/Kconfig | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 152deb04e90..49eec8888cf 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -426,7 +426,9 @@ endif config DRAM_ZQ int "sunxi dram zq value" - default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || MACH_SUN8I + default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || \ + MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_A83T || \ + MACH_SUNXI_H3_H5 default 127 if MACH_SUN7I default 14779 if MACH_SUN8I_V3S default 3881979 if MACH_SUN8I_R40 || MACH_SUN50I_H6 From 882b71e47df2889c77105ddcfe34cbafa762a208 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Thu, 14 Mar 2019 11:36:15 +0100 Subject: [PATCH 5/7] arm: sunxi: Set the default DRAM ZQ value to 3881979 on H3/H5 Most H3/H5 boards we support have the DRAM ZQ value set to 3881979, which is also consistent with the default set for the R40. Make this value the default on H3/H5 instead of 123. Signed-off-by: Paul Kocialkowski Reviewed-by: Jagan Teki --- arch/arm/mach-sunxi/Kconfig | 5 ++--- configs/bananapi_m2_plus_h3_defconfig | 1 - configs/bananapi_m2_plus_h5_defconfig | 1 - configs/bananapi_m2_zero_defconfig | 1 - configs/libretech_all_h3_cc_h2_plus_defconfig | 1 - configs/libretech_all_h3_cc_h3_defconfig | 1 - configs/libretech_all_h3_cc_h5_defconfig | 1 - configs/nanopi_m1_defconfig | 1 - configs/nanopi_m1_plus_defconfig | 1 - configs/nanopi_neo_air_defconfig | 1 - configs/nanopi_neo_defconfig | 1 - configs/orangepi_2_defconfig | 1 - configs/orangepi_lite_defconfig | 1 - configs/orangepi_one_defconfig | 1 - configs/orangepi_pc_defconfig | 1 - configs/orangepi_pc_plus_defconfig | 1 - configs/orangepi_plus2e_defconfig | 1 - configs/orangepi_plus_defconfig | 1 - configs/orangepi_r1_defconfig | 1 - configs/orangepi_zero_defconfig | 1 - 20 files changed, 2 insertions(+), 22 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index 49eec8888cf..aa8c2a41a55 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -427,11 +427,10 @@ endif config DRAM_ZQ int "sunxi dram zq value" default 123 if MACH_SUN4I || MACH_SUN5I || MACH_SUN6I || \ - MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_A83T || \ - MACH_SUNXI_H3_H5 + MACH_SUN8I_A23 || MACH_SUN8I_A33 || MACH_SUN8I_A83T default 127 if MACH_SUN7I default 14779 if MACH_SUN8I_V3S - default 3881979 if MACH_SUN8I_R40 || MACH_SUN50I_H6 + default 3881979 if MACH_SUNXI_H3_H5 || MACH_SUN8I_R40 || MACH_SUN50I_H6 default 4145117 if MACH_SUN9I default 3881915 if MACH_SUN50I ---help--- diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig index 597618fb900..b906942b243 100644 --- a/configs/bananapi_m2_plus_h3_defconfig +++ b/configs/bananapi_m2_plus_h3_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index e7c10dbdf2d..4d70cb632fe 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig index 91302eb49cf..4cabf32ffc7 100644 --- a/configs/bananapi_m2_zero_defconfig +++ b/configs/bananapi_m2_zero_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index 8f3144895c6..7a83e0752ec 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index e5e0f593a7d..e2ebc7527f2 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index e4a93bde481..30c1aa21b71 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index b3a7870ea9a..222a8f9eaf3 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index b83cdf2e1cc..0f30e0f3301 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 33f9c0746c1..47f6232fdcb 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index 40f5bd176e5..d5ef0e3fd33 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index ab6566e49a8..54427762ff1 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -4,7 +4,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_USB1_VBUS_PIN="PG13" CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index 1092a852503..2a5aa6e014d 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 404fdd91197..9ed1eccb308 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index de11df755e4..0fe1ca81e06 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index ce26cfaf9b5..c601937f7cf 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index b0813e4e10b..90ab51bd0d2 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index 05023737a95..49796ac1980 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index 05c3b08b766..87f076f827f 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index 44fc18b7b1e..b3376b4f10e 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ZQ=3881979 CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y From 9d0f9e837421c3e6d1e99caed401511d886a1c36 Mon Sep 17 00:00:00 2001 From: Paul Kocialkowski Date: Thu, 14 Mar 2019 11:36:16 +0100 Subject: [PATCH 6/7] arm: sunxi: Enable DRAM ODT by default on H3/H5 Most of the boards we support with H3/H5 enable DRAM on-die termination, which is consistent with the high DRAM clocks that are used. Make it the default (like it's done for other similar platforms) instead of defining it in each defconfig. Signed-off-by: Paul Kocialkowski Reviewed-by: Jagan Teki --- arch/arm/mach-sunxi/Kconfig | 1 + configs/bananapi_m2_plus_h3_defconfig | 1 - configs/bananapi_m2_plus_h5_defconfig | 1 - configs/bananapi_m2_zero_defconfig | 1 - configs/emlid_neutis_n5_devboard_defconfig | 1 + configs/libretech_all_h3_cc_h2_plus_defconfig | 1 - configs/libretech_all_h3_cc_h3_defconfig | 1 - configs/libretech_all_h3_cc_h5_defconfig | 1 - configs/nanopi_m1_defconfig | 1 - configs/nanopi_m1_plus_defconfig | 1 - configs/nanopi_neo2_defconfig | 1 + configs/nanopi_neo_air_defconfig | 1 - configs/nanopi_neo_defconfig | 1 - configs/nanopi_neo_plus2_defconfig | 1 + configs/orangepi_2_defconfig | 1 - configs/orangepi_lite_defconfig | 1 - configs/orangepi_one_defconfig | 1 - configs/orangepi_pc2_defconfig | 1 + configs/orangepi_pc_defconfig | 1 - configs/orangepi_pc_plus_defconfig | 1 - configs/orangepi_plus2e_defconfig | 1 - configs/orangepi_plus_defconfig | 1 - configs/orangepi_prime_defconfig | 1 + configs/orangepi_r1_defconfig | 1 - configs/orangepi_zero_defconfig | 1 - configs/orangepi_zero_plus2_defconfig | 1 + configs/orangepi_zero_plus_defconfig | 1 + 27 files changed, 8 insertions(+), 19 deletions(-) diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig index aa8c2a41a55..8110f23ff67 100644 --- a/arch/arm/mach-sunxi/Kconfig +++ b/arch/arm/mach-sunxi/Kconfig @@ -439,6 +439,7 @@ config DRAM_ZQ config DRAM_ODT_EN bool "sunxi dram odt enable" default y if MACH_SUN8I_A23 + default y if MACH_SUNXI_H3_H5 default y if MACH_SUN8I_R40 default y if MACH_SUN50I default y if MACH_SUN50I_H6 diff --git a/configs/bananapi_m2_plus_h3_defconfig b/configs/bananapi_m2_plus_h3_defconfig index b906942b243..4e4734655fc 100644 --- a/configs/bananapi_m2_plus_h3_defconfig +++ b/configs/bananapi_m2_plus_h3_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/bananapi_m2_plus_h5_defconfig b/configs/bananapi_m2_plus_h5_defconfig index 4d70cb632fe..29dd892d7f0 100644 --- a/configs/bananapi_m2_plus_h5_defconfig +++ b/configs/bananapi_m2_plus_h5_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/bananapi_m2_zero_defconfig b/configs/bananapi_m2_zero_defconfig index 4cabf32ffc7..8546674b239 100644 --- a/configs/bananapi_m2_zero_defconfig +++ b/configs/bananapi_m2_zero_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="" # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/emlid_neutis_n5_devboard_defconfig b/configs/emlid_neutis_n5_devboard_defconfig index 3df0ca13f04..19e8d792556 100644 --- a/configs/emlid_neutis_n5_devboard_defconfig +++ b/configs/emlid_neutis_n5_devboard_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=408 CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/libretech_all_h3_cc_h2_plus_defconfig b/configs/libretech_all_h3_cc_h2_plus_defconfig index 7a83e0752ec..3bccd604291 100644 --- a/configs/libretech_all_h3_cc_h2_plus_defconfig +++ b/configs/libretech_all_h3_cc_h2_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/libretech_all_h3_cc_h3_defconfig b/configs/libretech_all_h3_cc_h3_defconfig index e2ebc7527f2..c00ab01fdda 100644 --- a/configs/libretech_all_h3_cc_h3_defconfig +++ b/configs/libretech_all_h3_cc_h3_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/libretech_all_h3_cc_h5_defconfig b/configs/libretech_all_h3_cc_h5_defconfig index 30c1aa21b71..5843f34325b 100644 --- a/configs/libretech_all_h3_cc_h5_defconfig +++ b/configs/libretech_all_h3_cc_h5_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/nanopi_m1_defconfig b/configs/nanopi_m1_defconfig index 222a8f9eaf3..af7fa0b20b2 100644 --- a/configs/nanopi_m1_defconfig +++ b/configs/nanopi_m1_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/nanopi_m1_plus_defconfig b/configs/nanopi_m1_plus_defconfig index 0f30e0f3301..84e152546b6 100644 --- a/configs/nanopi_m1_plus_defconfig +++ b/configs/nanopi_m1_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ODT_EN=y CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/nanopi_neo2_defconfig b/configs/nanopi_neo2_defconfig index 9de893adfaf..2d44135bbc7 100644 --- a/configs/nanopi_neo2_defconfig +++ b/configs/nanopi_neo2_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/nanopi_neo_air_defconfig b/configs/nanopi_neo_air_defconfig index 47f6232fdcb..bd099c8d671 100644 --- a/configs/nanopi_neo_air_defconfig +++ b/configs/nanopi_neo_air_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/nanopi_neo_defconfig b/configs/nanopi_neo_defconfig index d5ef0e3fd33..074b172061f 100644 --- a/configs/nanopi_neo_defconfig +++ b/configs/nanopi_neo_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=408 -CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/nanopi_neo_plus2_defconfig b/configs/nanopi_neo_plus2_defconfig index 88c76a55e53..11cb8f61b03 100644 --- a/configs/nanopi_neo_plus2_defconfig +++ b/configs/nanopi_neo_plus2_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=408 CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_2_defconfig b/configs/orangepi_2_defconfig index 54427762ff1..ce3cc8352cf 100644 --- a/configs/orangepi_2_defconfig +++ b/configs/orangepi_2_defconfig @@ -4,7 +4,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_USB1_VBUS_PIN="PG13" CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/orangepi_lite_defconfig b/configs/orangepi_lite_defconfig index 2a5aa6e014d..490f5a3aae4 100644 --- a/configs/orangepi_lite_defconfig +++ b/configs/orangepi_lite_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_one_defconfig b/configs/orangepi_one_defconfig index 9ed1eccb308..949fc5d40f7 100644 --- a/configs/orangepi_one_defconfig +++ b/configs/orangepi_one_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_pc2_defconfig b/configs/orangepi_pc2_defconfig index ad837382c8e..a5bac5b2926 100644 --- a/configs/orangepi_pc2_defconfig +++ b/configs/orangepi_pc2_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set CONFIG_MACPWR="PD6" CONFIG_SPL_SPI_SUNXI=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_pc_defconfig b/configs/orangepi_pc_defconfig index 0fe1ca81e06..79d623719e3 100644 --- a/configs/orangepi_pc_defconfig +++ b/configs/orangepi_pc_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ODT_EN=y CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_I2C_SUPPORT=y diff --git a/configs/orangepi_pc_plus_defconfig b/configs/orangepi_pc_plus_defconfig index c601937f7cf..31e9bcf0b3f 100644 --- a/configs/orangepi_pc_plus_defconfig +++ b/configs/orangepi_pc_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ODT_EN=y CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set diff --git a/configs/orangepi_plus2e_defconfig b/configs/orangepi_plus2e_defconfig index 90ab51bd0d2..f31fd28a4f6 100644 --- a/configs/orangepi_plus2e_defconfig +++ b/configs/orangepi_plus2e_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_plus_defconfig b/configs/orangepi_plus_defconfig index 49796ac1980..8a9ea272c3c 100644 --- a/configs/orangepi_plus_defconfig +++ b/configs/orangepi_plus_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=672 -CONFIG_DRAM_ODT_EN=y CONFIG_MACPWR="PD6" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_USB1_VBUS_PIN="PG13" diff --git a/configs/orangepi_prime_defconfig b/configs/orangepi_prime_defconfig index 20ae6df5a0d..0d64eebc099 100644 --- a/configs/orangepi_prime_defconfig +++ b/configs/orangepi_prime_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set diff --git a/configs/orangepi_r1_defconfig b/configs/orangepi_r1_defconfig index 87f076f827f..6492d8580c1 100644 --- a/configs/orangepi_r1_defconfig +++ b/configs/orangepi_r1_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_zero_defconfig b/configs/orangepi_zero_defconfig index b3376b4f10e..b881a848317 100644 --- a/configs/orangepi_zero_defconfig +++ b/configs/orangepi_zero_defconfig @@ -3,7 +3,6 @@ CONFIG_ARCH_SUNXI=y CONFIG_SPL=y CONFIG_MACH_SUN8I_H3=y CONFIG_DRAM_CLK=624 -CONFIG_DRAM_ODT_EN=y # CONFIG_VIDEO_DE2 is not set CONFIG_SPL_SPI_SUNXI=y CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_zero_plus2_defconfig b/configs/orangepi_zero_plus2_defconfig index e62b3cb1504..ab0d12e750a 100644 --- a/configs/orangepi_zero_plus2_defconfig +++ b/configs/orangepi_zero_plus2_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=672 CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set CONFIG_MMC0_CD_PIN="PH13" CONFIG_MMC_SUNXI_SLOT_EXTRA=2 CONFIG_NR_DRAM_BANKS=1 diff --git a/configs/orangepi_zero_plus_defconfig b/configs/orangepi_zero_plus_defconfig index cc8b8c7f9ab..37ca6dff374 100644 --- a/configs/orangepi_zero_plus_defconfig +++ b/configs/orangepi_zero_plus_defconfig @@ -4,6 +4,7 @@ CONFIG_SPL=y CONFIG_MACH_SUN50I_H5=y CONFIG_DRAM_CLK=624 CONFIG_DRAM_ZQ=3881977 +# CONFIG_DRAM_ODT_EN is not set CONFIG_NR_DRAM_BANKS=1 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set # CONFIG_CMD_FLASH is not set From 067e0b9684d4f195d92e0b1de260d69dc1e0f2c5 Mon Sep 17 00:00:00 2001 From: Andre Przywara Date: Sun, 16 Dec 2018 02:04:58 +0000 Subject: [PATCH 7/7] sunxi: Allow booting from 128KB SD/eMMC offset On modern Allwinner SoCs (tested: H2+, A64, H5, H6) the BootROM can actually load the SPL also from sector 256 (128KB) of an SD card or eMMC chip. For more details, see [1]. In this case the boot source indicator (written at offset 0x28 of SRAM A1) has bit 4 set, so it's 0x10 for SD card and 0x12 for eMMC. Add those new values to the existing boot source check to allow booting the SPL from those "high" disk offsets as well. For this to work, the value of CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR needs to be adjusted, for instance to 0x140 (right after the high SPL). Doing this dynamically sounds desirable, but looks nasty to implement. [1] https://groups.google.com/forum/#!topic/linux-sunxi/MaiijyaAFjk Signed-off-by: Andre Przywara Acked-by: Maxime Ripard --- arch/arm/include/asm/arch-sunxi/spl.h | 2 ++ arch/arm/mach-sunxi/board.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/include/asm/arch-sunxi/spl.h b/arch/arm/include/asm/arch-sunxi/spl.h index 4baba38b004..8c916e8c752 100644 --- a/arch/arm/include/asm/arch-sunxi/spl.h +++ b/arch/arm/include/asm/arch-sunxi/spl.h @@ -28,6 +28,8 @@ #define SUNXI_BOOTED_FROM_NAND 1 #define SUNXI_BOOTED_FROM_MMC2 2 #define SUNXI_BOOTED_FROM_SPI 3 +#define SUNXI_BOOTED_FROM_MMC0_HIGH 0x10 +#define SUNXI_BOOTED_FROM_MMC2_HIGH 0x12 /* boot head definition from sun4i boot code */ struct boot_file_head { diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index b74eaf2a0e4..c6dd7b8e54b 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -240,10 +240,12 @@ uint32_t sunxi_get_boot_device(void) boot_source = readb(SPL_ADDR + 0x28); switch (boot_source) { case SUNXI_BOOTED_FROM_MMC0: + case SUNXI_BOOTED_FROM_MMC0_HIGH: return BOOT_DEVICE_MMC1; case SUNXI_BOOTED_FROM_NAND: return BOOT_DEVICE_NAND; case SUNXI_BOOTED_FROM_MMC2: + case SUNXI_BOOTED_FROM_MMC2_HIGH: return BOOT_DEVICE_MMC2; case SUNXI_BOOTED_FROM_SPI: return BOOT_DEVICE_SPI;