arm: dts: keystone: Non-functional changes sync with v6.3-rc6

This is a collection of all the whitespace, renames, comment, and other
changes that should not change the DT functionality from Linux v6.3-rc6.

Signed-off-by: Andrew Davis <afd@ti.com>
This commit is contained in:
Andrew Davis 2023-04-11 13:25:09 -05:00 committed by Tom Rini
parent a39f2a54dd
commit db5a3bda50
17 changed files with 159 additions and 156 deletions

View File

@ -48,7 +48,7 @@ clocks {
clock-output-names = "gemtraceclk"; clock-output-names = "gemtraceclk";
}; };
chipstmxptclk: chipstmxptclk { chipstmxptclk: chipstmxptclk@2310164 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,pll-divider-clock"; compatible = "ti,keystone,pll-divider-clock";
clocks = <&mainmuxclk>; clocks = <&mainmuxclk>;
@ -157,7 +157,7 @@ clocks {
clock-output-names = "chipclk1rstiso112"; clock-output-names = "chipclk1rstiso112";
}; };
clkmodrst0: clkmodrst0 { clkmodrst0: clkmodrst0@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>; clocks = <&chipclk16>;
@ -168,7 +168,7 @@ clocks {
}; };
clkusb: clkusb { clkusb: clkusb@2350008 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>; clocks = <&chipclk16>;
@ -178,7 +178,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkaemifspi: clkaemifspi { clkaemifspi: clkaemifspi@235000c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>; clocks = <&chipclk16>;
@ -189,7 +189,7 @@ clocks {
}; };
clkdebugsstrc: clkdebugsstrc { clkdebugsstrc: clkdebugsstrc@2350014 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -199,7 +199,7 @@ clocks {
domain-id = <1>; domain-id = <1>;
}; };
clktetbtrc: clktetbtrc { clktetbtrc: clktetbtrc@2350018 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -209,7 +209,7 @@ clocks {
domain-id = <1>; domain-id = <1>;
}; };
clkpa: clkpa { clkpa: clkpa@235001c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&paclk13>; clocks = <&paclk13>;
@ -219,7 +219,7 @@ clocks {
domain-id = <2>; domain-id = <2>;
}; };
clkcpgmac: clkcpgmac { clkcpgmac: clkcpgmac@2350020 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkpa>; clocks = <&clkpa>;
@ -229,7 +229,7 @@ clocks {
domain-id = <2>; domain-id = <2>;
}; };
clksa: clksa { clksa: clksa@2350024 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkpa>; clocks = <&clkpa>;
@ -239,7 +239,7 @@ clocks {
domain-id = <2>; domain-id = <2>;
}; };
clkpcie: clkpcie { clkpcie: clkpcie@2350028 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -249,7 +249,7 @@ clocks {
domain-id = <3>; domain-id = <3>;
}; };
clksr: clksr { clksr: clksr@2350034 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1rstiso112>; clocks = <&chipclk1rstiso112>;
@ -259,7 +259,7 @@ clocks {
domain-id = <6>; domain-id = <6>;
}; };
clkgem0: clkgem0 { clkgem0: clkgem0@235003c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -269,7 +269,7 @@ clocks {
domain-id = <8>; domain-id = <8>;
}; };
clkddr30: clkddr30 { clkddr30: clkddr30@235005c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -279,7 +279,7 @@ clocks {
domain-id = <16>; domain-id = <16>;
}; };
clkwdtimer0: clkwdtimer0 { clkwdtimer0: clkwdtimer0@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -289,7 +289,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkwdtimer1: clkwdtimer1 { clkwdtimer1: clkwdtimer1@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -299,7 +299,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkwdtimer2: clkwdtimer2 { clkwdtimer2: clkwdtimer2@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -309,7 +309,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkwdtimer3: clkwdtimer3 { clkwdtimer3: clkwdtimer3@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -319,7 +319,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clktimer15: clktimer15 { clktimer15: clktimer15@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -329,7 +329,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkuart0: clkuart0 { clkuart0: clkuart0@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -339,7 +339,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkuart1: clkuart1 { clkuart1: clkuart1@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -349,7 +349,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkaemif: clkaemif { clkaemif: clkaemif@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkaemifspi>; clocks = <&clkaemifspi>;
@ -359,7 +359,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkusim: clkusim { clkusim: clkusim@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -369,7 +369,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clki2c: clki2c { clki2c: clki2c@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -379,7 +379,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkspi: clkspi { clkspi: clkspi@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkaemifspi>; clocks = <&clkaemifspi>;
@ -389,7 +389,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkgpio: clkgpio { clkgpio: clkgpio@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -399,7 +399,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkkeymgr: clkkeymgr { clkkeymgr: clkkeymgr@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;

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@ -32,7 +32,7 @@ clocks {
reg-names = "control"; reg-names = "control";
}; };
clkusb1: clkusb1 { clkusb1: clkusb1@2350004 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>; clocks = <&chipclk16>;
@ -42,7 +42,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkhyperlink0: clkhyperlink0 { clkhyperlink0: clkhyperlink0@2350030 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -52,7 +52,7 @@ clocks {
domain-id = <5>; domain-id = <5>;
}; };
clkpcie1: clkpcie1 { clkpcie1: clkpcie1@235006c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -62,7 +62,7 @@ clocks {
domain-id = <18>; domain-id = <18>;
}; };
clkxge: clkxge { clkxge: clkxge@23500c8 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;

View File

@ -10,7 +10,7 @@
#include "keystone-k2e.dtsi" #include "keystone-k2e.dtsi"
/ { / {
compatible = "ti,k2e-evm","ti,keystone"; compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
model = "Texas Instruments Keystone 2 Edison EVM"; model = "Texas Instruments Keystone 2 Edison EVM";
soc { soc {
@ -117,7 +117,7 @@
&spi0 { &spi0 {
status = "okay"; status = "okay";
nor_flash: n25q128a11@0 { nor_flash: flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "Micron,n25q128a11", "jedec,spi-nor"; compatible = "Micron,n25q128a11", "jedec,spi-nor";

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@ -12,9 +12,9 @@ qmss: qmss@2a40000 {
#size-cells = <1>; #size-cells = <1>;
clocks = <&chipclk13>; clocks = <&chipclk13>;
ranges; ranges;
queue-range = <0 0x2000>; queue-range = <0 0x2000>;
linkram0 = <0x100000 0x4000>; linkram0 = <0x100000 0x4000>;
linkram1 = <0 0x10000>; linkram1 = <0 0x10000>;
qmgrs { qmgrs {
#address-cells = <1>; #address-cells = <1>;
@ -135,40 +135,40 @@ netcp: netcp@24000000 {
interfaces { interfaces {
gbe0: interface-0 { gbe0: interface-0 {
slave-port = <0>; slave-port = <0>;
link-interface = <1>; link-interface = <1>;
phy-handle = <&ethphy0>; phy-handle = <&ethphy0>;
}; };
gbe1: interface-1 { gbe1: interface-1 {
slave-port = <1>; slave-port = <1>;
link-interface = <1>; link-interface = <1>;
phy-handle = <&ethphy1>; phy-handle = <&ethphy1>;
}; };
}; };
secondary-slave-ports { secondary-slave-ports {
port-2 { port-2 {
slave-port = <2>; slave-port = <2>;
link-interface = <2>; link-interface = <2>;
}; };
port-3 { port-3 {
slave-port = <3>; slave-port = <3>;
link-interface = <2>; link-interface = <2>;
}; };
port-4 { port-4 {
slave-port = <4>; slave-port = <4>;
link-interface = <2>; link-interface = <2>;
}; };
port-5 { port-5 {
slave-port = <5>; slave-port = <5>;
link-interface = <2>; link-interface = <2>;
}; };
port-6 { port-6 {
slave-port = <6>; slave-port = <6>;
link-interface = <2>; link-interface = <2>;
}; };
port-7 { port-7 {
slave-port = <7>; slave-port = <7>;
link-interface = <2>; link-interface = <2>;
}; };
}; };
}; };

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@ -42,7 +42,7 @@
usb: usb@2680000 { usb: usb@2680000 {
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
dwc3@2690000 { usb@2690000 {
interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
}; };
}; };
@ -68,7 +68,7 @@
dma-ranges; dma-ranges;
status = "disabled"; status = "disabled";
dwc3@25010000 { usb@25010000 {
compatible = "synopsys,dwc3"; compatible = "synopsys,dwc3";
reg = <0x25010000 0x70000>; reg = <0x25010000 0x70000>;
interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
@ -89,7 +89,7 @@
clock-names = "pcie"; clock-names = "pcie";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>; reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
ranges = <0x81000000 0 0 0x23260000 0x4000 0x4000 ranges = <0x81000000 0 0 0x23260000 0x4000 0x4000
0x82000000 0 0x60000000 0x60000000 0 0x10000000>; 0x82000000 0 0x60000000 0x60000000 0 0x10000000>;
@ -130,14 +130,14 @@
}; };
mdio: mdio@24200f00 { mdio: mdio@24200f00 {
compatible = "ti,keystone_mdio", "ti,davinci_mdio"; compatible = "ti,keystone_mdio", "ti,davinci_mdio";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x24200f00 0x100>; reg = <0x24200f00 0x100>;
status = "disabled"; status = "disabled";
clocks = <&clkcpgmac>; clocks = <&clkcpgmac>;
clock-names = "fck"; clock-names = "fck";
bus_freq = <2500000>; bus_freq = <2500000>;
}; };
/include/ "keystone-k2e-netcp.dtsi" /include/ "keystone-k2e-netcp.dtsi"
}; };

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@ -90,8 +90,8 @@
&qspi { &qspi {
status = "okay"; status = "okay";
flash0: m25p80@0 { flash0: flash@0 {
compatible = "s25fl512s","jedec,spi-nor"; compatible = "s25fl512s", "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-tx-bus-width = <1>; spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>; spi-rx-bus-width = <4>;

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@ -38,7 +38,7 @@
&qspi { &qspi {
status = "okay"; status = "okay";
flash0: m25p80@0 { flash0: flash@0 {
compatible = "s25fl256s1", "jedec,spi-nor"; compatible = "s25fl256s1", "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-tx-bus-width = <1>; spi-tx-bus-width = <1>;

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@ -14,8 +14,8 @@ qmss: qmss@4020000 {
/* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_VCLK>; */ /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_VCLK>; */
clock-names = "nss_vclk"; clock-names = "nss_vclk";
ranges; ranges;
queue-range = <0 0x80>; queue-range = <0 0x80>;
linkram0 = <0x4020000 0x7ff>; linkram0 = <0x4020000 0x7ff>;
qmgrs { qmgrs {
#address-cells = <1>; #address-cells = <1>;
@ -77,12 +77,12 @@ knav_dmas: knav_dmas@0 {
dma_gbe: dma_gbe@0 { dma_gbe: dma_gbe@0 {
reg = <0x4010000 0x100>, reg = <0x4010000 0x100>,
<0x4011000 0x2a0>, /* 21 Tx channels */ <0x4011000 0x2a0>, /* 21 Tx channels */
<0x4012000 0x400>, /* 32 Rx channels */ <0x4012000 0x400>, /* 32 Rx channels */
<0x4010100 0x80>, <0x4010100 0x80>,
<0x4013000 0x400>; /* 32 Rx flows */ <0x4013000 0x400>; /* 32 Rx flows */
reg-names = "global", "txchan", "rxchan", reg-names = "global", "txchan", "rxchan",
"txsched", "rxflow"; "txsched", "rxflow";
}; };
}; };
@ -96,9 +96,9 @@ netcp: netcp@4000000 {
reg = <0x2620110 0x8>; reg = <0x2620110 0x8>;
reg-names = "efuse"; reg-names = "efuse";
compatible = "ti,netcp-1.0"; compatible = "ti,netcp-1.0";
status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
status = "disabled";
/* power-domains = <&k2g_pds K2G_DEV_NSS0>; */ /* power-domains = <&k2g_pds K2G_DEV_NSS0>; */
/* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */ /* clocks = <&k2g_clks K2G_DEV_NSS0 K2G_DEV_NSS_ESW_CLK>; */
clock-names = "ethss_clk"; clock-names = "ethss_clk";
@ -127,7 +127,7 @@ netcp: netcp@4000000 {
interfaces { interfaces {
gbe0: interface-0 { gbe0: interface-0 {
slave-port = <0>; slave-port = <0>;
link-interface = <5>; link-interface = <5>;
}; };
}; };
}; };

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@ -40,7 +40,7 @@
}; };
}; };
gic: interrupt-controller { gic: interrupt-controller@2561000 {
compatible = "arm,cortex-a15-gic"; compatible = "arm,cortex-a15-gic";
#interrupt-cells = <3>; #interrupt-cells = <3>;
interrupt-controller; interrupt-controller;

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@ -50,7 +50,7 @@ clocks {
reg-names = "control"; reg-names = "control";
}; };
clktsip: clktsip { clktsip: clktsip@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk16>; clocks = <&chipclk16>;
@ -60,7 +60,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clksrio: clksrio { clksrio: clksrio@235002c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1rstiso13>; clocks = <&chipclk1rstiso13>;
@ -70,7 +70,7 @@ clocks {
domain-id = <4>; domain-id = <4>;
}; };
clkhyperlink0: clkhyperlink0 { clkhyperlink0: clkhyperlink0@2350030 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -80,7 +80,7 @@ clocks {
domain-id = <5>; domain-id = <5>;
}; };
clkgem1: clkgem1 { clkgem1: clkgem1@2350040 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -90,7 +90,7 @@ clocks {
domain-id = <9>; domain-id = <9>;
}; };
clkgem2: clkgem2 { clkgem2: clkgem2@2350044 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -100,7 +100,7 @@ clocks {
domain-id = <10>; domain-id = <10>;
}; };
clkgem3: clkgem3 { clkgem3: clkgem3@2350048 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -110,7 +110,7 @@ clocks {
domain-id = <11>; domain-id = <11>;
}; };
clkgem4: clkgem4 { clkgem4: clkgem4@235004c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -120,7 +120,7 @@ clocks {
domain-id = <12>; domain-id = <12>;
}; };
clkgem5: clkgem5 { clkgem5: clkgem5@2350050 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -130,7 +130,7 @@ clocks {
domain-id = <13>; domain-id = <13>;
}; };
clkgem6: clkgem6 { clkgem6: clkgem6@2350054 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -140,7 +140,7 @@ clocks {
domain-id = <14>; domain-id = <14>;
}; };
clkgem7: clkgem7 { clkgem7: clkgem7@2350058 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -150,7 +150,7 @@ clocks {
domain-id = <15>; domain-id = <15>;
}; };
clkddr31: clkddr31 { clkddr31: clkddr31@2350060 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -160,7 +160,7 @@ clocks {
domain-id = <16>; domain-id = <16>;
}; };
clktac: clktac { clktac: clktac@2350064 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -170,7 +170,7 @@ clocks {
domain-id = <17>; domain-id = <17>;
}; };
clkrac01: clkrac01 { clkrac01: clkrac01@2350068 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -180,7 +180,7 @@ clocks {
domain-id = <17>; domain-id = <17>;
}; };
clkrac23: clkrac23 { clkrac23: clkrac23@235006c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -190,7 +190,7 @@ clocks {
domain-id = <18>; domain-id = <18>;
}; };
clkfftc0: clkfftc0 { clkfftc0: clkfftc0@2350070 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -200,7 +200,7 @@ clocks {
domain-id = <19>; domain-id = <19>;
}; };
clkfftc1: clkfftc1 { clkfftc1: clkfftc1@2350074 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -210,7 +210,7 @@ clocks {
domain-id = <19>; domain-id = <19>;
}; };
clkfftc2: clkfftc2 { clkfftc2: clkfftc2@2350078 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -220,7 +220,7 @@ clocks {
domain-id = <20>; domain-id = <20>;
}; };
clkfftc3: clkfftc3 { clkfftc3: clkfftc3@235007c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -230,7 +230,7 @@ clocks {
domain-id = <20>; domain-id = <20>;
}; };
clkfftc4: clkfftc4 { clkfftc4: clkfftc4@2350080 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -240,7 +240,7 @@ clocks {
domain-id = <20>; domain-id = <20>;
}; };
clkfftc5: clkfftc5 { clkfftc5: clkfftc5@2350084 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -250,7 +250,7 @@ clocks {
domain-id = <20>; domain-id = <20>;
}; };
clkaif: clkaif { clkaif: clkaif@2350088 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -260,7 +260,7 @@ clocks {
domain-id = <21>; domain-id = <21>;
}; };
clktcp3d0: clktcp3d0 { clktcp3d0: clktcp3d0@235008c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -270,7 +270,7 @@ clocks {
domain-id = <22>; domain-id = <22>;
}; };
clktcp3d1: clktcp3d1 { clktcp3d1: clktcp3d1@2350090 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -280,7 +280,7 @@ clocks {
domain-id = <22>; domain-id = <22>;
}; };
clktcp3d2: clktcp3d2 { clktcp3d2: clktcp3d2@2350094 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -290,7 +290,7 @@ clocks {
domain-id = <23>; domain-id = <23>;
}; };
clktcp3d3: clktcp3d3 { clktcp3d3: clktcp3d3@2350098 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -300,7 +300,7 @@ clocks {
domain-id = <23>; domain-id = <23>;
}; };
clkvcp0: clkvcp0 { clkvcp0: clkvcp0@235009c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -310,7 +310,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkvcp1: clkvcp1 { clkvcp1: clkvcp1@23500a0 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -320,7 +320,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkvcp2: clkvcp2 { clkvcp2: clkvcp2@23500a4 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -330,7 +330,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkvcp3: clkvcp3 { clkvcp3: clkvcp3@23500a8 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -340,7 +340,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkvcp4: clkvcp4 { clkvcp4: clkvcp4@23500ac {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -350,7 +350,7 @@ clocks {
domain-id = <25>; domain-id = <25>;
}; };
clkvcp5: clkvcp5 { clkvcp5: clkvcp5@23500b0 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -360,7 +360,7 @@ clocks {
domain-id = <25>; domain-id = <25>;
}; };
clkvcp6: clkvcp6 { clkvcp6: clkvcp6@23500b4 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -370,7 +370,7 @@ clocks {
domain-id = <25>; domain-id = <25>;
}; };
clkvcp7: clkvcp7 { clkvcp7: clkvcp7@23500b8 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -380,7 +380,7 @@ clocks {
domain-id = <25>; domain-id = <25>;
}; };
clkbcp: clkbcp { clkbcp: clkbcp@23500bc {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -390,7 +390,7 @@ clocks {
domain-id = <26>; domain-id = <26>;
}; };
clkdxb: clkdxb { clkdxb: clkdxb@23500c0 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -400,7 +400,7 @@ clocks {
domain-id = <27>; domain-id = <27>;
}; };
clkhyperlink1: clkhyperlink1 { clkhyperlink1: clkhyperlink1@23500c4 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -410,7 +410,7 @@ clocks {
domain-id = <28>; domain-id = <28>;
}; };
clkxge: clkxge { clkxge: clkxge@23500c8 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;

View File

@ -54,22 +54,22 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
debug1_1 { led-debug-1-1 {
label = "keystone:green:debug1"; label = "keystone:green:debug1";
gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */ gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>; /* 12 */
}; };
debug1_2 { led-debug-1-2 {
label = "keystone:red:debug1"; label = "keystone:red:debug1";
gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */ gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>; /* 13 */
}; };
debug2 { led-debug-2 {
label = "keystone:blue:debug2"; label = "keystone:blue:debug2";
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */ gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; /* 14 */
}; };
debug3 { led-debug-3 {
label = "keystone:blue:debug3"; label = "keystone:blue:debug3";
gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */ gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>; /* 15 */
}; };
@ -145,7 +145,7 @@
&spi0 { &spi0 {
status = "okay"; status = "okay";
nor_flash: n25q128a11@0 { nor_flash: flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "Micron,n25q128a11", "jedec,spi-nor"; compatible = "Micron,n25q128a11", "jedec,spi-nor";

View File

@ -12,9 +12,9 @@ qmss: qmss@2a40000 {
#size-cells = <1>; #size-cells = <1>;
clocks = <&chipclk13>; clocks = <&chipclk13>;
ranges; ranges;
queue-range = <0 0x4000>; queue-range = <0 0x4000>;
linkram0 = <0x100000 0x8000>; linkram0 = <0x100000 0x8000>;
linkram1 = <0x0 0x10000>; linkram1 = <0x0 0x10000>;
qmgrs { qmgrs {
#address-cells = <1>; #address-cells = <1>;
@ -44,6 +44,7 @@ qmss: qmss@2a40000 {
"region", "push", "pop"; "region", "push", "pop";
}; };
}; };
queue-pools { queue-pools {
qpend { qpend {
qpend-0 { qpend-0 {
@ -86,6 +87,7 @@ qmss: qmss@2a40000 {
}; };
}; };
}; };
descriptor-regions { descriptor-regions {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
@ -126,7 +128,7 @@ netcp: netcp@2000000 {
#size-cells = <1>; #size-cells = <1>;
/* NetCP address range */ /* NetCP address range */
ranges = <0 0x2000000 0x100000>; ranges = <0 0x2000000 0x100000>;
clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>; clocks = <&papllclk>, <&clkcpgmac>, <&chipclk12>;
dma-coherent; dma-coherent;
@ -166,11 +168,11 @@ netcp: netcp@2000000 {
secondary-slave-ports { secondary-slave-ports {
port-2 { port-2 {
slave-port = <2>; slave-port = <2>;
link-interface = <2>; link-interface = <2>;
}; };
port-3 { port-3 {
slave-port = <3>; slave-port = <3>;
link-interface = <2>; link-interface = <2>;
}; };
}; };
}; };

View File

@ -41,7 +41,7 @@ clocks {
reg-names = "control"; reg-names = "control";
}; };
clkdfeiqnsys: clkdfeiqnsys { clkdfeiqnsys: clkdfeiqnsys@2350004 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -51,7 +51,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkpcie1: clkpcie1 { clkpcie1: clkpcie1@235002c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk12>; clocks = <&chipclk12>;
@ -61,7 +61,7 @@ clocks {
domain-id = <4>; domain-id = <4>;
}; };
clkgem1: clkgem1 { clkgem1: clkgem1@2350040 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -71,7 +71,7 @@ clocks {
domain-id = <9>; domain-id = <9>;
}; };
clkgem2: clkgem2 { clkgem2: clkgem2@2350044 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -81,7 +81,7 @@ clocks {
domain-id = <10>; domain-id = <10>;
}; };
clkgem3: clkgem3 { clkgem3: clkgem3@2350048 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk1>; clocks = <&chipclk1>;
@ -91,7 +91,7 @@ clocks {
domain-id = <11>; domain-id = <11>;
}; };
clktac: clktac { clktac: clktac@2350064 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -101,7 +101,7 @@ clocks {
domain-id = <17>; domain-id = <17>;
}; };
clkrac: clkrac { clkrac: clkrac@2350068 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -111,7 +111,7 @@ clocks {
domain-id = <17>; domain-id = <17>;
}; };
clkdfepd0: clkdfepd0 { clkdfepd0: clkdfepd0@235006c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -121,7 +121,7 @@ clocks {
domain-id = <18>; domain-id = <18>;
}; };
clkfftc0: clkfftc0 { clkfftc0: clkfftc0@2350070 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -131,7 +131,7 @@ clocks {
domain-id = <19>; domain-id = <19>;
}; };
clkosr: clkosr { clkosr: clkosr@2350088 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -141,7 +141,7 @@ clocks {
domain-id = <21>; domain-id = <21>;
}; };
clktcp3d0: clktcp3d0 { clktcp3d0: clktcp3d0@235008c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -151,7 +151,7 @@ clocks {
domain-id = <22>; domain-id = <22>;
}; };
clktcp3d1: clktcp3d1 { clktcp3d1: clktcp3d1@2350094 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -161,7 +161,7 @@ clocks {
domain-id = <23>; domain-id = <23>;
}; };
clkvcp0: clkvcp0 { clkvcp0: clkvcp0@235009c {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -171,7 +171,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkvcp1: clkvcp1 { clkvcp1: clkvcp1@23500a0 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -181,7 +181,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkvcp2: clkvcp2 { clkvcp2: clkvcp2@23500a4 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -191,7 +191,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkvcp3: clkvcp3 { clkvcp3: clkvcp3@23500a8 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -201,7 +201,7 @@ clocks {
domain-id = <24>; domain-id = <24>;
}; };
clkbcp: clkbcp { clkbcp: clkbcp@23500bc {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -211,7 +211,7 @@ clocks {
domain-id = <26>; domain-id = <26>;
}; };
clkdfepd1: clkdfepd1 { clkdfepd1: clkdfepd1@23500c0 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -221,7 +221,7 @@ clocks {
domain-id = <27>; domain-id = <27>;
}; };
clkfftc1: clkfftc1 { clkfftc1: clkfftc1@23500c4 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -231,7 +231,7 @@ clocks {
domain-id = <28>; domain-id = <28>;
}; };
clkiqnail: clkiqnail { clkiqnail: clkiqnail@23500c8 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&chipclk13>; clocks = <&chipclk13>;
@ -241,7 +241,7 @@ clocks {
domain-id = <29>; domain-id = <29>;
}; };
clkuart2: clkuart2 { clkuart2: clkuart2@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;
@ -251,7 +251,7 @@ clocks {
domain-id = <0>; domain-id = <0>;
}; };
clkuart3: clkuart3 { clkuart3: clkuart3@2350000 {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "ti,keystone,psc-clock"; compatible = "ti,keystone,psc-clock";
clocks = <&clkmodrst0>; clocks = <&clkmodrst0>;

View File

@ -94,7 +94,7 @@
&spi0 { &spi0 {
status ="okay"; status ="okay";
nor_flash: n25q128a11@0 { nor_flash: flash@0 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
compatible = "Micron,n25q128a11", "jedec,spi-nor"; compatible = "Micron,n25q128a11", "jedec,spi-nor";

View File

@ -12,9 +12,9 @@ qmss: qmss@2a40000 {
#size-cells = <1>; #size-cells = <1>;
clocks = <&chipclk13>; clocks = <&chipclk13>;
ranges; ranges;
queue-range = <0 0x2000>; queue-range = <0 0x2000>;
linkram0 = <0x100000 0x4000>; linkram0 = <0x100000 0x4000>;
linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */ linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */
qmgrs { qmgrs {
#address-cells = <1>; #address-cells = <1>;
@ -70,6 +70,7 @@ qmss: qmss@2a40000 {
}; };
}; };
}; };
descriptor-regions { descriptor-regions {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
@ -134,24 +135,24 @@ netcp: netcp@26000000 {
interfaces { interfaces {
gbe0: interface-0 { gbe0: interface-0 {
slave-port = <0>; slave-port = <0>;
link-interface = <1>; link-interface = <1>;
phy-handle = <&ethphy0>; phy-handle = <&ethphy0>;
}; };
gbe1: interface-1 { gbe1: interface-1 {
slave-port = <1>; slave-port = <1>;
link-interface = <1>; link-interface = <1>;
phy-handle = <&ethphy1>; phy-handle = <&ethphy1>;
}; };
}; };
secondary-slave-ports { secondary-slave-ports {
port-2 { port-2 {
slave-port = <2>; slave-port = <2>;
link-interface = <2>; link-interface = <2>;
}; };
port-3 { port-3 {
slave-port = <3>; slave-port = <3>;
link-interface = <2>; link-interface = <2>;
}; };
}; };
}; };

View File

@ -28,23 +28,23 @@
soc { soc {
/include/ "keystone-k2l-clocks.dtsi" /include/ "keystone-k2l-clocks.dtsi"
uart2: serial@02348400 { uart2: serial@2348400 {
compatible = "ns16550a"; compatible = "ns16550a";
current-speed = <115200>; current-speed = <115200>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
reg = <0x02348400 0x100>; reg = <0x02348400 0x100>;
clocks = <&clkuart2>; clocks = <&clkuart2>;
interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 432 IRQ_TYPE_EDGE_RISING>;
}; };
uart3: serial@02348800 { uart3: serial@2348800 {
compatible = "ns16550a"; compatible = "ns16550a";
current-speed = <115200>; current-speed = <115200>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
reg = <0x02348800 0x100>; reg = <0x02348800 0x100>;
clocks = <&clkuart3>; clocks = <&clkuart3>;
interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 435 IRQ_TYPE_EDGE_RISING>;
}; };
@ -77,14 +77,14 @@
}; };
mdio: mdio@26200f00 { mdio: mdio@26200f00 {
compatible = "ti,keystone_mdio", "ti,davinci_mdio"; compatible = "ti,keystone_mdio", "ti,davinci_mdio";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
reg = <0x26200f00 0x100>; reg = <0x26200f00 0x100>;
status = "disabled"; status = "disabled";
clocks = <&clkcpgmac>; clocks = <&clkcpgmac>;
clock-names = "fck"; clock-names = "fck";
bus_freq = <2500000>; bus_freq = <2500000>;
}; };
/include/ "keystone-k2l-netcp.dtsi" /include/ "keystone-k2l-netcp.dtsi"
}; };

View File

@ -91,23 +91,23 @@
/include/ "keystone-clocks.dtsi" /include/ "keystone-clocks.dtsi"
uart0: serial@02530c00 { uart0: serial@2530c00 {
compatible = "ns16550a"; compatible = "ns16550a";
current-speed = <115200>; current-speed = <115200>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
reg = <0x02530c00 0x100>; reg = <0x02530c00 0x100>;
clocks = <&clkuart0>; clocks = <&clkuart0>;
interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 277 IRQ_TYPE_EDGE_RISING>;
}; };
uart1: serial@02531000 { uart1: serial@2531000 {
compatible = "ns16550a"; compatible = "ns16550a";
current-speed = <115200>; current-speed = <115200>;
reg-shift = <2>; reg-shift = <2>;
reg-io-width = <4>; reg-io-width = <4>;
reg = <0x02531000 0x100>; reg = <0x02531000 0x100>;
clocks = <&clkuart1>; clocks = <&clkuart1>;
interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 280 IRQ_TYPE_EDGE_RISING>;
}; };
@ -195,7 +195,7 @@
dma-ranges; dma-ranges;
status = "disabled"; status = "disabled";
dwc3@2690000 { usb@2690000 {
compatible = "synopsys,dwc3"; compatible = "synopsys,dwc3";
reg = <0x2690000 0x70000>; reg = <0x2690000 0x70000>;
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
@ -203,7 +203,7 @@
}; };
}; };
wdt: wdt@022f0080 { wdt: wdt@22f0080 {
compatible = "ti,keystone-wdt","ti,davinci-wdt"; compatible = "ti,keystone-wdt","ti,davinci-wdt";
reg = <0x022f0080 0x80>; reg = <0x022f0080 0x80>;
clocks = <&clkwdtimer0>; clocks = <&clkwdtimer0>;
@ -287,7 +287,7 @@
clock-names = "pcie"; clock-names = "pcie";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>; reg = <0x21801000 0x2000>, <0x21800000 0x1000>, <0x02620128 4>;
ranges = <0x81000000 0 0 0x23250000 0 0x4000 ranges = <0x81000000 0 0 0x23250000 0 0x4000
0x82000000 0 0x50000000 0x50000000 0 0x10000000>; 0x82000000 0 0x50000000 0x50000000 0 0x10000000>;