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- odroid-n2: Update docs for signing

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- support Amlogic chip_id v1 and v2
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Merge tag 'u-boot-amlogic-20250318' of https://source.denx.de/u-boot/custodians/u-boot-amlogic into next

- odroid-n2: Update docs for signing
- support Amlogic chip_id v1 and v2
This commit is contained in:
Tom Rini 2025-03-18 11:03:28 -06:00
commit d92c29f89d
5 changed files with 183 additions and 29 deletions
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14
arch/arm/include/asm/arch-meson/boot.h
View File

@ -21,4 +21,18 @@ int meson_get_boot_device(void);
int meson_get_soc_rev(char *buff, size_t buff_len);
/**
* meson_get_socinfo - retrieve cpu_id of the Amlogic SoC
*
* The value in the following format is read from register:
* +-----------+------------+------------+------------+
* | family_id | package_id | chip_rev | layout_rev |
* +-----------+------------+------------+------------+
* | 31 24 | 23 16 | 15 8 | 7 0 |
* +-----------+------------+------------+------------+
*
* Return: 4 bytes value of cpu_id on success or 0 on failure.
*/
u32 meson_get_socinfo(void);
#endif /* __MESON_BOOT_H__ */

48
arch/arm/include/asm/arch-meson/sm.h
View File

@ -6,6 +6,8 @@
#ifndef __MESON_SM_H__
#define __MESON_SM_H__
#include <asm/types.h>
/**
* meson_sm_read_efuse - read efuse memory into buffer
*
@ -27,16 +29,60 @@ ssize_t meson_sm_read_efuse(uintptr_t offset, void *buffer, size_t size);
ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size);
#define SM_SERIAL_SIZE 12
#define MESON_CPU_ID_SZ 4
#define MESON_CHIP_ID_SZ 16
/**
* meson_sm_get_serial - read chip unique id into buffer
* union meson_cpu_id - Amlogic cpu_id.
* @raw: buffer to hold the cpu_id value as sequential bytes.
* @val: cpu_id represented as 32 bit value.
*/
union meson_cpu_id {
u8 raw[MESON_CPU_ID_SZ];
u32 val;
};
/**
* struct meson_sm_chip_id - Amlogic chip_id.
* @cpu_id: cpu_id value, which is distinct from socinfo in that the order of
* PACK & MINOR bytes are swapped according to Amlogic chip_id format.
* @serial: 12 byte unique SoC number, identifying particular die, read
* usually from efuse OTP storage. Serial comes in little-endian
* order.
*/
struct meson_sm_chip_id {
union meson_cpu_id cpu_id;
u8 serial[SM_SERIAL_SIZE];
};
/**
* meson_sm_get_serial - read chip unique serial (OTP data) into buffer
*
* @buffer: pointer to buffer
* @size: buffer size.
*
* Serial is returned in big-endian order.
*
* @return: zero on success or -errno on failure
*/
int meson_sm_get_serial(void *buffer, size_t size);
/**
* meson_sm_get_chip_id - read Amlogic chip_id
*
* @chip_id: pointer to buffer capable to hold the struct meson_sm_chip_id
*
* Amlogic SoCs support 2 versions of chip_id. Function requests the newest
* one (v2), but if chip_id v2 is not supported, then secure monitor returns
* v1. All differences between v1 and v2 versions are handled by this function
* and chip_id is returned in unified format.
*
* chip_id contains serial, which is returned here in little-endian order.
*
* @return: 0 on success or -errno on failure
*/
int meson_sm_get_chip_id(struct meson_sm_chip_id *chip_id);
enum {
REBOOT_REASON_COLD = 0,
REBOOT_REASON_NORMAL = 1,

13
arch/arm/mach-meson/board-info.c
View File

@ -7,6 +7,7 @@
#include <init.h>
#include <asm/global_data.h>
#include <asm/io.h>
#include <asm/types.h>
#include <dm.h>
#include <linux/bitfield.h>
#include <regmap.h>
@ -125,12 +126,12 @@ static const char *socinfo_to_soc_id(u32 socinfo)
return "Unknown";
}
static unsigned int get_socinfo(void)
u32 meson_get_socinfo(void)
{
struct regmap *regmap;
int nodeoffset, ret;
ofnode node;
unsigned int socinfo;
u32 socinfo;
/* find the offset of compatible node */
nodeoffset = fdt_node_offset_by_compatible(gd->fdt_blob, -1,
@ -162,9 +163,9 @@ static unsigned int get_socinfo(void)
int checkboard(void)
{
unsigned int socinfo;
u32 socinfo;
socinfo = get_socinfo();
socinfo = meson_get_socinfo();
if (!socinfo)
return 0;
@ -181,9 +182,9 @@ int checkboard(void)
int meson_get_soc_rev(char *buff, size_t buff_len)
{
unsigned int socinfo;
u32 socinfo;
socinfo = get_socinfo();
socinfo = meson_get_socinfo();
if (!socinfo)
return -1;

122
arch/arm/mach-meson/sm.c
View File

@ -10,11 +10,13 @@
#include <regmap.h>
#include <sm.h>
#include <syscon.h>
#include <asm/arch/boot.h>
#include <asm/arch/sm.h>
#include <asm/cache.h>
#include <asm/global_data.h>
#include <asm/ptrace.h>
#include <linux/bitops.h>
#include <linux/compiler_attributes.h>
#include <linux/err.h>
#include <linux/kernel.h>
#include <linux/bitfield.h>
@ -76,31 +78,131 @@ ssize_t meson_sm_write_efuse(uintptr_t offset, void *buffer, size_t size)
return err;
}
#define SM_CHIP_ID_LENGTH 119
#define SM_CHIP_ID_OFFSET 4
#define SM_CHIP_ID_SIZE 12
/*
* Helps to handle two flavors of cpu_id layouts:
*
* - in-register view (value read from cpu_id reg, a.k.a. socinfo):
* +-----------+------------+------------+------------+
* | family_id | package_id | chip_rev | layout_rev |
* +-----------+------------+------------+------------+
* | 31 24 | 23 16 | 15 8 | 7 0 |
* +-----------+------------+------------+------------+
*
* - in-efuse view (value, residing inside efuse/shmem data usually for
* chip_id v2. Chip_id v1 does not contain cpu_id value inside efuse
* data (i.e. in chip_id_efuse)):
* +-----------+------------+------------+------------+
* | family_id | chip_rev | package_id | layout_rev |
* +-----------+------------+------------+------------+
* | 31 24 | 23 16 | 15 8 | 7 0 |
* +-----------+------------+------------+------------+
*/
enum {
/* In-register view of cpu_id */
CPU_ID_REG_MAJOR, /* 31-24 bits */
CPU_ID_REG_PACK, /* 23-16 bits */
CPU_ID_REG_MINOR, /* 15-8 bits */
CPU_ID_REG_MISC, /* 7-0 bits */
int meson_sm_get_serial(void *buffer, size_t size)
/* In-efuse view of cpu_id */
CPU_ID_MAJOR = CPU_ID_REG_MAJOR,
CPU_ID_PACK = CPU_ID_REG_MINOR,
CPU_ID_MINOR = CPU_ID_REG_PACK,
CPU_ID_MISC = CPU_ID_REG_MISC,
};
/*
* This is a beginning chunk of the whole efuse storage area, containing
* data related to chip_id only
*/
struct chip_id_efuse {
u32 version;
u8 raw[MESON_CHIP_ID_SZ]; /* payload */
} __packed;
static void meson_sm_serial_reverse(u8 serial[SM_SERIAL_SIZE])
{
for (int i = 0; i < SM_SERIAL_SIZE / 2; i++) {
int k = SM_SERIAL_SIZE - 1 - i;
swap(serial[i], serial[k]);
}
}
int meson_sm_get_chip_id(struct meson_sm_chip_id *chip_id)
{
struct udevice *dev;
union meson_cpu_id socinfo;
struct pt_regs regs = { 0 };
u8 id_buffer[SM_CHIP_ID_LENGTH];
struct chip_id_efuse chip_id_efuse;
int err;
dev = meson_get_sm_device();
if (IS_ERR(dev))
return PTR_ERR(dev);
err = sm_call_read(dev, id_buffer, SM_CHIP_ID_LENGTH,
MESON_SMC_CMD_CHIP_ID_GET, &regs);
if (err < 0)
pr_err("Failed to read serial number (%d)\n", err);
/*
* Request v2. If not supported by secure monitor, then v1 should be
* returned.
*/
regs.regs[1] = 2;
memcpy(buffer, id_buffer + SM_CHIP_ID_OFFSET, size);
err = sm_call_read(dev, &chip_id_efuse, sizeof(chip_id_efuse),
MESON_SMC_CMD_CHIP_ID_GET, &regs);
if (err < 0) {
pr_err("Failed to read chip_id (%d)\n", err);
return err;
}
if (chip_id_efuse.version == 2) {
memcpy((u8 *)chip_id, chip_id_efuse.raw,
sizeof(struct meson_sm_chip_id));
return 0;
}
/*
* Legacy chip_id (v1) read out, transform data
* to expected order format (little-endian)
*/
memcpy(chip_id->serial, chip_id_efuse.raw, sizeof(chip_id->serial));
meson_sm_serial_reverse(chip_id->serial);
socinfo.val = meson_get_socinfo();
if (!socinfo.val)
return -ENODEV;
chip_id->cpu_id = (union meson_cpu_id){
.raw[CPU_ID_MAJOR] = socinfo.raw[CPU_ID_REG_MAJOR],
.raw[CPU_ID_PACK] = socinfo.raw[CPU_ID_REG_PACK],
.raw[CPU_ID_MINOR] = socinfo.raw[CPU_ID_REG_MINOR],
.raw[CPU_ID_MISC] = socinfo.raw[CPU_ID_REG_MISC],
};
return 0;
}
int meson_sm_get_serial(void *buffer, size_t size)
{
struct meson_sm_chip_id chip_id;
int ret;
if (size < SM_SERIAL_SIZE)
return -EINVAL;
ret = meson_sm_get_chip_id(&chip_id);
if (ret)
return ret;
/*
* The order of serial inside chip_id and serial which function must
* return does not match: stick here to big-endian for backward
* compatibility.
*/
meson_sm_serial_reverse(chip_id.serial);
memcpy(buffer, chip_id.serial, sizeof(chip_id.serial));
return ret;
}
#define AO_SEC_SD_CFG15 0xfc
#define REBOOT_REASON_MASK GENMASK(15, 12)

15
doc/board/amlogic/odroid-n2.rst
View File

@ -54,10 +54,9 @@ image so it is necessary to obtain binaries from sources published by the board
$ tar xvfJ gcc-linaro-arm-none-eabi-4.8-2013.11_linux.tar.xz
$ export PATH=$PWD/gcc-linaro-aarch64-none-elf-4.8-2013.11_linux/bin:$PWD/gcc-linaro-arm-none-eabi-4.8-2013.11_linux/bin:$PATH
$ DIR=odroid-n2
$ git clone --depth 1 https://github.com/hardkernel/u-boot.git -b odroidn2-v2015.01 $DIR
$ git clone --depth 1 https://github.com/hardkernel/u-boot.git -b odroidg12-v2015.01 odroidg12
$ cd odroid-n2
$ cd odroidg12
$ make odroidn2_defconfig
$ make
$ export UBOOTDIR=$PWD
@ -74,12 +73,8 @@ Go back to the mainline U-Boot source tree then:
$ cp $UBOOTDIR/fip/g12b/bl2.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl30.bin fip/
$ cp $UBOOTDIR/fip/g12b/bl31.img fip/
$ cp $UBOOTDIR/fip/g12b/ddr3_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/ddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/ddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12b/diag_lpddr4.fw fip/
$ cp $UBOOTDIR/fip/g12b/lpddr4_1d.fw fip/
$ cp $UBOOTDIR/fip/g12b/lpddr4_2d.fw fip/
$ cp $UBOOTDIR/fip/g12b/piei.fw fip/
$ cp $UBOOTDIR/fip/g12b/aml_ddr.fw fip/
$ cp u-boot.bin fip/bl33.bin
@ -113,7 +108,7 @@ Go back to the mainline U-Boot source tree then:
--level v3 --type bl31
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl3sig --input fip/bl33.bin --compress lz4 \
--output fip/bl33.bin.enc \
--level v3 --type bl33 --compress lz4
--level v3 --type bl33
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bl2sig --input fip/bl2_new.bin \
--output fip/bl2.n.bin.sig
$ $UBOOTDIR/fip/g12b/aml_encrypt_g12b --bootmk \
@ -124,11 +119,7 @@ Go back to the mainline U-Boot source tree then:
--bl33 fip/bl33.bin.enc \
--ddrfw1 fip/ddr4_1d.fw \
--ddrfw2 fip/ddr4_2d.fw \
--ddrfw3 fip/ddr3_1d.fw \
--ddrfw4 fip/piei.fw \
--ddrfw5 fip/lpddr4_1d.fw \
--ddrfw6 fip/lpddr4_2d.fw \
--ddrfw7 fip/diag_lpddr4.fw \
--ddrfw8 fip/aml_ddr.fw \
--level v3