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imx: mx6ul Add CONFIG_SYS_CACHELINE_SIZE for i.MX6UL

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Since i.MX6UL's cache line size is 64bytes, need to
define the macro CONFIG_SYS_CACHELINE_SIZE to 64 for i.MX6UL.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
This commit is contained in:
Peng Fan 2015-07-20 19:28:24 +08:00 committed by Stefano Babic
parent bc32fc699c
commit d73d5aee3c
1 changed files with 4 additions and 0 deletions
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4
arch/arm/include/asm/arch-mx6/imx-regs.h
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@ -9,7 +9,11 @@
#define ARCH_MXC #define ARCH_MXC
#ifdef CONFIG_MX6UL
#define CONFIG_SYS_CACHELINE_SIZE 64
#else
#define CONFIG_SYS_CACHELINE_SIZE 32 #define CONFIG_SYS_CACHELINE_SIZE 32
#endif
#define ROMCP_ARB_BASE_ADDR 0x00000000 #define ROMCP_ARB_BASE_ADDR 0x00000000
#define ROMCP_ARB_END_ADDR 0x000FFFFF #define ROMCP_ARB_END_ADDR 0x000FFFFF