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arm: drop eSDHC clock getting in mxc_get_clock() for layerscape

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Although layerscape platforms reuse mxc_get_clock() of i.MX platforms,
eSDHC clock getting do not have to use it. It uses global data
gd->arch.sdhc_clk directly in fsl_esdhc driver. Even there are more
than one eSDHC controllers on SoC, they use same reference clock.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Yangbo Lu 2019-11-12 19:28:38 +08:00 committed by Peng Fan
parent d9114e2b73
commit d3eb317ea5
5 changed files with 0 additions and 35 deletions
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2
arch/arm/cpu/armv7/ls102xa/clock.c
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@ -109,8 +109,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) { switch (clk) {
case MXC_I2C_CLK: case MXC_I2C_CLK:
return get_bus_freq(0) / 2; return get_bus_freq(0) / 2;
case MXC_ESDHC_CLK:
return get_bus_freq(0);
case MXC_DSPI_CLK: case MXC_DSPI_CLK:
return get_bus_freq(0) / 2; return get_bus_freq(0) / 2;
case MXC_UART_CLK: case MXC_UART_CLK:

15
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c
View File

@ -227,16 +227,6 @@ ulong get_ddr_freq(ulong dummy)
return gd->mem_clk; return gd->mem_clk;
} }
#ifdef CONFIG_FSL_ESDHC
int get_sdhc_freq(ulong dummy)
{
if (!gd->arch.sdhc_clk)
get_clocks();
return gd->arch.sdhc_clk;
}
#endif
int get_serial_clock(void) int get_serial_clock(void)
{ {
return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV; return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@ -264,11 +254,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) { switch (clk) {
case MXC_I2C_CLK: case MXC_I2C_CLK:
return get_i2c_freq(0); return get_i2c_freq(0);
#if defined(CONFIG_FSL_ESDHC)
case MXC_ESDHC_CLK:
case MXC_ESDHC2_CLK:
return get_sdhc_freq(0);
#endif
case MXC_DSPI_CLK: case MXC_DSPI_CLK:
return get_dspi_freq(0); return get_dspi_freq(0);
#ifdef CONFIG_FSL_LPUART #ifdef CONFIG_FSL_LPUART

15
arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch3_speed.c
View File

@ -236,16 +236,6 @@ int get_dspi_freq(ulong dummy)
return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV; return get_bus_freq(0) / CONFIG_SYS_FSL_DSPI_CLK_DIV;
} }
#ifdef CONFIG_FSL_ESDHC
int get_sdhc_freq(ulong dummy)
{
if (!gd->arch.sdhc_clk)
get_clocks();
return gd->arch.sdhc_clk;
}
#endif
int get_serial_clock(void) int get_serial_clock(void)
{ {
return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV; return get_bus_freq(0) / CONFIG_SYS_FSL_DUART_CLK_DIV;
@ -256,11 +246,6 @@ unsigned int mxc_get_clock(enum mxc_clock clk)
switch (clk) { switch (clk) {
case MXC_I2C_CLK: case MXC_I2C_CLK:
return get_i2c_freq(0); return get_i2c_freq(0);
#if defined(CONFIG_FSL_ESDHC)
case MXC_ESDHC_CLK:
case MXC_ESDHC2_CLK:
return get_sdhc_freq(0);
#endif
case MXC_DSPI_CLK: case MXC_DSPI_CLK:
return get_dspi_freq(0); return get_dspi_freq(0);
default: default:

2
arch/arm/include/asm/arch-fsl-layerscape/clock.h
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@ -14,8 +14,6 @@ enum mxc_clock {
MXC_ARM_CLK = 0, MXC_ARM_CLK = 0,
MXC_BUS_CLK, MXC_BUS_CLK,
MXC_UART_CLK, MXC_UART_CLK,
MXC_ESDHC_CLK,
MXC_ESDHC2_CLK,
MXC_I2C_CLK, MXC_I2C_CLK,
MXC_DSPI_CLK, MXC_DSPI_CLK,
}; };

1
arch/arm/include/asm/arch-ls102xa/clock.h
View File

@ -12,7 +12,6 @@
enum mxc_clock { enum mxc_clock {
MXC_ARM_CLK = 0, MXC_ARM_CLK = 0,
MXC_UART_CLK, MXC_UART_CLK,
MXC_ESDHC_CLK,
MXC_I2C_CLK, MXC_I2C_CLK,
MXC_DSPI_CLK, MXC_DSPI_CLK,
}; };