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armv8: lx2160a: fix reset sequence

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Make sure that SW_RST_REQ and RST_REQ_MSK are cleared
before triggering hardware reset request.

Signed-off-by: Thirupathaiah Annapureddy <thiruan@linux.microsoft.com>
Signed-off-by: Meenakshi Aggarwal <meenakshi.aggarwal@nxp.com>
Reviewed-by: Priyanka Jain <priyanka.jain@nxp.com>
This commit is contained in:
Meenakshi Aggarwal 2020-09-09 14:06:05 +05:30 committed by Priyanka Jain
parent e5f1111a79
commit d31f3a1b62
1 changed files with 8 additions and 6 deletions
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14
arch/arm/cpu/armv8/fsl-layerscape/cpu.c
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@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ // SPDX-License-Identifier: GPL-2.0+
/* /*
* Copyright 2017-2019 NXP * Copyright 2017-2020 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc. * Copyright 2014-2015 Freescale Semiconductor, Inc.
*/ */
@ -1229,13 +1229,15 @@ __efi_runtime_data u32 __iomem *rstcr = (u32 *)CONFIG_SYS_FSL_RST_ADDR;
void __efi_runtime reset_cpu(ulong addr) void __efi_runtime reset_cpu(ulong addr)
{ {
#ifdef CONFIG_ARCH_LX2160A
/* clear the RST_REQ_MSK and SW_RST_REQ */
out_le32(rstcr, 0x0);
/* initiate the sw reset request */
out_le32(rstcr, 0x1);
#else
u32 val; u32 val;
#ifdef CONFIG_ARCH_LX2160A
val = in_le32(rstcr);
val |= 0x01;
out_le32(rstcr, val);
#else
/* Raise RESET_REQ_B */ /* Raise RESET_REQ_B */
val = scfg_in32(rstcr); val = scfg_in32(rstcr);
val |= 0x02; val |= 0x02;