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mips: octeon: Add USB DT nodes

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Add the USB device tree nodes to the Octeon dts/dtsi files.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This commit is contained in:
Stefan Roese 2020-08-24 13:04:42 +02:00 committed by Daniel Schwierzeck
parent 399b867fac
commit d25d2db847
2 changed files with 84 additions and 0 deletions
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60
arch/mips/dts/mrvl,cn73xx.dtsi
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@ -143,5 +143,65 @@
spi-max-frequency = <25000000>; spi-max-frequency = <25000000>;
clocks = <&clk OCTEON_CLK_IO>; clocks = <&clk OCTEON_CLK_IO>;
}; };
/* USB 0 */
usb0: uctl@1180068000000 {
compatible = "cavium,octeon-7130-usb-uctl";
reg = <0x11800 0x68000000 0x0 0x100>;
ranges; /* Direct mapping */
#address-cells = <2>;
#size-cells = <2>;
/* Only 100MHz allowed */
refclk-frequency = <100000000>;
/* Only "dlmc_ref_clk0" is supported for 73xx */
refclk-type-ss = "dlmc_ref_clk0";
/* Only "dlmc_ref_clk0" is supported for 73xx */
refclk-type-hs = "dlmc_ref_clk0";
/*
* Power is specified by three parts:
* 1) GPIO handle (must be &gpio)
* 2) GPIO pin number
* 3) Active high (0) or active low (1)
*/
xhci@1680000000000 {
compatible = "cavium,octeon-7130-xhci","synopsys,dwc3","snps,dwc3";
reg = <0x16800 0x00000000 0x10 0x0>;
interrupts = <0x68080 4>; /* UAHC_IMAN, level */
maximum-speed = "super-speed";
dr_mode = "host";
snps,dis_u3_susphy_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_enblslpm_quirk;
};
};
/* USB 1 */
usb1: uctl@1180069000000 {
compatible = "cavium,octeon-7130-usb-uctl";
reg = <0x11800 0x69000000 0x0 0x100>;
ranges; /* Direct mapping */
#address-cells = <2>;
#size-cells = <2>;
/* 50MHz, 100MHz and 125MHz allowed */
refclk-frequency = <100000000>;
/* Either "dlmc_ref_clk0" or "dlmc_ref_clk0" */
refclk-type-ss = "dlmc_ref_clk0";
/* Either "dlmc_ref_clk0" "dlmc_ref_clk1" or "pll_ref_clk" */
refclk-type-hs = "dlmc_ref_clk0";
/*
* Power is specified by three parts:
* 1) GPIO handle (must be &gpio)
* 2) GPIO pin number
* 3) Active high (0) or active low (1)
*/
xhci@1690000000000 {
compatible = "cavium,octeon-7130-xhci","synopsys,dwc3","snps,dwc3";
reg = <0x16900 0x00000000 0x10 0x0>;
interrupts = <0x69080 4>; /* UAHC_IMAN, level */
dr_mode = "host";
};
};
}; };
}; };

24
arch/mips/dts/mrvl,octeon-ebb7304.dts
View File

@ -113,3 +113,27 @@
reg = <0>; reg = <0>;
}; };
}; };
/* USB 0 */
&usb0 {
status = "okay";
/*
* Power is specified by three parts:
* 1) GPIO handle (must be &gpio)
* 2) GPIO pin number
* 3) Active high (0) or active low (1)
*/
power = <&gpio 20 0>;
};
/* USB 1 */
&usb1 {
status = "okay";
/*
* Power is specified by three parts:
* 1) GPIO handle (must be &gpio)
* 2) GPIO pin number
* 3) Active high (0) or active low (1)
*/
power = <&gpio 21 0>;
};