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usb: dwc3: Implement .glue_configure for i.MX8MP

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The i.MX8MP glue needs to be configured based on a couple of DT
properties, implement .glue_configure callback to parse those DT
properties and configure the glue accordingly.

Tested-By: Tim Harvey <tharvey@gateworks.com> #imx8mp-venice-gw74xx
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Angus Ainslie <angus@akkea.ca>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit is contained in:
Marek Vasut 2022-04-13 00:42:56 +02:00 committed by Stefano Babic
parent f1ef95591c
commit d0f7a0559a
1 changed files with 52 additions and 0 deletions
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52
drivers/usb/dwc3/dwc3-generic.c
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@ -223,6 +223,57 @@ struct dwc3_glue_ops {
enum usb_dr_mode mode); enum usb_dr_mode mode);
}; };
void dwc3_imx8mp_glue_configure(struct udevice *dev, int index,
enum usb_dr_mode mode)
{
/* USB glue registers */
#define USB_CTRL0 0x00
#define USB_CTRL1 0x04
#define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */
#define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */
#define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */
#define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */
#define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */
fdt_addr_t regs = dev_read_addr_index(dev, 1);
void *base = map_physmem(regs, 0x8, MAP_NOCACHE);
u32 value;
value = readl(base + USB_CTRL0);
if (dev_read_bool(dev, "fsl,permanently-attached"))
value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
else
value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED);
if (dev_read_bool(dev, "fsl,disable-port-power-control"))
value &= ~(USB_CTRL0_PORTPWR_EN);
else
value |= USB_CTRL0_PORTPWR_EN;
writel(value, base + USB_CTRL0);
value = readl(base + USB_CTRL1);
if (dev_read_bool(dev, "fsl,over-current-active-low"))
value |= USB_CTRL1_OC_POLARITY;
else
value &= ~USB_CTRL1_OC_POLARITY;
if (dev_read_bool(dev, "fsl,power-active-low"))
value |= USB_CTRL1_PWR_POLARITY;
else
value &= ~USB_CTRL1_PWR_POLARITY;
writel(value, base + USB_CTRL1);
unmap_physmem(base, MAP_NOCACHE);
}
struct dwc3_glue_ops imx8mp_ops = {
.glue_configure = dwc3_imx8mp_glue_configure,
};
void dwc3_ti_glue_configure(struct udevice *dev, int index, void dwc3_ti_glue_configure(struct udevice *dev, int index,
enum usb_dr_mode mode) enum usb_dr_mode mode)
{ {
@ -464,6 +515,7 @@ static const struct udevice_id dwc3_glue_ids[] = {
{ .compatible = "rockchip,rk3328-dwc3" }, { .compatible = "rockchip,rk3328-dwc3" },
{ .compatible = "rockchip,rk3399-dwc3" }, { .compatible = "rockchip,rk3399-dwc3" },
{ .compatible = "qcom,dwc3" }, { .compatible = "qcom,dwc3" },
{ .compatible = "fsl,imx8mp-dwc3", .data = (ulong)&imx8mp_ops },
{ .compatible = "fsl,imx8mq-dwc3" }, { .compatible = "fsl,imx8mq-dwc3" },
{ .compatible = "intel,tangier-dwc3" }, { .compatible = "intel,tangier-dwc3" },
{ } { }