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Merge branch '2020-08-06-Kconfig-sram-options'

Browse Source 
- Migrate a few SRAM related options to Kconfig, related cleanups.
This commit is contained in:
Tom Rini 2020-08-06 20:57:55 -04:00
commit ce2724909b
21 changed files with 158 additions and 115 deletions
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25
Kconfig
View File

@ -379,6 +379,31 @@ config STACK_SIZE
by the UEFI sub-system. On some boards initrd_high is calculated as
base stack pointer minus this stack size.
config SYS_HAS_SRAM
bool
default y if TARGET_PIC32MZDASK
default y if TARGET_DEVKIT8000
default y if TARGET_TRICORDER
default n
help
Enable this to allow support for the on board SRAM.
SRAM base address is controlled by CONFIG_SYS_SRAM_BASE.
SRAM size is controlled by CONFIG_SYS_SRAM_SIZE.
config SYS_SRAM_BASE
hex
default 0x80000000 if TARGET_PIC32MZDASK
default 0x40200000 if TARGET_DEVKIT8000
default 0x40200000 if TARGET_TRICORDER
default 0x0
config SYS_SRAM_SIZE
hex
default 0x00080000 if TARGET_PIC32MZDASK
default 0x10000 if TARGET_DEVKIT8000
default 0x10000 if TARGET_TRICORDER
default 0x0
endmenu # General setup
menu "Boot images"

1
arch/Kconfig
View File

@ -10,7 +10,6 @@ choice
config ARC
bool "ARC architecture"
select ARCH_EARLY_INIT_R
select ARC_TIMER
select CLK
select HAVE_PRIVATE_LIBGCC

7
arch/arc/lib/cpu.c
View File

@ -25,13 +25,6 @@ int arch_cpu_init(void)
return 0;
}
int arch_early_init_r(void)
{
gd->bd->bi_memstart = CONFIG_SYS_SDRAM_BASE;
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}
/* This is a dummy function on arc */
int dram_init(void)
{

25
arch/m68k/lib/bdinfo.c
View File

@ -11,14 +11,31 @@
DECLARE_GLOBAL_DATA_PTR;
int arch_setup_bdinfo(void)
{
struct bd_info *bd = gd->bd;
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
if (IS_ENABLED(CONFIG_PCI))
bd->bi_pcifreq = gd->pci_clk;
#if defined(CONFIG_EXTRA_CLOCK)
bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
#endif
return 0;
}
void arch_print_bdinfo(void)
{
struct bd_info *bd = gd->bd;
#if defined(CONFIG_SYS_INIT_RAM_ADDR)
bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
bdinfo_print_num("sramsize", (ulong)bd->bi_sramsize);
#endif
bdinfo_print_mhz("busfreq", bd->bi_busfreq);
#if defined(CONFIG_SYS_MBAR)
bdinfo_print_num("mbar", bd->bi_mbar_base);

29
arch/powerpc/lib/bdinfo.c
View File

@ -11,6 +11,31 @@
DECLARE_GLOBAL_DATA_PTR;
int arch_setup_bdinfo(void)
{
struct bd_info *bd = gd->bd;
#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
#endif
#if defined(CONFIG_MPC83xx)
bd->bi_immrbar = CONFIG_SYS_IMMR;
#endif
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
#if defined(CONFIG_CPM2)
bd->bi_cpmfreq = gd->arch.cpm_clk;
bd->bi_brgfreq = gd->arch.brg_clk;
bd->bi_sccfreq = gd->arch.scc_clk;
bd->bi_vco = gd->arch.vco_out;
#endif /* CONFIG_CPM2 */
return 0;
}
void __weak board_detail(void)
{
/* Please define board_detail() for your PPC platform */
@ -20,10 +45,6 @@ void arch_print_bdinfo(void)
{
struct bd_info *bd = gd->bd;
#if defined(CONFIG_SYS_INIT_RAM_ADDR)
bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
bdinfo_print_num("sramsize", (ulong)bd->bi_sramsize);
#endif
bdinfo_print_mhz("busfreq", bd->bi_busfreq);
#if defined(CONFIG_MPC8xx) || defined(CONFIG_E500)
bdinfo_print_num("immr_base", bd->bi_immr_base);

2
arch/xtensa/lib/Makefile
View File

@ -5,4 +5,4 @@
obj-$(CONFIG_CMD_BOOTM) += bootm.o
obj-y += cache.o misc.o relocate.o time.o
obj-y += cache.o misc.o relocate.o time.o bdinfo.o

22
arch/xtensa/lib/bdinfo.c Normal file
View File

@ -0,0 +1,22 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* XTENSA-specific information for the 'bd' command
*
* (C) Copyright 2003
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*/
#include <common.h>
#include <init.h>
DECLARE_GLOBAL_DATA_PTR;
int arch_setup_bdinfo(void)
{
struct bd_info *bd = gd->bd;
bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}

3
board/cadence/xtfpga/xtfpga.c
View File

@ -51,9 +51,6 @@ int checkboard(void)
int dram_init_banksize(void)
{
gd->bd->bi_memstart = PHYSADDR(CONFIG_SYS_SDRAM_BASE);
gd->bd->bi_memsize = CONFIG_SYS_SDRAM_SIZE;
return 0;
}

4
cmd/bdinfo.c
View File

@ -77,6 +77,10 @@ int do_bdinfo(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
print_bi_dram(bd);
bdinfo_print_num("memstart", (ulong)bd->bi_memstart);
print_phys_addr("memsize", bd->bi_memsize);
if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
bdinfo_print_num("sramstart", (ulong)bd->bi_sramstart);
bdinfo_print_num("sramsize", (ulong)bd->bi_sramsize);
}
bdinfo_print_num("flashstart", (ulong)bd->bi_flashstart);
bdinfo_print_num("flashsize", (ulong)bd->bi_flashsize);
bdinfo_print_num("flashoffset", (ulong)bd->bi_flashoffset);

71
common/board_f.c
View File

@ -598,62 +598,25 @@ static int display_new_sp(void)
return 0;
}
#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
defined(CONFIG_SH)
static int setup_board_part1(void)
__weak int arch_setup_bdinfo(void)
{
return 0;
}
int setup_bdinfo(void)
{
struct bd_info *bd = gd->bd;
/*
* Save local variables to board info struct
*/
bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of memory */
bd->bi_memsize = gd->ram_size; /* size in bytes */
bd->bi_memstart = gd->ram_base; /* start of memory */
bd->bi_memsize = gd->ram_size; /* size in bytes */
#ifdef CONFIG_SYS_SRAM_BASE
bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
#endif
if (IS_ENABLED(CONFIG_SYS_HAS_SRAM)) {
bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM */
bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM */
}
#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
#endif
#if defined(CONFIG_M68K)
bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
#endif
#if defined(CONFIG_MPC83xx)
bd->bi_immrbar = CONFIG_SYS_IMMR;
#endif
return 0;
return arch_setup_bdinfo();
}
#endif
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
static int setup_board_part2(void)
{
struct bd_info *bd = gd->bd;
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
#if defined(CONFIG_CPM2)
bd->bi_cpmfreq = gd->arch.cpm_clk;
bd->bi_brgfreq = gd->arch.brg_clk;
bd->bi_sccfreq = gd->arch.scc_clk;
bd->bi_vco = gd->arch.vco_out;
#endif /* CONFIG_CPM2 */
#if defined(CONFIG_M68K) && defined(CONFIG_PCI)
bd->bi_pcifreq = gd->pci_clk;
#endif
#if defined(CONFIG_EXTRA_CLOCK)
bd->bi_inpfreq = gd->arch.inp_clk; /* input Freq in Hz */
bd->bi_vcofreq = gd->arch.vco_clk; /* vco Freq in Hz */
bd->bi_flbfreq = gd->arch.flb_clk; /* flexbus Freq in Hz */
#endif
return 0;
}
#endif
#ifdef CONFIG_POST
static int init_post(void)
@ -975,14 +938,8 @@ static const init_fnc_t init_sequence_f[] = {
reserve_stacks,
dram_init_banksize,
show_dram_config,
#if defined(CONFIG_M68K) || defined(CONFIG_MIPS) || defined(CONFIG_PPC) || \
defined(CONFIG_SH)
setup_board_part1,
#endif
#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
INIT_FUNC_WATCHDOG_RESET
setup_board_part2,
#endif
setup_bdinfo,
display_new_sp,
#ifdef CONFIG_OF_BOARD_FIXUP
fix_fdt,

14
common/board_r.c
View File

@ -187,12 +187,6 @@ static int initr_reloc_global_data(void)
return 0;
}
static int initr_serial(void)
{
serial_initialize();
return 0;
}
#if defined(CONFIG_PPC) || defined(CONFIG_M68K) || defined(CONFIG_MIPS)
static int initr_trap(void)
{
@ -714,12 +708,15 @@ static init_fnc_t init_sequence_r[] = {
#endif
initr_dm_devices,
stdio_init_tables,
initr_serial,
serial_initialize,
initr_announce,
#if CONFIG_IS_ENABLED(WDT)
initr_watchdog,
#endif
INIT_FUNC_WATCHDOG_RESET
#if defined(CONFIG_NEEDS_MANUAL_RELOC) && defined(CONFIG_BLOCK_CACHE)
blkcache_init,
#endif
#ifdef CONFIG_NEEDS_MANUAL_RELOC
initr_manual_reloc_cmdtable,
#endif
@ -853,9 +850,6 @@ static init_fnc_t init_sequence_r[] = {
#endif
#if defined(CONFIG_PRAM)
initr_mem,
#endif
#if defined(CONFIG_M68K) && defined(CONFIG_BLOCK_CACHE)
blkcache_init,
#endif
run_main_loop,
};

9
drivers/block/blk-uclass.c
View File

@ -644,11 +644,12 @@ int blk_unbind_all(int if_type)
static int blk_post_probe(struct udevice *dev)
{
#if defined(CONFIG_PARTITIONS) && defined(CONFIG_HAVE_BLOCK_DEVICE)
struct blk_desc *desc = dev_get_uclass_platdata(dev);
if (IS_ENABLED(CONFIG_PARTITIONS) &&
IS_ENABLED(CONFIG_HAVE_BLOCK_DEVICE)) {
struct blk_desc *desc = dev_get_uclass_platdata(dev);
part_init(desc);
#endif
part_init(desc);
}
return 0;
}

15
drivers/block/blkcache.c
View File

@ -12,6 +12,10 @@
#include <linux/ctype.h>
#include <linux/list.h>
#ifdef CONFIG_NEEDS_MANUAL_RELOC
DECLARE_GLOBAL_DATA_PTR;
#endif
struct block_cache_node {
struct list_head lh;
int iftype;
@ -22,21 +26,20 @@ struct block_cache_node {
char *cache;
};
#ifndef CONFIG_M68K
static LIST_HEAD(block_cache);
#else
static struct list_head block_cache;
#endif
static struct block_cache_stats _stats = {
.max_blocks_per_entry = 8,
.max_entries = 32
};
#ifdef CONFIG_M68K
#ifdef CONFIG_NEEDS_MANUAL_RELOC
int blkcache_init(void)
{
INIT_LIST_HEAD(&block_cache);
struct list_head *head = &block_cache;
head->next = (uintptr_t)head->next + gd->reloc_off;
head->prev = (uintptr_t)head->prev + gd->reloc_off;
return 0;
}

4
drivers/serial/serial-uclass.c
View File

@ -170,9 +170,9 @@ int serial_init(void)
}
/* Called after relocation */
void serial_initialize(void)
int serial_initialize(void)
{
serial_init();
return serial_init();
}
static void _serial_putc(struct udevice *dev, char ch)

4
drivers/serial/serial.c
View File

@ -170,7 +170,7 @@ void serial_register(struct serial_device *dev)
* serial port to the serial core. That serial port is then used as a
* default output.
*/
void serial_initialize(void)
int serial_initialize(void)
{
atmel_serial_initialize();
mcf_serial_initialize();
@ -183,6 +183,8 @@ void serial_initialize(void)
mtk_serial_initialize();
serial_assign(default_serial_console()->name);
return 0;
}
static int serial_stub_start(struct stdio_dev *sdev)

4
include/configs/devkit8000.h
View File

@ -137,10 +137,6 @@
/* Boot Argument Buffer Size */
/* SRAM config */
#define CONFIG_SYS_SRAM_START 0x40200000
#define CONFIG_SYS_SRAM_SIZE 0x10000
/* Defines for SPL */
/* NAND boot config */

3
include/configs/pic32mzdask.h
View File

@ -19,9 +19,6 @@
/*----------------------------------------------------------------------
* Memory Layout
*/
#define CONFIG_SYS_SRAM_BASE 0x80000000
#define CONFIG_SYS_SRAM_SIZE 0x00080000 /* 512K */
/* Initial RAM for temporary stack, global data */
#define CONFIG_SYS_INIT_RAM_SIZE 0x10000
#define CONFIG_SYS_INIT_RAM_ADDR \

4
include/configs/tricorder.h
View File

@ -197,10 +197,6 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
/* SRAM config */
#define CONFIG_SYS_SRAM_START 0x40200000
#define CONFIG_SYS_SRAM_SIZE 0x10000
/* Defines for SPL */
#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"

22
include/init.h
View File

@ -141,6 +141,28 @@ int arch_reserve_stacks(void);
*/
int arch_reserve_mmu(void);
/**
* arch_setup_bdinfo() - Architecture dependent boardinfo setup
*
* Architecture-specific routine for populating various boardinfo fields of
* gd->bd. It is called during the generic board init sequence.
*
* If an implementation is not provided, it will just be a nop stub.
*
* Return: 0 if OK
*/
int arch_setup_bdinfo(void);
/**
* setup_bdinfo() - Generic boardinfo setup
*
* Routine for populating various generic boardinfo fields of
* gd->bd. It is called during the generic board init sequence.
*
* Return: 0 if OK
*/
int setup_bdinfo(void);
/**
* init_cache_f_r() - Turn on the cache in preparation for relocation
*

2
include/serial.h
View File

@ -42,10 +42,10 @@ extern struct serial_device eserial5_device;
extern struct serial_device eserial6_device;
extern void serial_register(struct serial_device *);
extern void serial_initialize(void);
extern void serial_stdio_init(void);
extern int serial_assign(const char *name);
extern void serial_reinit_all(void);
int serial_initialize(void);
/* For usbtty */
#ifdef CONFIG_USB_TTY

3
scripts/config_whitelist.txt
View File

@ -3715,9 +3715,6 @@ CONFIG_SYS_SPL_LEN
CONFIG_SYS_SPL_MALLOC_SIZE
CONFIG_SYS_SPL_MALLOC_START
CONFIG_SYS_SPR
CONFIG_SYS_SRAM_BASE
CONFIG_SYS_SRAM_SIZE
CONFIG_SYS_SRAM_START
CONFIG_SYS_SRIO
CONFIG_SYS_SRIO1_MEM_BASE
CONFIG_SYS_SRIO1_MEM_BUS