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drivers: i3c: Add i3c sandbox simple test.
Add s simple test for the I3C uclass in sandbox. Signed-off-by: Dinesh Maniyam <dinesh.maniyam@altera.com>
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@ -936,6 +936,14 @@
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};
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};
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i3c0 {
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compatible = "sandbox,i3c";
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};
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i3c1 {
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compatible = "sandbox,i3c";
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};
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bootcount@0 {
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compatible = "u-boot,bootcount-rtc";
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rtc = <&rtc_1>;
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@ -14,6 +14,12 @@ menuconfig I3C
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If you want I3C support, you should say Y here and also to the
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specific driver for your bus adapter(s) below.
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config I3C_SANDBOX
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bool "Enable support for the sandbox I3C"
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help
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This is a sandbox I3C used for testing. It provides 2 interfaces and
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records the settings passed into it.
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if I3C
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source "drivers/i3c/master/Kconfig"
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@ -2,3 +2,4 @@
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obj-y := i3c-uclass.o device.o master.o
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obj-y += master/
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obj-$(CONFIG_I3C_SANDBOX) += sandbox_i3c.o
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56
drivers/i3c/sandbox_i3c.c
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56
drivers/i3c/sandbox_i3c.c
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@ -0,0 +1,56 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2025 Altera Corporation <www.altera.com>
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*/
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#include <dm.h>
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#include <errno.h>
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#include <i3c.h>
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#include <linux/i3c/master.h>
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struct sandbox_i3c_priv {
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struct i3c_priv_xfer i3c_xfers;
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};
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static int sandbox_i3c_priv_read(struct udevice *dev, u32 dev_number,
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u8 *buf, u32 buf_size)
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{
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struct sandbox_i3c_priv *priv = dev_get_priv(dev);
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struct i3c_priv_xfer i3c_xfers;
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i3c_xfers = priv->i3c_xfers;
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i3c_xfers.data.in = buf;
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i3c_xfers.len = buf_size;
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return 0;
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}
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static int sandbox_i3c_priv_write(struct udevice *dev, u32 dev_number,
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u8 *buf, u32 buf_size)
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{
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struct sandbox_i3c_priv *priv = dev_get_priv(dev);
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struct i3c_priv_xfer i3c_xfers;
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i3c_xfers = priv->i3c_xfers;
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i3c_xfers.data.out = buf;
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i3c_xfers.len = buf_size;
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return 0;
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}
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static const struct dm_i3c_ops sandbox_i3c_ops = {
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.read = sandbox_i3c_priv_read,
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.write = sandbox_i3c_priv_write,
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};
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static const struct udevice_id sandbox_i3c_ids[] = {
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{ .compatible = "sandbox,i3c" },
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{ }
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};
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U_BOOT_DRIVER(i3c_sandbox) = {
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.name = "i3c_sandbox",
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.id = UCLASS_I3C,
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.of_match = sandbox_i3c_ids,
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.ops = &sandbox_i3c_ops,
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};
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@ -58,6 +58,7 @@ obj-$(CONFIG_FWU_MDATA_GPT_BLK) += fwu_mdata.o
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obj-$(CONFIG_SANDBOX) += host.o
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obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock.o
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obj-$(CONFIG_DM_I2C) += i2c.o
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obj-$(CONFIG_I3C) += i3c.o
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obj-$(CONFIG_SOUND) += i2s.o
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obj-$(CONFIG_CLK_K210_SET_RATE) += k210_pll.o
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obj-$(CONFIG_IOMMU) += iommu.o
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34
test/dm/i3c.c
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34
test/dm/i3c.c
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@ -0,0 +1,34 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2025 Altera Corporation <www.altera.com>
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*/
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#include <dm.h>
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#include <i3c.h>
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#include <dm/test.h>
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#include <test/ut.h>
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DECLARE_GLOBAL_DATA_PTR;
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/* Basic test of the i3c uclass */
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static int dm_test_i3c_base(struct unit_test_state *uts)
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{
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struct udevice *dev;
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ut_assertok(uclass_get_device(UCLASS_I3C, 0, &dev));
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ut_assertok(dm_i3c_read(dev, 0, NULL, 1));
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ut_assertok(dm_i3c_read(dev, 0, NULL, 4));
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ut_assertok(dm_i3c_write(dev, 0, "AABB", 2));
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ut_assertok(dm_i3c_write(dev, 0, "AABBCCDD", 4));
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ut_assertok(uclass_get_device(UCLASS_I3C, 1, &dev));
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ut_assertok(dm_i3c_read(dev, 1, NULL, 1));
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ut_assertok(dm_i3c_read(dev, 1, NULL, 4));
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ut_assertok(dm_i3c_write(dev, 1, "AABB", 2));
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ut_assertok(dm_i3c_write(dev, 1, "AABBCCDD", 4));
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ut_asserteq(-ENODEV, uclass_get_device(UCLASS_I3C, 2, &dev));
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return 0;
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}
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DM_TEST(dm_test_i3c_base, UTF_SCAN_PDATA | UTF_SCAN_FDT);
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