mirror of
https://source.denx.de/u-boot/u-boot.git
synced 2025-08-23 23:51:22 +02:00
_ run savedefconfig on all STM32 defconfig
STM32 MCU: _ Sync stm32f469-disco DT with Linux 6.5 _ rework ltdc node for stm32f769-disco _ clk: stm32f: Fix settings for LCD_CLK _ Support display on stm32f469-disco board STM32 MPU: _ stm32mp_dfu : Fix board_get_alt_info_mtd() _ stm32mp_dfu : Simplify MTD device parsing -----BEGIN PGP SIGNATURE----- iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmV8Z2ocHHBhdHJpY2Uu Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/pniMEACXOBSH9FsKpQ+aXyvg DnYo82bOxk/UPSopFAniWUIQEFUl50D46fgU3O8OdMc9en9btXKZYgnVdNqRQjVl WA8spyrR0WeDgxcGprwen9BARB8lCDvtl/+RM7oADdOU1q5f1q0ZDg568THSpTun ITmj3a/5quzarS6aW8HVqsRQZJge6rL+CmvDsAw2Wa1FwJm5EPjm5SEx67CjxP35 DQMLteT0OrAo5M/JcjJYK7KnBOcwzgFggQ0n8K/8aFRV311PCcDcXTIT5DRNQOEY gQZOB8ikHSX3HSxHxITiT3CDPwcmJvska2rw5qPXv4wJlcIj2CZWAsa4P2ax88xG b0YwnlVaDNHxpYZDiC1NbzpcOpLk2JKCpnE7Wsdg80qPqzyDCJKlN7lJgkCGfdv2 1XTXjh6k2mIUffLDTVT1Q/vwvXRWMxGz7gvpeVXuRhVcZo5dhsBA19GRGhJ+0qfL BBc1MMGQ7AFnDjigSqfI4ImrTq5AFECg7U51EuLmmn9Bhzo80cDLBEMgAS7eI91D 60cStzLAcfy0VOJX286dVFAULfpwrFPAyycptU+UQVOR159PD72gMRTfIN3oskTz RpCF/4sRoGkH+S16uB/AargXaFr+ap6NAldNyMoekVk6tEt0HC1GIzGKW42auY7K FLd3Mrsgxul029j46WeyD2RL6g== =F+FY -----END PGP SIGNATURE----- Merge tag 'u-boot-stm32-20231215' of https://source.denx.de/u-boot/custodians/u-boot-stm into next _ run savedefconfig on all STM32 defconfig STM32 MCU: _ Sync stm32f469-disco DT with Linux 6.5 _ rework ltdc node for stm32f769-disco _ clk: stm32f: Fix settings for LCD_CLK _ Support display on stm32f469-disco board STM32 MPU: _ stm32mp_dfu : Fix board_get_alt_info_mtd() _ stm32mp_dfu : Simplify MTD device parsing
This commit is contained in:
commit
c936ef7870
@ -90,6 +90,13 @@
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bootph-all;
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};
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&dsi {
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(DSI)>,
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<&rcc 0 STM32F4_APB2_CLOCK(LTDC)>,
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<&clk_hse>;
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clock-names = "pclk", "px_clk", "ref";
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};
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&gpioa {
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bootph-all;
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};
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@ -134,6 +141,12 @@
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bootph-all;
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};
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<dc {
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bootph-all;
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clocks = <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>;
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};
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&pinctrl {
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bootph-all;
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@ -119,7 +119,7 @@
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};
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};
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panel-dsi@0 {
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panel@0 {
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compatible = "orisetech,otm8009a";
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reg = <0>; /* dsi virtual channel (0..3) */
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reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
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@ -138,7 +138,7 @@
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status = "okay";
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port {
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ltdc_out_dsi: endpoint@0 {
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ltdc_out_dsi: endpoint {
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remote-endpoint = <&dsi_in>;
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};
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};
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@ -70,22 +70,17 @@
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};
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};
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};
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};
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};
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ltdc: display-controller@40016800 {
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compatible = "st,stm32-ltdc";
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reg = <0x40016800 0x200>;
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resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
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clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
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<dc {
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clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
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bootph-all;
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status = "okay";
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bootph-all;
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ports {
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port@0 {
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dp_out: endpoint {
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remote-endpoint = <&dsi_in>;
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};
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};
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ports {
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port@0 {
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dp_out: endpoint {
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remote-endpoint = <&dsi_in>;
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};
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};
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};
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@ -86,6 +86,10 @@
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status = "okay";
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};
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<dc {
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status = "okay";
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};
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&rtc {
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status = "okay";
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};
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@ -73,7 +73,6 @@ static void board_get_alt_info_mmc(struct udevice *dev, char *buf)
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static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf)
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{
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struct mtd_info *part;
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bool first = true;
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const char *name;
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int len, partnum = 0;
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@ -86,17 +85,13 @@ static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf)
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"mtd %s=", name);
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len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
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"%s raw 0x0 0x%llx ",
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"%s raw 0x0 0x%llx",
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name, mtd->size);
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list_for_each_entry(part, &mtd->partitions, node) {
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partnum++;
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if (!first)
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len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";");
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first = false;
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len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
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"%s_%s part %d",
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";%s_%s part %d",
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name, part->name, partnum);
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}
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}
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@ -128,24 +123,9 @@ void set_dfu_alt_info(char *interface, char *devstr)
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/* probe all MTD devices */
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mtd_probe_devices();
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/* probe SPI flash device on a bus */
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if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) {
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mtd = get_mtd_device_nm("nor0");
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if (!IS_ERR_OR_NULL(mtd))
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mtd_for_each_device(mtd)
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if (!mtd_is_partition(mtd))
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board_get_alt_info_mtd(mtd, buf);
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mtd = get_mtd_device_nm("nor1");
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if (!IS_ERR_OR_NULL(mtd))
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board_get_alt_info_mtd(mtd, buf);
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}
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mtd = get_mtd_device_nm("nand0");
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if (!IS_ERR_OR_NULL(mtd))
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board_get_alt_info_mtd(mtd, buf);
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mtd = get_mtd_device_nm("spi-nand0");
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if (!IS_ERR_OR_NULL(mtd))
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board_get_alt_info_mtd(mtd, buf);
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}
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if (IS_ENABLED(CONFIG_DFU_VIRT)) {
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@ -19,12 +19,11 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
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CONFIG_AUTOBOOT_STOP_STR=" "
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
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CONFIG_SYS_PBSIZE=1050
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_SYS_PROMPT="U-Boot > "
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CONFIG_SYS_PBSIZE=1050
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CONFIG_CMD_GPT=y
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# CONFIG_RANDOM_UUID is not set
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_SNTP=y
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@ -66,3 +65,4 @@ CONFIG_VIDEO_BMP_RLE8=y
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CONFIG_BMP_16BPP=y
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CONFIG_BMP_24BPP=y
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CONFIG_BMP_32BPP=y
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# CONFIG_RANDOM_UUID is not set
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@ -16,12 +16,12 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y
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CONFIG_BOOTDELAY=3
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
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CONFIG_SYS_PBSIZE=1050
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# CONFIG_DISPLAY_CPUINFO is not set
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# CONFIG_DISPLAY_BOARDINFO is not set
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CONFIG_MISC_INIT_R=y
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CONFIG_HUSH_PARSER=y
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CONFIG_SYS_PROMPT="U-Boot > "
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CONFIG_SYS_PBSIZE=1050
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CONFIG_CMD_IMLS=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_TIMER=y
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@ -12,13 +12,12 @@ CONFIG_TARGET_STM32F429_EVALUATION=y
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CONFIG_SYS_LOAD_ADDR=0x400000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_PBSIZE=1050
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_MISC_INIT_R=y
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CONFIG_SYS_PROMPT="U-Boot > "
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CONFIG_SYS_PBSIZE=1050
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GPT=y
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# CONFIG_RANDOM_UUID is not set
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_CACHE=y
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@ -32,3 +31,4 @@ CONFIG_MTD_NOR_FLASH=y
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CONFIG_STM32_FLASH=y
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CONFIG_SYS_MAX_FLASH_SECT=12
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CONFIG_SYS_MAX_FLASH_BANKS=2
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# CONFIG_RANDOM_UUID is not set
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@ -12,15 +12,15 @@ CONFIG_TARGET_STM32F469_DISCOVERY=y
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CONFIG_SYS_LOAD_ADDR=0x400000
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CONFIG_DISTRO_DEFAULTS=y
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CONFIG_BOOTDELAY=3
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CONFIG_SYS_PBSIZE=1050
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_MISC_INIT_R=y
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CONFIG_SYS_PROMPT="U-Boot > "
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CONFIG_SYS_PBSIZE=1050
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_GPT=y
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# CONFIG_RANDOM_UUID is not set
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_BMP=y
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CONFIG_CMD_CACHE=y
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CONFIG_CMD_TIMER=y
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# CONFIG_ISO_PARTITION is not set
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@ -37,6 +37,21 @@ CONFIG_SYS_MAX_FLASH_BANKS=2
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CONFIG_DM_SPI_FLASH=y
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CONFIG_SPI_FLASH_STMICRO=y
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# CONFIG_PINCTRL_FULL is not set
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CONFIG_DM_REGULATOR=y
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CONFIG_DM_REGULATOR_FIXED=y
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CONFIG_SPI=y
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CONFIG_DM_SPI=y
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CONFIG_STM32_QSPI=y
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CONFIG_VIDEO=y
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CONFIG_VIDEO_LOGO=y
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CONFIG_BACKLIGHT_GPIO=y
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CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
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CONFIG_VIDEO_STM32=y
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CONFIG_VIDEO_STM32_DSI=y
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CONFIG_VIDEO_STM32_MAX_XRES=480
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CONFIG_VIDEO_STM32_MAX_YRES=800
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CONFIG_SPLASH_SCREEN=y
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CONFIG_SPLASH_SCREEN_ALIGN=y
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CONFIG_BMP_16BPP=y
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CONFIG_BMP_24BPP=y
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CONFIG_BMP_32BPP=y
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@ -19,12 +19,11 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
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CONFIG_AUTOBOOT_STOP_STR=" "
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
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CONFIG_SYS_PBSIZE=1050
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_BOARD_LATE_INIT=y
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CONFIG_SYS_PROMPT="U-Boot > "
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CONFIG_SYS_PBSIZE=1050
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CONFIG_CMD_GPT=y
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# CONFIG_RANDOM_UUID is not set
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_SNTP=y
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@ -66,3 +65,4 @@ CONFIG_SPLASH_SCREEN_ALIGN=y
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CONFIG_BMP_16BPP=y
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CONFIG_BMP_24BPP=y
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CONFIG_BMP_32BPP=y
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# CONFIG_RANDOM_UUID is not set
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|
@ -19,11 +19,10 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
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CONFIG_AUTOBOOT_STOP_STR=" "
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CONFIG_USE_BOOTARGS=y
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CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
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CONFIG_SYS_PBSIZE=1050
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SYS_PROMPT="U-Boot > "
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CONFIG_SYS_PBSIZE=1050
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CONFIG_CMD_GPT=y
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# CONFIG_RANDOM_UUID is not set
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_SNTP=y
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@ -68,3 +67,4 @@ CONFIG_SPLASH_SCREEN_ALIGN=y
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CONFIG_BMP_16BPP=y
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CONFIG_BMP_24BPP=y
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CONFIG_BMP_32BPP=y
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# CONFIG_RANDOM_UUID is not set
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|
@ -17,10 +17,10 @@ CONFIG_AUTOBOOT_KEYED=y
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CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
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CONFIG_AUTOBOOT_STOP_STR=" "
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CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
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# CONFIG_DISPLAY_CPUINFO is not set
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CONFIG_SYS_PROMPT="U-Boot > "
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CONFIG_SYS_CBSIZE=256
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CONFIG_SYS_PBSIZE=282
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# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_SYS_PROMPT="U-Boot > "
|
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CONFIG_CMD_GPT=y
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CONFIG_CMD_MMC=y
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# CONFIG_CMD_SETEXPR is not set
|
||||
|
@ -16,11 +16,11 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000
|
||||
CONFIG_SYS_MEMTEST_START=0xc0000000
|
||||
CONFIG_SYS_MEMTEST_END=0xc4000000
|
||||
CONFIG_FIT=y
|
||||
CONFIG_SYS_BOOTM_LEN=0x2000000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
CONFIG_BOOTDELAY=1
|
||||
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
|
||||
CONFIG_SYS_PROMPT="STM32MP> "
|
||||
CONFIG_SYS_BOOTM_LEN=0x2000000
|
||||
CONFIG_CMD_ADTIMG=y
|
||||
CONFIG_CMD_ERASEENV=y
|
||||
CONFIG_CMD_NVEDIT_EFI=y
|
||||
|
@ -522,17 +522,20 @@ static ulong stm32_set_rate(struct clk *clk, ulong rate)
|
||||
|
||||
/* get the current PLLSAIR output freq */
|
||||
pllsair_rate = stm32_clk_get_pllsai_rate(priv, PLLSAIR);
|
||||
best_div = pllsair_rate / rate;
|
||||
if ((pllsair_rate % rate) == 0) {
|
||||
best_div = pllsair_rate / rate;
|
||||
|
||||
/* look into pllsaidivr_table if this divider is available*/
|
||||
for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
|
||||
if (best_div == pllsaidivr_table[i]) {
|
||||
/* set pll_saidivr with found value */
|
||||
clrsetbits_le32(®s->dckcfgr,
|
||||
RCC_DCKCFGR_PLLSAIDIVR_MASK,
|
||||
pllsaidivr_table[i]);
|
||||
return rate;
|
||||
}
|
||||
/* look into pllsaidivr_table if this divider is available */
|
||||
for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
|
||||
if (best_div == pllsaidivr_table[i]) {
|
||||
/* set pll_saidivr with found value */
|
||||
clrsetbits_le32(®s->dckcfgr,
|
||||
RCC_DCKCFGR_PLLSAIDIVR_MASK,
|
||||
pllsaidivr_table[i] <<
|
||||
RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
|
||||
return rate;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* As no pllsaidivr value is suitable to obtain requested freq,
|
||||
|
@ -495,6 +495,33 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr)
|
||||
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
|
||||
}
|
||||
|
||||
#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
|
||||
static int stm32_ltdc_alloc_fb(struct udevice *dev)
|
||||
{
|
||||
u32 sdram_size = gd->ram_size;
|
||||
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
|
||||
phys_addr_t cpu;
|
||||
dma_addr_t bus;
|
||||
u64 dma_size;
|
||||
int ret;
|
||||
|
||||
ret = dev_get_dma_range(dev, &cpu, &bus, &dma_size);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to get dma address\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
uc_plat->base = bus + sdram_size - ALIGN(uc_plat->size, uc_plat->align);
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
static inline int stm32_ltdc_alloc_fb(struct udevice *dev)
|
||||
{
|
||||
/* Delegate framebuffer allocation to video-uclass */
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static int stm32_ltdc_probe(struct udevice *dev)
|
||||
{
|
||||
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
|
||||
@ -605,6 +632,10 @@ static int stm32_ltdc_probe(struct udevice *dev)
|
||||
priv->crop_h = timings.vactive.typ;
|
||||
priv->alpha = 0xFF;
|
||||
|
||||
ret = stm32_ltdc_alloc_fb(dev);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
|
||||
timings.hactive.typ, timings.vactive.typ,
|
||||
VNBITS(priv->l2bpp), uc_plat->base);
|
||||
|
@ -31,6 +31,8 @@
|
||||
"scriptaddr=0x00418000\0" \
|
||||
"pxefile_addr_r=0x00428000\0" \
|
||||
"ramdisk_addr_r=0x00438000\0" \
|
||||
"splashimage=0x00448000\0" \
|
||||
"splashpos=m,m\0" \
|
||||
BOOTENV
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
|
BIN
tools/logos/stm32f469-discovery.bmp
Normal file
BIN
tools/logos/stm32f469-discovery.bmp
Normal file
Binary file not shown.
After Width: | Height: | Size: 18 KiB |
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Reference in New Issue
Block a user