_ run savedefconfig on all STM32 defconfig

STM32 MCU:
 _ Sync stm32f469-disco DT with Linux 6.5
 _ rework ltdc node for stm32f769-disco
 _ clk: stm32f: Fix settings for LCD_CLK
 _ Support display on stm32f469-disco board
 
 STM32 MPU:
 _ stm32mp_dfu : Fix board_get_alt_info_mtd()
 _ stm32mp_dfu : Simplify MTD device parsing
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Merge tag 'u-boot-stm32-20231215' of https://source.denx.de/u-boot/custodians/u-boot-stm into next

_ run savedefconfig on all STM32 defconfig

STM32 MCU:
_ Sync stm32f469-disco DT with Linux 6.5
_ rework ltdc node for stm32f769-disco
_ clk: stm32f: Fix settings for LCD_CLK
_ Support display on stm32f469-disco board

STM32 MPU:
_ stm32mp_dfu : Fix board_get_alt_info_mtd()
_ stm32mp_dfu : Simplify MTD device parsing
This commit is contained in:
Tom Rini 2023-12-15 13:33:11 -05:00
commit c936ef7870
17 changed files with 107 additions and 64 deletions

View File

@ -90,6 +90,13 @@
bootph-all;
};
&dsi {
clocks = <&rcc 0 STM32F4_APB2_CLOCK(DSI)>,
<&rcc 0 STM32F4_APB2_CLOCK(LTDC)>,
<&clk_hse>;
clock-names = "pclk", "px_clk", "ref";
};
&gpioa {
bootph-all;
};
@ -134,6 +141,12 @@
bootph-all;
};
&ltdc {
bootph-all;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(LTDC)>;
};
&pinctrl {
bootph-all;

View File

@ -119,7 +119,7 @@
};
};
panel-dsi@0 {
panel@0 {
compatible = "orisetech,otm8009a";
reg = <0>; /* dsi virtual channel (0..3) */
reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>;
@ -138,7 +138,7 @@
status = "okay";
port {
ltdc_out_dsi: endpoint@0 {
ltdc_out_dsi: endpoint {
remote-endpoint = <&dsi_in>;
};
};

View File

@ -70,22 +70,17 @@
};
};
};
};
};
ltdc: display-controller@40016800 {
compatible = "st,stm32-ltdc";
reg = <0x40016800 0x200>;
resets = <&rcc STM32F7_APB2_RESET(LTDC)>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
&ltdc {
clocks = <&rcc 0 STM32F7_APB2_CLOCK(LTDC)>;
bootph-all;
status = "okay";
bootph-all;
ports {
port@0 {
dp_out: endpoint {
remote-endpoint = <&dsi_in>;
};
};
ports {
port@0 {
dp_out: endpoint {
remote-endpoint = <&dsi_in>;
};
};
};

View File

@ -86,6 +86,10 @@
status = "okay";
};
&ltdc {
status = "okay";
};
&rtc {
status = "okay";
};

View File

@ -73,7 +73,6 @@ static void board_get_alt_info_mmc(struct udevice *dev, char *buf)
static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf)
{
struct mtd_info *part;
bool first = true;
const char *name;
int len, partnum = 0;
@ -86,17 +85,13 @@ static void board_get_alt_info_mtd(struct mtd_info *mtd, char *buf)
"mtd %s=", name);
len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
"%s raw 0x0 0x%llx ",
"%s raw 0x0 0x%llx",
name, mtd->size);
list_for_each_entry(part, &mtd->partitions, node) {
partnum++;
if (!first)
len += snprintf(buf + len, DFU_ALT_BUF_LEN - len, ";");
first = false;
len += snprintf(buf + len, DFU_ALT_BUF_LEN - len,
"%s_%s part %d",
";%s_%s part %d",
name, part->name, partnum);
}
}
@ -128,24 +123,9 @@ void set_dfu_alt_info(char *interface, char *devstr)
/* probe all MTD devices */
mtd_probe_devices();
/* probe SPI flash device on a bus */
if (!uclass_get_device(UCLASS_SPI_FLASH, 0, &dev)) {
mtd = get_mtd_device_nm("nor0");
if (!IS_ERR_OR_NULL(mtd))
mtd_for_each_device(mtd)
if (!mtd_is_partition(mtd))
board_get_alt_info_mtd(mtd, buf);
mtd = get_mtd_device_nm("nor1");
if (!IS_ERR_OR_NULL(mtd))
board_get_alt_info_mtd(mtd, buf);
}
mtd = get_mtd_device_nm("nand0");
if (!IS_ERR_OR_NULL(mtd))
board_get_alt_info_mtd(mtd, buf);
mtd = get_mtd_device_nm("spi-nand0");
if (!IS_ERR_OR_NULL(mtd))
board_get_alt_info_mtd(mtd, buf);
}
if (IS_ENABLED(CONFIG_DFU_VIRT)) {

View File

@ -19,12 +19,11 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@ -66,3 +65,4 @@ CONFIG_VIDEO_BMP_RLE8=y
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
# CONFIG_RANDOM_UUID is not set

View File

@ -16,12 +16,12 @@ CONFIG_ENV_VARS_UBOOT_CONFIG=y
CONFIG_BOOTDELAY=3
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TIMER=y

View File

@ -12,13 +12,12 @@ CONFIG_TARGET_STM32F429_EVALUATION=y
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_CACHE=y
@ -32,3 +31,4 @@ CONFIG_MTD_NOR_FLASH=y
CONFIG_STM32_FLASH=y
CONFIG_SYS_MAX_FLASH_SECT=12
CONFIG_SYS_MAX_FLASH_BANKS=2
# CONFIG_RANDOM_UUID is not set

View File

@ -12,15 +12,15 @@ CONFIG_TARGET_STM32F469_DISCOVERY=y
CONFIG_SYS_LOAD_ADDR=0x400000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=3
CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_MISC_INIT_R=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_IMLS=y
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIMER=y
# CONFIG_ISO_PARTITION is not set
@ -37,6 +37,21 @@ CONFIG_SYS_MAX_FLASH_BANKS=2
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
# CONFIG_PINCTRL_FULL is not set
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_VIDEO=y
CONFIG_VIDEO_LOGO=y
CONFIG_BACKLIGHT_GPIO=y
CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
CONFIG_VIDEO_STM32=y
CONFIG_VIDEO_STM32_DSI=y
CONFIG_VIDEO_STM32_MAX_XRES=480
CONFIG_VIDEO_STM32_MAX_YRES=800
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y

View File

@ -19,12 +19,11 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_LATE_INIT=y
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@ -66,3 +65,4 @@ CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
# CONFIG_RANDOM_UUID is not set

View File

@ -19,11 +19,10 @@ CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel"
CONFIG_SYS_PBSIZE=1050
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_PBSIZE=1050
CONFIG_CMD_GPT=y
# CONFIG_RANDOM_UUID is not set
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_SNTP=y
@ -68,3 +67,4 @@ CONFIG_SPLASH_SCREEN_ALIGN=y
CONFIG_BMP_16BPP=y
CONFIG_BMP_24BPP=y
CONFIG_BMP_32BPP=y
# CONFIG_RANDOM_UUID is not set

View File

@ -17,10 +17,10 @@ CONFIG_AUTOBOOT_KEYED=y
CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n"
CONFIG_AUTOBOOT_STOP_STR=" "
CONFIG_DEFAULT_FDT_FILE="stm32h743i-disco"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_SYS_CBSIZE=256
CONFIG_SYS_PBSIZE=282
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SYS_PROMPT="U-Boot > "
CONFIG_CMD_GPT=y
CONFIG_CMD_MMC=y
# CONFIG_CMD_SETEXPR is not set

View File

@ -16,11 +16,11 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_SYS_MEMTEST_START=0xc0000000
CONFIG_SYS_MEMTEST_END=0xc4000000
CONFIG_FIT=y
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_DISTRO_DEFAULTS=y
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
CONFIG_SYS_PROMPT="STM32MP> "
CONFIG_SYS_BOOTM_LEN=0x2000000
CONFIG_CMD_ADTIMG=y
CONFIG_CMD_ERASEENV=y
CONFIG_CMD_NVEDIT_EFI=y

View File

@ -522,17 +522,20 @@ static ulong stm32_set_rate(struct clk *clk, ulong rate)
/* get the current PLLSAIR output freq */
pllsair_rate = stm32_clk_get_pllsai_rate(priv, PLLSAIR);
best_div = pllsair_rate / rate;
if ((pllsair_rate % rate) == 0) {
best_div = pllsair_rate / rate;
/* look into pllsaidivr_table if this divider is available*/
for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
if (best_div == pllsaidivr_table[i]) {
/* set pll_saidivr with found value */
clrsetbits_le32(&regs->dckcfgr,
RCC_DCKCFGR_PLLSAIDIVR_MASK,
pllsaidivr_table[i]);
return rate;
}
/* look into pllsaidivr_table if this divider is available */
for (i = 0 ; i < sizeof(pllsaidivr_table); i++)
if (best_div == pllsaidivr_table[i]) {
/* set pll_saidivr with found value */
clrsetbits_le32(&regs->dckcfgr,
RCC_DCKCFGR_PLLSAIDIVR_MASK,
pllsaidivr_table[i] <<
RCC_DCKCFGR_PLLSAIDIVR_SHIFT);
return rate;
}
}
/*
* As no pllsaidivr value is suitable to obtain requested freq,

View File

@ -495,6 +495,33 @@ static void stm32_ltdc_set_layer1(struct stm32_ltdc_priv *priv, ulong fb_addr)
setbits_le32(priv->regs + LTDC_L1CR, LXCR_LEN);
}
#if IS_ENABLED(CONFIG_TARGET_STM32F469_DISCOVERY)
static int stm32_ltdc_alloc_fb(struct udevice *dev)
{
u32 sdram_size = gd->ram_size;
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
phys_addr_t cpu;
dma_addr_t bus;
u64 dma_size;
int ret;
ret = dev_get_dma_range(dev, &cpu, &bus, &dma_size);
if (ret) {
dev_err(dev, "failed to get dma address\n");
return ret;
}
uc_plat->base = bus + sdram_size - ALIGN(uc_plat->size, uc_plat->align);
return 0;
}
#else
static inline int stm32_ltdc_alloc_fb(struct udevice *dev)
{
/* Delegate framebuffer allocation to video-uclass */
return 0;
}
#endif
static int stm32_ltdc_probe(struct udevice *dev)
{
struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
@ -605,6 +632,10 @@ static int stm32_ltdc_probe(struct udevice *dev)
priv->crop_h = timings.vactive.typ;
priv->alpha = 0xFF;
ret = stm32_ltdc_alloc_fb(dev);
if (ret)
return ret;
dev_dbg(dev, "%dx%d %dbpp frame buffer at 0x%lx\n",
timings.hactive.typ, timings.vactive.typ,
VNBITS(priv->l2bpp), uc_plat->base);

View File

@ -31,6 +31,8 @@
"scriptaddr=0x00418000\0" \
"pxefile_addr_r=0x00428000\0" \
"ramdisk_addr_r=0x00438000\0" \
"splashimage=0x00448000\0" \
"splashpos=m,m\0" \
BOOTENV
#endif /* __CONFIG_H */

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